1 //===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "DAGISelMatcher.h" 11 #include "CodeGenDAGPatterns.h" 12 #include "CodeGenRegisters.h" 13 #include "llvm/ADT/SmallVector.h" 14 #include "llvm/ADT/StringMap.h" 15 #include "llvm/TableGen/Error.h" 16 #include "llvm/TableGen/Record.h" 17 #include <utility> 18 using namespace llvm; 19 20 21 /// getRegisterValueType - Look up and return the ValueType of the specified 22 /// register. If the register is a member of multiple register classes which 23 /// have different associated types, return MVT::Other. 24 static MVT::SimpleValueType getRegisterValueType(Record *R, 25 const CodeGenTarget &T) { 26 bool FoundRC = false; 27 MVT::SimpleValueType VT = MVT::Other; 28 const CodeGenRegister *Reg = T.getRegBank().getReg(R); 29 30 for (const auto &RC : T.getRegBank().getRegClasses()) { 31 if (!RC.contains(Reg)) 32 continue; 33 34 if (!FoundRC) { 35 FoundRC = true; 36 ValueTypeByHwMode VVT = RC.getValueTypeNum(0); 37 if (VVT.isSimple()) 38 VT = VVT.getSimple().SimpleTy; 39 continue; 40 } 41 42 // If this occurs in multiple register classes, they all have to agree. 43 #ifndef NDEBUG 44 ValueTypeByHwMode T = RC.getValueTypeNum(0); 45 assert((!T.isSimple() || T.getSimple().SimpleTy == VT) && 46 "ValueType mismatch between register classes for this register"); 47 #endif 48 } 49 return VT; 50 } 51 52 53 namespace { 54 class MatcherGen { 55 const PatternToMatch &Pattern; 56 const CodeGenDAGPatterns &CGP; 57 58 /// PatWithNoTypes - This is a clone of Pattern.getSrcPattern() that starts 59 /// out with all of the types removed. This allows us to insert type checks 60 /// as we scan the tree. 61 TreePatternNodePtr PatWithNoTypes; 62 63 /// VariableMap - A map from variable names ('$dst') to the recorded operand 64 /// number that they were captured as. These are biased by 1 to make 65 /// insertion easier. 66 StringMap<unsigned> VariableMap; 67 68 /// This maintains the recorded operand number that OPC_CheckComplexPattern 69 /// drops each sub-operand into. We don't want to insert these into 70 /// VariableMap because that leads to identity checking if they are 71 /// encountered multiple times. Biased by 1 like VariableMap for 72 /// consistency. 73 StringMap<unsigned> NamedComplexPatternOperands; 74 75 /// NextRecordedOperandNo - As we emit opcodes to record matched values in 76 /// the RecordedNodes array, this keeps track of which slot will be next to 77 /// record into. 78 unsigned NextRecordedOperandNo; 79 80 /// MatchedChainNodes - This maintains the position in the recorded nodes 81 /// array of all of the recorded input nodes that have chains. 82 SmallVector<unsigned, 2> MatchedChainNodes; 83 84 /// MatchedComplexPatterns - This maintains a list of all of the 85 /// ComplexPatterns that we need to check. The second element of each pair 86 /// is the recorded operand number of the input node. 87 SmallVector<std::pair<const TreePatternNode*, 88 unsigned>, 2> MatchedComplexPatterns; 89 90 /// PhysRegInputs - List list has an entry for each explicitly specified 91 /// physreg input to the pattern. The first elt is the Register node, the 92 /// second is the recorded slot number the input pattern match saved it in. 93 SmallVector<std::pair<Record*, unsigned>, 2> PhysRegInputs; 94 95 /// Matcher - This is the top level of the generated matcher, the result. 96 Matcher *TheMatcher; 97 98 /// CurPredicate - As we emit matcher nodes, this points to the latest check 99 /// which should have future checks stuck into its Next position. 100 Matcher *CurPredicate; 101 public: 102 MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp); 103 104 bool EmitMatcherCode(unsigned Variant); 105 void EmitResultCode(); 106 107 Matcher *GetMatcher() const { return TheMatcher; } 108 private: 109 void AddMatcher(Matcher *NewNode); 110 void InferPossibleTypes(unsigned ForceMode); 111 112 // Matcher Generation. 113 void EmitMatchCode(const TreePatternNode *N, TreePatternNode *NodeNoTypes, 114 unsigned ForceMode); 115 void EmitLeafMatchCode(const TreePatternNode *N); 116 void EmitOperatorMatchCode(const TreePatternNode *N, 117 TreePatternNode *NodeNoTypes, 118 unsigned ForceMode); 119 120 /// If this is the first time a node with unique identifier Name has been 121 /// seen, record it. Otherwise, emit a check to make sure this is the same 122 /// node. Returns true if this is the first encounter. 123 bool recordUniqueNode(const std::string &Name); 124 125 // Result Code Generation. 126 unsigned getNamedArgumentSlot(StringRef Name) { 127 unsigned VarMapEntry = VariableMap[Name]; 128 assert(VarMapEntry != 0 && 129 "Variable referenced but not defined and not caught earlier!"); 130 return VarMapEntry-1; 131 } 132 133 void EmitResultOperand(const TreePatternNode *N, 134 SmallVectorImpl<unsigned> &ResultOps); 135 void EmitResultOfNamedOperand(const TreePatternNode *N, 136 SmallVectorImpl<unsigned> &ResultOps); 137 void EmitResultLeafAsOperand(const TreePatternNode *N, 138 SmallVectorImpl<unsigned> &ResultOps); 139 void EmitResultInstructionAsOperand(const TreePatternNode *N, 140 SmallVectorImpl<unsigned> &ResultOps); 141 void EmitResultSDNodeXFormAsOperand(const TreePatternNode *N, 142 SmallVectorImpl<unsigned> &ResultOps); 143 }; 144 145 } // end anon namespace. 146 147 MatcherGen::MatcherGen(const PatternToMatch &pattern, 148 const CodeGenDAGPatterns &cgp) 149 : Pattern(pattern), CGP(cgp), NextRecordedOperandNo(0), 150 TheMatcher(nullptr), CurPredicate(nullptr) { 151 // We need to produce the matcher tree for the patterns source pattern. To do 152 // this we need to match the structure as well as the types. To do the type 153 // matching, we want to figure out the fewest number of type checks we need to 154 // emit. For example, if there is only one integer type supported by a 155 // target, there should be no type comparisons at all for integer patterns! 156 // 157 // To figure out the fewest number of type checks needed, clone the pattern, 158 // remove the types, then perform type inference on the pattern as a whole. 159 // If there are unresolved types, emit an explicit check for those types, 160 // apply the type to the tree, then rerun type inference. Iterate until all 161 // types are resolved. 162 // 163 PatWithNoTypes = Pattern.getSrcPattern()->clone(); 164 PatWithNoTypes->RemoveAllTypes(); 165 166 // If there are types that are manifestly known, infer them. 167 InferPossibleTypes(Pattern.ForceMode); 168 } 169 170 /// InferPossibleTypes - As we emit the pattern, we end up generating type 171 /// checks and applying them to the 'PatWithNoTypes' tree. As we do this, we 172 /// want to propagate implied types as far throughout the tree as possible so 173 /// that we avoid doing redundant type checks. This does the type propagation. 174 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { 175 // TP - Get *SOME* tree pattern, we don't care which. It is only used for 176 // diagnostics, which we know are impossible at this point. 177 TreePattern &TP = *CGP.pf_begin()->second; 178 TP.getInfer().CodeGen = true; 179 TP.getInfer().ForceMode = ForceMode; 180 181 bool MadeChange = true; 182 while (MadeChange) 183 MadeChange = PatWithNoTypes->ApplyTypeConstraints(TP, 184 true/*Ignore reg constraints*/); 185 } 186 187 188 /// AddMatcher - Add a matcher node to the current graph we're building. 189 void MatcherGen::AddMatcher(Matcher *NewNode) { 190 if (CurPredicate) 191 CurPredicate->setNext(NewNode); 192 else 193 TheMatcher = NewNode; 194 CurPredicate = NewNode; 195 } 196 197 198 //===----------------------------------------------------------------------===// 199 // Pattern Match Generation 200 //===----------------------------------------------------------------------===// 201 202 /// EmitLeafMatchCode - Generate matching code for leaf nodes. 203 void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) { 204 assert(N->isLeaf() && "Not a leaf?"); 205 206 // Direct match against an integer constant. 207 if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) { 208 // If this is the root of the dag we're matching, we emit a redundant opcode 209 // check to ensure that this gets folded into the normal top-level 210 // OpcodeSwitch. 211 if (N == Pattern.getSrcPattern()) { 212 const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("imm")); 213 AddMatcher(new CheckOpcodeMatcher(NI)); 214 } 215 216 return AddMatcher(new CheckIntegerMatcher(II->getValue())); 217 } 218 219 // An UnsetInit represents a named node without any constraints. 220 if (isa<UnsetInit>(N->getLeafValue())) { 221 assert(N->hasName() && "Unnamed ? leaf"); 222 return; 223 } 224 225 DefInit *DI = dyn_cast<DefInit>(N->getLeafValue()); 226 if (!DI) { 227 errs() << "Unknown leaf kind: " << *N << "\n"; 228 abort(); 229 } 230 231 Record *LeafRec = DI->getDef(); 232 233 // A ValueType leaf node can represent a register when named, or itself when 234 // unnamed. 235 if (LeafRec->isSubClassOf("ValueType")) { 236 // A named ValueType leaf always matches: (add i32:$a, i32:$b). 237 if (N->hasName()) 238 return; 239 // An unnamed ValueType as in (sext_inreg GPR:$foo, i8). 240 return AddMatcher(new CheckValueTypeMatcher(LeafRec->getName())); 241 } 242 243 if (// Handle register references. Nothing to do here, they always match. 244 LeafRec->isSubClassOf("RegisterClass") || 245 LeafRec->isSubClassOf("RegisterOperand") || 246 LeafRec->isSubClassOf("PointerLikeRegClass") || 247 LeafRec->isSubClassOf("SubRegIndex") || 248 // Place holder for SRCVALUE nodes. Nothing to do here. 249 LeafRec->getName() == "srcvalue") 250 return; 251 252 // If we have a physreg reference like (mul gpr:$src, EAX) then we need to 253 // record the register 254 if (LeafRec->isSubClassOf("Register")) { 255 AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName().str(), 256 NextRecordedOperandNo)); 257 PhysRegInputs.push_back(std::make_pair(LeafRec, NextRecordedOperandNo++)); 258 return; 259 } 260 261 if (LeafRec->isSubClassOf("CondCode")) 262 return AddMatcher(new CheckCondCodeMatcher(LeafRec->getName())); 263 264 if (LeafRec->isSubClassOf("ComplexPattern")) { 265 // We can't model ComplexPattern uses that don't have their name taken yet. 266 // The OPC_CheckComplexPattern operation implicitly records the results. 267 if (N->getName().empty()) { 268 std::string S; 269 raw_string_ostream OS(S); 270 OS << "We expect complex pattern uses to have names: " << *N; 271 PrintFatalError(OS.str()); 272 } 273 274 // Remember this ComplexPattern so that we can emit it after all the other 275 // structural matches are done. 276 unsigned InputOperand = VariableMap[N->getName()] - 1; 277 MatchedComplexPatterns.push_back(std::make_pair(N, InputOperand)); 278 return; 279 } 280 281 errs() << "Unknown leaf kind: " << *N << "\n"; 282 abort(); 283 } 284 285 void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N, 286 TreePatternNode *NodeNoTypes, 287 unsigned ForceMode) { 288 assert(!N->isLeaf() && "Not an operator?"); 289 290 if (N->getOperator()->isSubClassOf("ComplexPattern")) { 291 // The "name" of a non-leaf complex pattern (MY_PAT $op1, $op2) is 292 // "MY_PAT:op1:op2". We should already have validated that the uses are 293 // consistent. 294 std::string PatternName = N->getOperator()->getName(); 295 for (unsigned i = 0; i < N->getNumChildren(); ++i) { 296 PatternName += ":"; 297 PatternName += N->getChild(i)->getName(); 298 } 299 300 if (recordUniqueNode(PatternName)) { 301 auto NodeAndOpNum = std::make_pair(N, NextRecordedOperandNo - 1); 302 MatchedComplexPatterns.push_back(NodeAndOpNum); 303 } 304 305 return; 306 } 307 308 const SDNodeInfo &CInfo = CGP.getSDNodeInfo(N->getOperator()); 309 310 // If this is an 'and R, 1234' where the operation is AND/OR and the RHS is 311 // a constant without a predicate fn that has more than one bit set, handle 312 // this as a special case. This is usually for targets that have special 313 // handling of certain large constants (e.g. alpha with it's 8/16/32-bit 314 // handling stuff). Using these instructions is often far more efficient 315 // than materializing the constant. Unfortunately, both the instcombiner 316 // and the dag combiner can often infer that bits are dead, and thus drop 317 // them from the mask in the dag. For example, it might turn 'AND X, 255' 318 // into 'AND X, 254' if it knows the low bit is set. Emit code that checks 319 // to handle this. 320 if ((N->getOperator()->getName() == "and" || 321 N->getOperator()->getName() == "or") && 322 N->getChild(1)->isLeaf() && N->getChild(1)->getPredicateFns().empty() && 323 N->getPredicateFns().empty()) { 324 if (IntInit *II = dyn_cast<IntInit>(N->getChild(1)->getLeafValue())) { 325 if (!isPowerOf2_32(II->getValue())) { // Don't bother with single bits. 326 // If this is at the root of the pattern, we emit a redundant 327 // CheckOpcode so that the following checks get factored properly under 328 // a single opcode check. 329 if (N == Pattern.getSrcPattern()) 330 AddMatcher(new CheckOpcodeMatcher(CInfo)); 331 332 // Emit the CheckAndImm/CheckOrImm node. 333 if (N->getOperator()->getName() == "and") 334 AddMatcher(new CheckAndImmMatcher(II->getValue())); 335 else 336 AddMatcher(new CheckOrImmMatcher(II->getValue())); 337 338 // Match the LHS of the AND as appropriate. 339 AddMatcher(new MoveChildMatcher(0)); 340 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); 341 AddMatcher(new MoveParentMatcher()); 342 return; 343 } 344 } 345 } 346 347 // Check that the current opcode lines up. 348 AddMatcher(new CheckOpcodeMatcher(CInfo)); 349 350 // If this node has memory references (i.e. is a load or store), tell the 351 // interpreter to capture them in the memref array. 352 if (N->NodeHasProperty(SDNPMemOperand, CGP)) 353 AddMatcher(new RecordMemRefMatcher()); 354 355 // If this node has a chain, then the chain is operand #0 is the SDNode, and 356 // the child numbers of the node are all offset by one. 357 unsigned OpNo = 0; 358 if (N->NodeHasProperty(SDNPHasChain, CGP)) { 359 // Record the node and remember it in our chained nodes list. 360 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() + 361 "' chained node", 362 NextRecordedOperandNo)); 363 // Remember all of the input chains our pattern will match. 364 MatchedChainNodes.push_back(NextRecordedOperandNo++); 365 366 // Don't look at the input chain when matching the tree pattern to the 367 // SDNode. 368 OpNo = 1; 369 370 // If this node is not the root and the subtree underneath it produces a 371 // chain, then the result of matching the node is also produce a chain. 372 // Beyond that, this means that we're also folding (at least) the root node 373 // into the node that produce the chain (for example, matching 374 // "(add reg, (load ptr))" as a add_with_memory on X86). This is 375 // problematic, if the 'reg' node also uses the load (say, its chain). 376 // Graphically: 377 // 378 // [LD] 379 // ^ ^ 380 // | \ DAG's like cheese. 381 // / | 382 // / [YY] 383 // | ^ 384 // [XX]--/ 385 // 386 // It would be invalid to fold XX and LD. In this case, folding the two 387 // nodes together would induce a cycle in the DAG, making it a 'cyclic DAG' 388 // To prevent this, we emit a dynamic check for legality before allowing 389 // this to be folded. 390 // 391 const TreePatternNode *Root = Pattern.getSrcPattern(); 392 if (N != Root) { // Not the root of the pattern. 393 // If there is a node between the root and this node, then we definitely 394 // need to emit the check. 395 bool NeedCheck = !Root->hasChild(N); 396 397 // If it *is* an immediate child of the root, we can still need a check if 398 // the root SDNode has multiple inputs. For us, this means that it is an 399 // intrinsic, has multiple operands, or has other inputs like chain or 400 // glue). 401 if (!NeedCheck) { 402 const SDNodeInfo &PInfo = CGP.getSDNodeInfo(Root->getOperator()); 403 NeedCheck = 404 Root->getOperator() == CGP.get_intrinsic_void_sdnode() || 405 Root->getOperator() == CGP.get_intrinsic_w_chain_sdnode() || 406 Root->getOperator() == CGP.get_intrinsic_wo_chain_sdnode() || 407 PInfo.getNumOperands() > 1 || 408 PInfo.hasProperty(SDNPHasChain) || 409 PInfo.hasProperty(SDNPInGlue) || 410 PInfo.hasProperty(SDNPOptInGlue); 411 } 412 413 if (NeedCheck) 414 AddMatcher(new CheckFoldableChainNodeMatcher()); 415 } 416 } 417 418 // If this node has an output glue and isn't the root, remember it. 419 if (N->NodeHasProperty(SDNPOutGlue, CGP) && 420 N != Pattern.getSrcPattern()) { 421 // TODO: This redundantly records nodes with both glues and chains. 422 423 // Record the node and remember it in our chained nodes list. 424 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() + 425 "' glue output node", 426 NextRecordedOperandNo)); 427 } 428 429 // If this node is known to have an input glue or if it *might* have an input 430 // glue, capture it as the glue input of the pattern. 431 if (N->NodeHasProperty(SDNPOptInGlue, CGP) || 432 N->NodeHasProperty(SDNPInGlue, CGP)) 433 AddMatcher(new CaptureGlueInputMatcher()); 434 435 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { 436 // Get the code suitable for matching this child. Move to the child, check 437 // it then move back to the parent. 438 AddMatcher(new MoveChildMatcher(OpNo)); 439 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); 440 AddMatcher(new MoveParentMatcher()); 441 } 442 } 443 444 bool MatcherGen::recordUniqueNode(const std::string &Name) { 445 unsigned &VarMapEntry = VariableMap[Name]; 446 if (VarMapEntry == 0) { 447 // If it is a named node, we must emit a 'Record' opcode. 448 AddMatcher(new RecordMatcher("$" + Name, NextRecordedOperandNo)); 449 VarMapEntry = ++NextRecordedOperandNo; 450 return true; 451 } 452 453 // If we get here, this is a second reference to a specific name. Since 454 // we already have checked that the first reference is valid, we don't 455 // have to recursively match it, just check that it's the same as the 456 // previously named thing. 457 AddMatcher(new CheckSameMatcher(VarMapEntry-1)); 458 return false; 459 } 460 461 void MatcherGen::EmitMatchCode(const TreePatternNode *N, 462 TreePatternNode *NodeNoTypes, 463 unsigned ForceMode) { 464 // If N and NodeNoTypes don't agree on a type, then this is a case where we 465 // need to do a type check. Emit the check, apply the type to NodeNoTypes and 466 // reinfer any correlated types. 467 SmallVector<unsigned, 2> ResultsToTypeCheck; 468 469 for (unsigned i = 0, e = NodeNoTypes->getNumTypes(); i != e; ++i) { 470 if (NodeNoTypes->getExtType(i) == N->getExtType(i)) continue; 471 NodeNoTypes->setType(i, N->getExtType(i)); 472 InferPossibleTypes(ForceMode); 473 ResultsToTypeCheck.push_back(i); 474 } 475 476 // If this node has a name associated with it, capture it in VariableMap. If 477 // we already saw this in the pattern, emit code to verify dagness. 478 if (!N->getName().empty()) 479 if (!recordUniqueNode(N->getName())) 480 return; 481 482 if (N->isLeaf()) 483 EmitLeafMatchCode(N); 484 else 485 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); 486 487 // If there are node predicates for this node, generate their checks. 488 for (unsigned i = 0, e = N->getPredicateFns().size(); i != e; ++i) 489 AddMatcher(new CheckPredicateMatcher(N->getPredicateFns()[i])); 490 491 for (unsigned i = 0, e = ResultsToTypeCheck.size(); i != e; ++i) 492 AddMatcher(new CheckTypeMatcher(N->getSimpleType(ResultsToTypeCheck[i]), 493 ResultsToTypeCheck[i])); 494 } 495 496 /// EmitMatcherCode - Generate the code that matches the predicate of this 497 /// pattern for the specified Variant. If the variant is invalid this returns 498 /// true and does not generate code, if it is valid, it returns false. 499 bool MatcherGen::EmitMatcherCode(unsigned Variant) { 500 // If the root of the pattern is a ComplexPattern and if it is specified to 501 // match some number of root opcodes, these are considered to be our variants. 502 // Depending on which variant we're generating code for, emit the root opcode 503 // check. 504 if (const ComplexPattern *CP = 505 Pattern.getSrcPattern()->getComplexPatternInfo(CGP)) { 506 const std::vector<Record*> &OpNodes = CP->getRootNodes(); 507 assert(!OpNodes.empty() &&"Complex Pattern must specify what it can match"); 508 if (Variant >= OpNodes.size()) return true; 509 510 AddMatcher(new CheckOpcodeMatcher(CGP.getSDNodeInfo(OpNodes[Variant]))); 511 } else { 512 if (Variant != 0) return true; 513 } 514 515 // Emit the matcher for the pattern structure and types. 516 EmitMatchCode(Pattern.getSrcPattern(), PatWithNoTypes.get(), 517 Pattern.ForceMode); 518 519 // If the pattern has a predicate on it (e.g. only enabled when a subtarget 520 // feature is around, do the check). 521 if (!Pattern.getPredicateCheck().empty()) 522 AddMatcher(new CheckPatternPredicateMatcher(Pattern.getPredicateCheck())); 523 524 // Now that we've completed the structural type match, emit any ComplexPattern 525 // checks (e.g. addrmode matches). We emit this after the structural match 526 // because they are generally more expensive to evaluate and more difficult to 527 // factor. 528 for (unsigned i = 0, e = MatchedComplexPatterns.size(); i != e; ++i) { 529 auto N = MatchedComplexPatterns[i].first; 530 531 // Remember where the results of this match get stuck. 532 if (N->isLeaf()) { 533 NamedComplexPatternOperands[N->getName()] = NextRecordedOperandNo + 1; 534 } else { 535 unsigned CurOp = NextRecordedOperandNo; 536 for (unsigned i = 0; i < N->getNumChildren(); ++i) { 537 NamedComplexPatternOperands[N->getChild(i)->getName()] = CurOp + 1; 538 CurOp += N->getChild(i)->getNumMIResults(CGP); 539 } 540 } 541 542 // Get the slot we recorded the value in from the name on the node. 543 unsigned RecNodeEntry = MatchedComplexPatterns[i].second; 544 545 const ComplexPattern &CP = *N->getComplexPatternInfo(CGP); 546 547 // Emit a CheckComplexPat operation, which does the match (aborting if it 548 // fails) and pushes the matched operands onto the recorded nodes list. 549 AddMatcher(new CheckComplexPatMatcher(CP, RecNodeEntry, 550 N->getName(), NextRecordedOperandNo)); 551 552 // Record the right number of operands. 553 NextRecordedOperandNo += CP.getNumOperands(); 554 if (CP.hasProperty(SDNPHasChain)) { 555 // If the complex pattern has a chain, then we need to keep track of the 556 // fact that we just recorded a chain input. The chain input will be 557 // matched as the last operand of the predicate if it was successful. 558 ++NextRecordedOperandNo; // Chained node operand. 559 560 // It is the last operand recorded. 561 assert(NextRecordedOperandNo > 1 && 562 "Should have recorded input/result chains at least!"); 563 MatchedChainNodes.push_back(NextRecordedOperandNo-1); 564 } 565 566 // TODO: Complex patterns can't have output glues, if they did, we'd want 567 // to record them. 568 } 569 570 return false; 571 } 572 573 574 //===----------------------------------------------------------------------===// 575 // Node Result Generation 576 //===----------------------------------------------------------------------===// 577 578 void MatcherGen::EmitResultOfNamedOperand(const TreePatternNode *N, 579 SmallVectorImpl<unsigned> &ResultOps){ 580 assert(!N->getName().empty() && "Operand not named!"); 581 582 if (unsigned SlotNo = NamedComplexPatternOperands[N->getName()]) { 583 // Complex operands have already been completely selected, just find the 584 // right slot ant add the arguments directly. 585 for (unsigned i = 0; i < N->getNumMIResults(CGP); ++i) 586 ResultOps.push_back(SlotNo - 1 + i); 587 588 return; 589 } 590 591 unsigned SlotNo = getNamedArgumentSlot(N->getName()); 592 593 // If this is an 'imm' or 'fpimm' node, make sure to convert it to the target 594 // version of the immediate so that it doesn't get selected due to some other 595 // node use. 596 if (!N->isLeaf()) { 597 StringRef OperatorName = N->getOperator()->getName(); 598 if (OperatorName == "imm" || OperatorName == "fpimm") { 599 AddMatcher(new EmitConvertToTargetMatcher(SlotNo)); 600 ResultOps.push_back(NextRecordedOperandNo++); 601 return; 602 } 603 } 604 605 for (unsigned i = 0; i < N->getNumMIResults(CGP); ++i) 606 ResultOps.push_back(SlotNo + i); 607 } 608 609 void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N, 610 SmallVectorImpl<unsigned> &ResultOps) { 611 assert(N->isLeaf() && "Must be a leaf"); 612 613 if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) { 614 AddMatcher(new EmitIntegerMatcher(II->getValue(), N->getSimpleType(0))); 615 ResultOps.push_back(NextRecordedOperandNo++); 616 return; 617 } 618 619 // If this is an explicit register reference, handle it. 620 if (DefInit *DI = dyn_cast<DefInit>(N->getLeafValue())) { 621 Record *Def = DI->getDef(); 622 if (Def->isSubClassOf("Register")) { 623 const CodeGenRegister *Reg = 624 CGP.getTargetInfo().getRegBank().getReg(Def); 625 AddMatcher(new EmitRegisterMatcher(Reg, N->getSimpleType(0))); 626 ResultOps.push_back(NextRecordedOperandNo++); 627 return; 628 } 629 630 if (Def->getName() == "zero_reg") { 631 AddMatcher(new EmitRegisterMatcher(nullptr, N->getSimpleType(0))); 632 ResultOps.push_back(NextRecordedOperandNo++); 633 return; 634 } 635 636 // Handle a reference to a register class. This is used 637 // in COPY_TO_SUBREG instructions. 638 if (Def->isSubClassOf("RegisterOperand")) 639 Def = Def->getValueAsDef("RegClass"); 640 if (Def->isSubClassOf("RegisterClass")) { 641 std::string Value = getQualifiedName(Def) + "RegClassID"; 642 AddMatcher(new EmitStringIntegerMatcher(Value, MVT::i32)); 643 ResultOps.push_back(NextRecordedOperandNo++); 644 return; 645 } 646 647 // Handle a subregister index. This is used for INSERT_SUBREG etc. 648 if (Def->isSubClassOf("SubRegIndex")) { 649 std::string Value = getQualifiedName(Def); 650 AddMatcher(new EmitStringIntegerMatcher(Value, MVT::i32)); 651 ResultOps.push_back(NextRecordedOperandNo++); 652 return; 653 } 654 } 655 656 errs() << "unhandled leaf node: \n"; 657 N->dump(); 658 } 659 660 static bool 661 mayInstNodeLoadOrStore(const TreePatternNode *N, 662 const CodeGenDAGPatterns &CGP) { 663 Record *Op = N->getOperator(); 664 const CodeGenTarget &CGT = CGP.getTargetInfo(); 665 CodeGenInstruction &II = CGT.getInstruction(Op); 666 return II.mayLoad || II.mayStore; 667 } 668 669 static unsigned 670 numNodesThatMayLoadOrStore(const TreePatternNode *N, 671 const CodeGenDAGPatterns &CGP) { 672 if (N->isLeaf()) 673 return 0; 674 675 Record *OpRec = N->getOperator(); 676 if (!OpRec->isSubClassOf("Instruction")) 677 return 0; 678 679 unsigned Count = 0; 680 if (mayInstNodeLoadOrStore(N, CGP)) 681 ++Count; 682 683 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) 684 Count += numNodesThatMayLoadOrStore(N->getChild(i), CGP); 685 686 return Count; 687 } 688 689 void MatcherGen:: 690 EmitResultInstructionAsOperand(const TreePatternNode *N, 691 SmallVectorImpl<unsigned> &OutputOps) { 692 Record *Op = N->getOperator(); 693 const CodeGenTarget &CGT = CGP.getTargetInfo(); 694 CodeGenInstruction &II = CGT.getInstruction(Op); 695 const DAGInstruction &Inst = CGP.getInstruction(Op); 696 697 bool isRoot = N == Pattern.getDstPattern(); 698 699 // TreeHasOutGlue - True if this tree has glue. 700 bool TreeHasInGlue = false, TreeHasOutGlue = false; 701 if (isRoot) { 702 const TreePatternNode *SrcPat = Pattern.getSrcPattern(); 703 TreeHasInGlue = SrcPat->TreeHasProperty(SDNPOptInGlue, CGP) || 704 SrcPat->TreeHasProperty(SDNPInGlue, CGP); 705 706 // FIXME2: this is checking the entire pattern, not just the node in 707 // question, doing this just for the root seems like a total hack. 708 TreeHasOutGlue = SrcPat->TreeHasProperty(SDNPOutGlue, CGP); 709 } 710 711 // NumResults - This is the number of results produced by the instruction in 712 // the "outs" list. 713 unsigned NumResults = Inst.getNumResults(); 714 715 // Number of operands we know the output instruction must have. If it is 716 // variadic, we could have more operands. 717 unsigned NumFixedOperands = II.Operands.size(); 718 719 SmallVector<unsigned, 8> InstOps; 720 721 // Loop over all of the fixed operands of the instruction pattern, emitting 722 // code to fill them all in. The node 'N' usually has number children equal to 723 // the number of input operands of the instruction. However, in cases where 724 // there are predicate operands for an instruction, we need to fill in the 725 // 'execute always' values. Match up the node operands to the instruction 726 // operands to do this. 727 unsigned ChildNo = 0; 728 for (unsigned InstOpNo = NumResults, e = NumFixedOperands; 729 InstOpNo != e; ++InstOpNo) { 730 // Determine what to emit for this operand. 731 Record *OperandNode = II.Operands[InstOpNo].Rec; 732 if (OperandNode->isSubClassOf("OperandWithDefaultOps") && 733 !CGP.getDefaultOperand(OperandNode).DefaultOps.empty()) { 734 // This is a predicate or optional def operand; emit the 735 // 'default ops' operands. 736 const DAGDefaultOperand &DefaultOp 737 = CGP.getDefaultOperand(OperandNode); 738 for (unsigned i = 0, e = DefaultOp.DefaultOps.size(); i != e; ++i) 739 EmitResultOperand(DefaultOp.DefaultOps[i].get(), InstOps); 740 continue; 741 } 742 743 // Otherwise this is a normal operand or a predicate operand without 744 // 'execute always'; emit it. 745 746 // For operands with multiple sub-operands we may need to emit 747 // multiple child patterns to cover them all. However, ComplexPattern 748 // children may themselves emit multiple MI operands. 749 unsigned NumSubOps = 1; 750 if (OperandNode->isSubClassOf("Operand")) { 751 DagInit *MIOpInfo = OperandNode->getValueAsDag("MIOperandInfo"); 752 if (unsigned NumArgs = MIOpInfo->getNumArgs()) 753 NumSubOps = NumArgs; 754 } 755 756 unsigned FinalNumOps = InstOps.size() + NumSubOps; 757 while (InstOps.size() < FinalNumOps) { 758 const TreePatternNode *Child = N->getChild(ChildNo); 759 unsigned BeforeAddingNumOps = InstOps.size(); 760 EmitResultOperand(Child, InstOps); 761 assert(InstOps.size() > BeforeAddingNumOps && "Didn't add any operands"); 762 763 // If the operand is an instruction and it produced multiple results, just 764 // take the first one. 765 if (!Child->isLeaf() && Child->getOperator()->isSubClassOf("Instruction")) 766 InstOps.resize(BeforeAddingNumOps+1); 767 768 ++ChildNo; 769 } 770 } 771 772 // If this is a variadic output instruction (i.e. REG_SEQUENCE), we can't 773 // expand suboperands, use default operands, or other features determined from 774 // the CodeGenInstruction after the fixed operands, which were handled 775 // above. Emit the remaining instructions implicitly added by the use for 776 // variable_ops. 777 if (II.Operands.isVariadic) { 778 for (unsigned I = ChildNo, E = N->getNumChildren(); I < E; ++I) 779 EmitResultOperand(N->getChild(I), InstOps); 780 } 781 782 // If this node has input glue or explicitly specified input physregs, we 783 // need to add chained and glued copyfromreg nodes and materialize the glue 784 // input. 785 if (isRoot && !PhysRegInputs.empty()) { 786 // Emit all of the CopyToReg nodes for the input physical registers. These 787 // occur in patterns like (mul:i8 AL:i8, GR8:i8:$src). 788 for (unsigned i = 0, e = PhysRegInputs.size(); i != e; ++i) 789 AddMatcher(new EmitCopyToRegMatcher(PhysRegInputs[i].second, 790 PhysRegInputs[i].first)); 791 // Even if the node has no other glue inputs, the resultant node must be 792 // glued to the CopyFromReg nodes we just generated. 793 TreeHasInGlue = true; 794 } 795 796 // Result order: node results, chain, glue 797 798 // Determine the result types. 799 SmallVector<MVT::SimpleValueType, 4> ResultVTs; 800 for (unsigned i = 0, e = N->getNumTypes(); i != e; ++i) 801 ResultVTs.push_back(N->getSimpleType(i)); 802 803 // If this is the root instruction of a pattern that has physical registers in 804 // its result pattern, add output VTs for them. For example, X86 has: 805 // (set AL, (mul ...)) 806 // This also handles implicit results like: 807 // (implicit EFLAGS) 808 if (isRoot && !Pattern.getDstRegs().empty()) { 809 // If the root came from an implicit def in the instruction handling stuff, 810 // don't re-add it. 811 Record *HandledReg = nullptr; 812 if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other) 813 HandledReg = II.ImplicitDefs[0]; 814 815 for (Record *Reg : Pattern.getDstRegs()) { 816 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue; 817 ResultVTs.push_back(getRegisterValueType(Reg, CGT)); 818 } 819 } 820 821 // If this is the root of the pattern and the pattern we're matching includes 822 // a node that is variadic, mark the generated node as variadic so that it 823 // gets the excess operands from the input DAG. 824 int NumFixedArityOperands = -1; 825 if (isRoot && 826 Pattern.getSrcPattern()->NodeHasProperty(SDNPVariadic, CGP)) 827 NumFixedArityOperands = Pattern.getSrcPattern()->getNumChildren(); 828 829 // If this is the root node and multiple matched nodes in the input pattern 830 // have MemRefs in them, have the interpreter collect them and plop them onto 831 // this node. If there is just one node with MemRefs, leave them on that node 832 // even if it is not the root. 833 // 834 // FIXME3: This is actively incorrect for result patterns with multiple 835 // memory-referencing instructions. 836 bool PatternHasMemOperands = 837 Pattern.getSrcPattern()->TreeHasProperty(SDNPMemOperand, CGP); 838 839 bool NodeHasMemRefs = false; 840 if (PatternHasMemOperands) { 841 unsigned NumNodesThatLoadOrStore = 842 numNodesThatMayLoadOrStore(Pattern.getDstPattern(), CGP); 843 bool NodeIsUniqueLoadOrStore = mayInstNodeLoadOrStore(N, CGP) && 844 NumNodesThatLoadOrStore == 1; 845 NodeHasMemRefs = 846 NodeIsUniqueLoadOrStore || (isRoot && (mayInstNodeLoadOrStore(N, CGP) || 847 NumNodesThatLoadOrStore != 1)); 848 } 849 850 // Determine whether we need to attach a chain to this node. 851 bool NodeHasChain = false; 852 if (Pattern.getSrcPattern()->TreeHasProperty(SDNPHasChain, CGP)) { 853 // For some instructions, we were able to infer from the pattern whether 854 // they should have a chain. Otherwise, attach the chain to the root. 855 // 856 // FIXME2: This is extremely dubious for several reasons, not the least of 857 // which it gives special status to instructions with patterns that Pat<> 858 // nodes can't duplicate. 859 if (II.hasChain_Inferred) 860 NodeHasChain = II.hasChain; 861 else 862 NodeHasChain = isRoot; 863 // Instructions which load and store from memory should have a chain, 864 // regardless of whether they happen to have a pattern saying so. 865 if (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad || 866 II.hasSideEffects) 867 NodeHasChain = true; 868 } 869 870 assert((!ResultVTs.empty() || TreeHasOutGlue || NodeHasChain) && 871 "Node has no result"); 872 873 AddMatcher(new EmitNodeMatcher(II.Namespace.str()+"::"+II.TheDef->getName().str(), 874 ResultVTs, InstOps, 875 NodeHasChain, TreeHasInGlue, TreeHasOutGlue, 876 NodeHasMemRefs, NumFixedArityOperands, 877 NextRecordedOperandNo)); 878 879 // The non-chain and non-glue results of the newly emitted node get recorded. 880 for (unsigned i = 0, e = ResultVTs.size(); i != e; ++i) { 881 if (ResultVTs[i] == MVT::Other || ResultVTs[i] == MVT::Glue) break; 882 OutputOps.push_back(NextRecordedOperandNo++); 883 } 884 } 885 886 void MatcherGen:: 887 EmitResultSDNodeXFormAsOperand(const TreePatternNode *N, 888 SmallVectorImpl<unsigned> &ResultOps) { 889 assert(N->getOperator()->isSubClassOf("SDNodeXForm") && "Not SDNodeXForm?"); 890 891 // Emit the operand. 892 SmallVector<unsigned, 8> InputOps; 893 894 // FIXME2: Could easily generalize this to support multiple inputs and outputs 895 // to the SDNodeXForm. For now we just support one input and one output like 896 // the old instruction selector. 897 assert(N->getNumChildren() == 1); 898 EmitResultOperand(N->getChild(0), InputOps); 899 900 // The input currently must have produced exactly one result. 901 assert(InputOps.size() == 1 && "Unexpected input to SDNodeXForm"); 902 903 AddMatcher(new EmitNodeXFormMatcher(InputOps[0], N->getOperator())); 904 ResultOps.push_back(NextRecordedOperandNo++); 905 } 906 907 void MatcherGen::EmitResultOperand(const TreePatternNode *N, 908 SmallVectorImpl<unsigned> &ResultOps) { 909 // This is something selected from the pattern we matched. 910 if (!N->getName().empty()) 911 return EmitResultOfNamedOperand(N, ResultOps); 912 913 if (N->isLeaf()) 914 return EmitResultLeafAsOperand(N, ResultOps); 915 916 Record *OpRec = N->getOperator(); 917 if (OpRec->isSubClassOf("Instruction")) 918 return EmitResultInstructionAsOperand(N, ResultOps); 919 if (OpRec->isSubClassOf("SDNodeXForm")) 920 return EmitResultSDNodeXFormAsOperand(N, ResultOps); 921 errs() << "Unknown result node to emit code for: " << *N << '\n'; 922 PrintFatalError("Unknown node in result pattern!"); 923 } 924 925 void MatcherGen::EmitResultCode() { 926 // Patterns that match nodes with (potentially multiple) chain inputs have to 927 // merge them together into a token factor. This informs the generated code 928 // what all the chained nodes are. 929 if (!MatchedChainNodes.empty()) 930 AddMatcher(new EmitMergeInputChainsMatcher(MatchedChainNodes)); 931 932 // Codegen the root of the result pattern, capturing the resulting values. 933 SmallVector<unsigned, 8> Ops; 934 EmitResultOperand(Pattern.getDstPattern(), Ops); 935 936 // At this point, we have however many values the result pattern produces. 937 // However, the input pattern might not need all of these. If there are 938 // excess values at the end (such as implicit defs of condition codes etc) 939 // just lop them off. This doesn't need to worry about glue or chains, just 940 // explicit results. 941 // 942 unsigned NumSrcResults = Pattern.getSrcPattern()->getNumTypes(); 943 944 // If the pattern also has (implicit) results, count them as well. 945 if (!Pattern.getDstRegs().empty()) { 946 // If the root came from an implicit def in the instruction handling stuff, 947 // don't re-add it. 948 Record *HandledReg = nullptr; 949 const TreePatternNode *DstPat = Pattern.getDstPattern(); 950 if (!DstPat->isLeaf() &&DstPat->getOperator()->isSubClassOf("Instruction")){ 951 const CodeGenTarget &CGT = CGP.getTargetInfo(); 952 CodeGenInstruction &II = CGT.getInstruction(DstPat->getOperator()); 953 954 if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other) 955 HandledReg = II.ImplicitDefs[0]; 956 } 957 958 for (Record *Reg : Pattern.getDstRegs()) { 959 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue; 960 ++NumSrcResults; 961 } 962 } 963 964 assert(Ops.size() >= NumSrcResults && "Didn't provide enough results"); 965 Ops.resize(NumSrcResults); 966 967 AddMatcher(new CompleteMatchMatcher(Ops, Pattern)); 968 } 969 970 971 /// ConvertPatternToMatcher - Create the matcher for the specified pattern with 972 /// the specified variant. If the variant number is invalid, this returns null. 973 Matcher *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern, 974 unsigned Variant, 975 const CodeGenDAGPatterns &CGP) { 976 MatcherGen Gen(Pattern, CGP); 977 978 // Generate the code for the matcher. 979 if (Gen.EmitMatcherCode(Variant)) 980 return nullptr; 981 982 // FIXME2: Kill extra MoveParent commands at the end of the matcher sequence. 983 // FIXME2: Split result code out to another table, and make the matcher end 984 // with an "Emit <index>" command. This allows result generation stuff to be 985 // shared and factored? 986 987 // If the match succeeds, then we generate Pattern. 988 Gen.EmitResultCode(); 989 990 // Unconditional match. 991 return Gen.GetMatcher(); 992 } 993