1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2009 4 * Sergey Kubushyn, himself, ksi (at) koi8.net 5 * 6 * Changes for unified multibus/multiadapter I2C support. 7 * 8 * (C) Copyright 2001 9 * Gerald Van Baren, Custom IDEAS, vanbaren (at) cideas.com. 10 */ 11 12 /* 13 * I2C Functions similar to the standard memory functions. 14 * 15 * There are several parameters in many of the commands that bear further 16 * explanations: 17 * 18 * {i2c_chip} is the I2C chip address (the first byte sent on the bus). 19 * Each I2C chip on the bus has a unique address. On the I2C data bus, 20 * the address is the upper seven bits and the LSB is the "read/write" 21 * bit. Note that the {i2c_chip} address specified on the command 22 * line is not shifted up: e.g. a typical EEPROM memory chip may have 23 * an I2C address of 0x50, but the data put on the bus will be 0xA0 24 * for write and 0xA1 for read. This "non shifted" address notation 25 * matches at least half of the data sheets :-/. 26 * 27 * {addr} is the address (or offset) within the chip. Small memory 28 * chips have 8 bit addresses. Large memory chips have 16 bit 29 * addresses. Other memory chips have 9, 10, or 11 bit addresses. 30 * Many non-memory chips have multiple registers and {addr} is used 31 * as the register index. Some non-memory chips have only one register 32 * and therefore don't need any {addr} parameter. 33 * 34 * The default {addr} parameter is one byte (.1) which works well for 35 * memories and registers with 8 bits of address space. 36 * 37 * You can specify the length of the {addr} field with the optional .0, 38 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are 39 * manipulating a single register device which doesn't use an address 40 * field, use "0.0" for the address and the ".0" length field will 41 * suppress the address in the I2C data stream. This also works for 42 * successive reads using the I2C auto-incrementing memory pointer. 43 * 44 * If you are manipulating a large memory with 2-byte addresses, use 45 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). 46 * 47 * Then there are the unfortunate memory chips that spill the most 48 * significant 1, 2, or 3 bits of address into the chip address byte. 49 * This effectively makes one chip (logically) look like 2, 4, or 50 * 8 chips. This is handled (awkwardly) by #defining 51 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the 52 * {addr} field (since .1 is the default, it doesn't actually have to 53 * be specified). Examples: given a memory chip at I2C chip address 54 * 0x50, the following would happen... 55 * i2c md 50 0 10 display 16 bytes starting at 0x000 56 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> 57 * i2c md 50 100 10 display 16 bytes starting at 0x100 58 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> 59 * i2c md 50 210 10 display 16 bytes starting at 0x210 60 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> 61 * This is awfully ugly. It would be nice if someone would think up 62 * a better way of handling this. 63 * 64 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd (at) denx.de). 65 */ 66 67 #include <common.h> 68 #include <bootretry.h> 69 #include <cli.h> 70 #include <command.h> 71 #include <console.h> 72 #include <dm.h> 73 #include <edid.h> 74 #include <environment.h> 75 #include <errno.h> 76 #include <i2c.h> 77 #include <malloc.h> 78 #include <asm/byteorder.h> 79 #include <linux/compiler.h> 80 81 /* Display values from last command. 82 * Memory modify remembered values are different from display memory. 83 */ 84 static uint i2c_dp_last_chip; 85 static uint i2c_dp_last_addr; 86 static uint i2c_dp_last_alen; 87 static uint i2c_dp_last_length = 0x10; 88 89 static uint i2c_mm_last_chip; 90 static uint i2c_mm_last_addr; 91 static uint i2c_mm_last_alen; 92 93 /* If only one I2C bus is present, the list of devices to ignore when 94 * the probe command is issued is represented by a 1D array of addresses. 95 * When multiple buses are present, the list is an array of bus-address 96 * pairs. The following macros take care of this */ 97 98 #if defined(CONFIG_SYS_I2C_NOPROBES) 99 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 100 static struct 101 { 102 uchar bus; 103 uchar addr; 104 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 105 #define GET_BUS_NUM i2c_get_bus_num() 106 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) 107 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) 108 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr 109 #else /* single bus */ 110 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 111 #define GET_BUS_NUM 0 112 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ 113 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) 114 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] 115 #endif /* defined(CONFIG_SYS_I2C) */ 116 #endif 117 118 #define DISP_LINE_LEN 16 119 120 /* 121 * Default for driver model is to use the chip's existing address length. 122 * For legacy code, this is not stored, so we need to use a suitable 123 * default. 124 */ 125 #ifdef CONFIG_DM_I2C 126 #define DEFAULT_ADDR_LEN (-1) 127 #else 128 #define DEFAULT_ADDR_LEN 1 129 #endif 130 131 #ifdef CONFIG_DM_I2C 132 static struct udevice *i2c_cur_bus; 133 134 static int cmd_i2c_set_bus_num(unsigned int busnum) 135 { 136 struct udevice *bus; 137 int ret; 138 139 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); 140 if (ret) { 141 debug("%s: No bus %d\n", __func__, busnum); 142 return ret; 143 } 144 i2c_cur_bus = bus; 145 146 return 0; 147 } 148 149 static int i2c_get_cur_bus(struct udevice **busp) 150 { 151 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM 152 if (!i2c_cur_bus) { 153 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) { 154 printf("Default I2C bus %d not found\n", 155 CONFIG_I2C_DEFAULT_BUS_NUMBER); 156 return -ENODEV; 157 } 158 } 159 #endif 160 161 if (!i2c_cur_bus) { 162 puts("No I2C bus selected\n"); 163 return -ENODEV; 164 } 165 *busp = i2c_cur_bus; 166 167 return 0; 168 } 169 170 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp) 171 { 172 struct udevice *bus; 173 int ret; 174 175 ret = i2c_get_cur_bus(&bus); 176 if (ret) 177 return ret; 178 179 return i2c_get_chip(bus, chip_addr, 1, devp); 180 } 181 182 #endif 183 184 /** 185 * i2c_init_board() - Board-specific I2C bus init 186 * 187 * This function is the default no-op implementation of I2C bus 188 * initialization. This function can be overridden by board-specific 189 * implementation if needed. 190 */ 191 __weak 192 void i2c_init_board(void) 193 { 194 } 195 196 /* TODO: Implement architecture-specific get/set functions */ 197 198 /** 199 * i2c_get_bus_speed() - Return I2C bus speed 200 * 201 * This function is the default implementation of function for retrieveing 202 * the current I2C bus speed in Hz. 203 * 204 * A driver implementing runtime switching of I2C bus speed must override 205 * this function to report the speed correctly. Simple or legacy drivers 206 * can use this fallback. 207 * 208 * Returns I2C bus speed in Hz. 209 */ 210 #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C) 211 /* 212 * TODO: Implement architecture-specific get/set functions 213 * Should go away, if we switched completely to new multibus support 214 */ 215 __weak 216 unsigned int i2c_get_bus_speed(void) 217 { 218 return CONFIG_SYS_I2C_SPEED; 219 } 220 221 /** 222 * i2c_set_bus_speed() - Configure I2C bus speed 223 * @speed: Newly set speed of the I2C bus in Hz 224 * 225 * This function is the default implementation of function for setting 226 * the I2C bus speed in Hz. 227 * 228 * A driver implementing runtime switching of I2C bus speed must override 229 * this function to report the speed correctly. Simple or legacy drivers 230 * can use this fallback. 231 * 232 * Returns zero on success, negative value on error. 233 */ 234 __weak 235 int i2c_set_bus_speed(unsigned int speed) 236 { 237 if (speed != CONFIG_SYS_I2C_SPEED) 238 return -1; 239 240 return 0; 241 } 242 #endif 243 244 /** 245 * get_alen() - Small parser helper function to get address length 246 * 247 * Returns the address length. 248 */ 249 static uint get_alen(char *arg, int default_len) 250 { 251 int j; 252 int alen; 253 254 alen = default_len; 255 for (j = 0; j < 8; j++) { 256 if (arg[j] == '.') { 257 alen = arg[j+1] - '0'; 258 break; 259 } else if (arg[j] == '\0') 260 break; 261 } 262 return alen; 263 } 264 265 enum i2c_err_op { 266 I2C_ERR_READ, 267 I2C_ERR_WRITE, 268 }; 269 270 static int i2c_report_err(int ret, enum i2c_err_op op) 271 { 272 printf("Error %s the chip: %d\n", 273 op == I2C_ERR_READ ? "reading" : "writing", ret); 274 275 return CMD_RET_FAILURE; 276 } 277 278 /** 279 * do_i2c_read() - Handle the "i2c read" command-line command 280 * @cmdtp: Command data struct pointer 281 * @flag: Command flag 282 * @argc: Command-line argument count 283 * @argv: Array of command-line arguments 284 * 285 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 286 * on error. 287 * 288 * Syntax: 289 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} 290 */ 291 static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 292 { 293 uint chip; 294 uint devaddr, length; 295 int alen; 296 u_char *memaddr; 297 int ret; 298 #ifdef CONFIG_DM_I2C 299 struct udevice *dev; 300 #endif 301 302 if (argc != 5) 303 return CMD_RET_USAGE; 304 305 /* 306 * I2C chip address 307 */ 308 chip = simple_strtoul(argv[1], NULL, 16); 309 310 /* 311 * I2C data address within the chip. This can be 1 or 312 * 2 bytes long. Some day it might be 3 bytes long :-). 313 */ 314 devaddr = simple_strtoul(argv[2], NULL, 16); 315 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 316 if (alen > 3) 317 return CMD_RET_USAGE; 318 319 /* 320 * Length is the number of objects, not number of bytes. 321 */ 322 length = simple_strtoul(argv[3], NULL, 16); 323 324 /* 325 * memaddr is the address where to store things in memory 326 */ 327 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); 328 329 #ifdef CONFIG_DM_I2C 330 ret = i2c_get_cur_bus_chip(chip, &dev); 331 if (!ret && alen != -1) 332 ret = i2c_set_chip_offset_len(dev, alen); 333 if (!ret) 334 ret = dm_i2c_read(dev, devaddr, memaddr, length); 335 #else 336 ret = i2c_read(chip, devaddr, alen, memaddr, length); 337 #endif 338 if (ret) 339 return i2c_report_err(ret, I2C_ERR_READ); 340 341 return 0; 342 } 343 344 static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 345 { 346 uint chip; 347 uint devaddr, length; 348 int alen; 349 u_char *memaddr; 350 int ret; 351 #ifdef CONFIG_DM_I2C 352 struct udevice *dev; 353 struct dm_i2c_chip *i2c_chip; 354 #endif 355 356 if ((argc < 5) || (argc > 6)) 357 return cmd_usage(cmdtp); 358 359 /* 360 * memaddr is the address where to store things in memory 361 */ 362 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); 363 364 /* 365 * I2C chip address 366 */ 367 chip = simple_strtoul(argv[2], NULL, 16); 368 369 /* 370 * I2C data address within the chip. This can be 1 or 371 * 2 bytes long. Some day it might be 3 bytes long :-). 372 */ 373 devaddr = simple_strtoul(argv[3], NULL, 16); 374 alen = get_alen(argv[3], DEFAULT_ADDR_LEN); 375 if (alen > 3) 376 return cmd_usage(cmdtp); 377 378 /* 379 * Length is the number of bytes. 380 */ 381 length = simple_strtoul(argv[4], NULL, 16); 382 383 #ifdef CONFIG_DM_I2C 384 ret = i2c_get_cur_bus_chip(chip, &dev); 385 if (!ret && alen != -1) 386 ret = i2c_set_chip_offset_len(dev, alen); 387 if (ret) 388 return i2c_report_err(ret, I2C_ERR_WRITE); 389 i2c_chip = dev_get_parent_platdata(dev); 390 if (!i2c_chip) 391 return i2c_report_err(ret, I2C_ERR_WRITE); 392 #endif 393 394 if (argc == 6 && !strcmp(argv[5], "-s")) { 395 /* 396 * Write all bytes in a single I2C transaction. If the target 397 * device is an EEPROM, it is your responsibility to not cross 398 * a page boundary. No write delay upon completion, take this 399 * into account if linking commands. 400 */ 401 #ifdef CONFIG_DM_I2C 402 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS; 403 ret = dm_i2c_write(dev, devaddr, memaddr, length); 404 #else 405 ret = i2c_write(chip, devaddr, alen, memaddr, length); 406 #endif 407 if (ret) 408 return i2c_report_err(ret, I2C_ERR_WRITE); 409 } else { 410 /* 411 * Repeated addressing - perform <length> separate 412 * write transactions of one byte each 413 */ 414 while (length-- > 0) { 415 #ifdef CONFIG_DM_I2C 416 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS; 417 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); 418 #else 419 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); 420 #endif 421 if (ret) 422 return i2c_report_err(ret, I2C_ERR_WRITE); 423 /* 424 * No write delay with FRAM devices. 425 */ 426 #if !defined(CONFIG_SYS_I2C_FRAM) 427 udelay(11000); 428 #endif 429 } 430 } 431 return 0; 432 } 433 434 #ifdef CONFIG_DM_I2C 435 static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc, 436 char *const argv[]) 437 { 438 struct udevice *dev; 439 uint flags; 440 int chip; 441 int ret; 442 443 if (argc < 2) 444 return CMD_RET_USAGE; 445 446 chip = simple_strtoul(argv[1], NULL, 16); 447 ret = i2c_get_cur_bus_chip(chip, &dev); 448 if (ret) 449 return i2c_report_err(ret, I2C_ERR_READ); 450 451 if (argc > 2) { 452 flags = simple_strtoul(argv[2], NULL, 16); 453 ret = i2c_set_chip_flags(dev, flags); 454 } else { 455 ret = i2c_get_chip_flags(dev, &flags); 456 if (!ret) 457 printf("%x\n", flags); 458 } 459 if (ret) 460 return i2c_report_err(ret, I2C_ERR_READ); 461 462 return 0; 463 } 464 465 static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 466 { 467 struct udevice *dev; 468 uint olen; 469 int chip; 470 int ret; 471 472 if (argc < 2) 473 return CMD_RET_USAGE; 474 475 chip = simple_strtoul(argv[1], NULL, 16); 476 ret = i2c_get_cur_bus_chip(chip, &dev); 477 if (ret) 478 return i2c_report_err(ret, I2C_ERR_READ); 479 480 if (argc > 2) { 481 olen = simple_strtoul(argv[2], NULL, 16); 482 ret = i2c_set_chip_offset_len(dev, olen); 483 } else { 484 ret = i2c_get_chip_offset_len(dev); 485 if (ret >= 0) { 486 printf("%x\n", ret); 487 ret = 0; 488 } 489 } 490 if (ret) 491 return i2c_report_err(ret, I2C_ERR_READ); 492 493 return 0; 494 } 495 #endif 496 497 /** 498 * do_i2c_md() - Handle the "i2c md" command-line command 499 * @cmdtp: Command data struct pointer 500 * @flag: Command flag 501 * @argc: Command-line argument count 502 * @argv: Array of command-line arguments 503 * 504 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 505 * on error. 506 * 507 * Syntax: 508 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} 509 */ 510 static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 511 { 512 uint chip; 513 uint addr, length; 514 int alen; 515 int j, nbytes, linebytes; 516 int ret; 517 #ifdef CONFIG_DM_I2C 518 struct udevice *dev; 519 #endif 520 521 /* We use the last specified parameters, unless new ones are 522 * entered. 523 */ 524 chip = i2c_dp_last_chip; 525 addr = i2c_dp_last_addr; 526 alen = i2c_dp_last_alen; 527 length = i2c_dp_last_length; 528 529 if (argc < 3) 530 return CMD_RET_USAGE; 531 532 if ((flag & CMD_FLAG_REPEAT) == 0) { 533 /* 534 * New command specified. 535 */ 536 537 /* 538 * I2C chip address 539 */ 540 chip = simple_strtoul(argv[1], NULL, 16); 541 542 /* 543 * I2C data address within the chip. This can be 1 or 544 * 2 bytes long. Some day it might be 3 bytes long :-). 545 */ 546 addr = simple_strtoul(argv[2], NULL, 16); 547 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 548 if (alen > 3) 549 return CMD_RET_USAGE; 550 551 /* 552 * If another parameter, it is the length to display. 553 * Length is the number of objects, not number of bytes. 554 */ 555 if (argc > 3) 556 length = simple_strtoul(argv[3], NULL, 16); 557 } 558 559 #ifdef CONFIG_DM_I2C 560 ret = i2c_get_cur_bus_chip(chip, &dev); 561 if (!ret && alen != -1) 562 ret = i2c_set_chip_offset_len(dev, alen); 563 if (ret) 564 return i2c_report_err(ret, I2C_ERR_READ); 565 #endif 566 567 /* 568 * Print the lines. 569 * 570 * We buffer all read data, so we can make sure data is read only 571 * once. 572 */ 573 nbytes = length; 574 do { 575 unsigned char linebuf[DISP_LINE_LEN]; 576 unsigned char *cp; 577 578 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; 579 580 #ifdef CONFIG_DM_I2C 581 ret = dm_i2c_read(dev, addr, linebuf, linebytes); 582 #else 583 ret = i2c_read(chip, addr, alen, linebuf, linebytes); 584 #endif 585 if (ret) 586 return i2c_report_err(ret, I2C_ERR_READ); 587 else { 588 printf("%04x:", addr); 589 cp = linebuf; 590 for (j=0; j<linebytes; j++) { 591 printf(" %02x", *cp++); 592 addr++; 593 } 594 puts (" "); 595 cp = linebuf; 596 for (j=0; j<linebytes; j++) { 597 if ((*cp < 0x20) || (*cp > 0x7e)) 598 puts ("."); 599 else 600 printf("%c", *cp); 601 cp++; 602 } 603 putc ('\n'); 604 } 605 nbytes -= linebytes; 606 } while (nbytes > 0); 607 608 i2c_dp_last_chip = chip; 609 i2c_dp_last_addr = addr; 610 i2c_dp_last_alen = alen; 611 i2c_dp_last_length = length; 612 613 return 0; 614 } 615 616 /** 617 * do_i2c_mw() - Handle the "i2c mw" command-line command 618 * @cmdtp: Command data struct pointer 619 * @flag: Command flag 620 * @argc: Command-line argument count 621 * @argv: Array of command-line arguments 622 * 623 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 624 * on error. 625 * 626 * Syntax: 627 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] 628 */ 629 static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 630 { 631 uint chip; 632 ulong addr; 633 int alen; 634 uchar byte; 635 int count; 636 int ret; 637 #ifdef CONFIG_DM_I2C 638 struct udevice *dev; 639 #endif 640 641 if ((argc < 4) || (argc > 5)) 642 return CMD_RET_USAGE; 643 644 /* 645 * Chip is always specified. 646 */ 647 chip = simple_strtoul(argv[1], NULL, 16); 648 649 /* 650 * Address is always specified. 651 */ 652 addr = simple_strtoul(argv[2], NULL, 16); 653 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 654 if (alen > 3) 655 return CMD_RET_USAGE; 656 657 #ifdef CONFIG_DM_I2C 658 ret = i2c_get_cur_bus_chip(chip, &dev); 659 if (!ret && alen != -1) 660 ret = i2c_set_chip_offset_len(dev, alen); 661 if (ret) 662 return i2c_report_err(ret, I2C_ERR_WRITE); 663 #endif 664 /* 665 * Value to write is always specified. 666 */ 667 byte = simple_strtoul(argv[3], NULL, 16); 668 669 /* 670 * Optional count 671 */ 672 if (argc == 5) 673 count = simple_strtoul(argv[4], NULL, 16); 674 else 675 count = 1; 676 677 while (count-- > 0) { 678 #ifdef CONFIG_DM_I2C 679 ret = dm_i2c_write(dev, addr++, &byte, 1); 680 #else 681 ret = i2c_write(chip, addr++, alen, &byte, 1); 682 #endif 683 if (ret) 684 return i2c_report_err(ret, I2C_ERR_WRITE); 685 /* 686 * Wait for the write to complete. The write can take 687 * up to 10mSec (we allow a little more time). 688 */ 689 /* 690 * No write delay with FRAM devices. 691 */ 692 #if !defined(CONFIG_SYS_I2C_FRAM) 693 udelay(11000); 694 #endif 695 } 696 697 return 0; 698 } 699 700 /** 701 * do_i2c_crc() - Handle the "i2c crc32" command-line command 702 * @cmdtp: Command data struct pointer 703 * @flag: Command flag 704 * @argc: Command-line argument count 705 * @argv: Array of command-line arguments 706 * 707 * Calculate a CRC on memory 708 * 709 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 710 * on error. 711 * 712 * Syntax: 713 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} 714 */ 715 static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 716 { 717 uint chip; 718 ulong addr; 719 int alen; 720 int count; 721 uchar byte; 722 ulong crc; 723 ulong err; 724 int ret = 0; 725 #ifdef CONFIG_DM_I2C 726 struct udevice *dev; 727 #endif 728 729 if (argc < 4) 730 return CMD_RET_USAGE; 731 732 /* 733 * Chip is always specified. 734 */ 735 chip = simple_strtoul(argv[1], NULL, 16); 736 737 /* 738 * Address is always specified. 739 */ 740 addr = simple_strtoul(argv[2], NULL, 16); 741 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 742 if (alen > 3) 743 return CMD_RET_USAGE; 744 745 #ifdef CONFIG_DM_I2C 746 ret = i2c_get_cur_bus_chip(chip, &dev); 747 if (!ret && alen != -1) 748 ret = i2c_set_chip_offset_len(dev, alen); 749 if (ret) 750 return i2c_report_err(ret, I2C_ERR_READ); 751 #endif 752 /* 753 * Count is always specified 754 */ 755 count = simple_strtoul(argv[3], NULL, 16); 756 757 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); 758 /* 759 * CRC a byte at a time. This is going to be slooow, but hey, the 760 * memories are small and slow too so hopefully nobody notices. 761 */ 762 crc = 0; 763 err = 0; 764 while (count-- > 0) { 765 #ifdef CONFIG_DM_I2C 766 ret = dm_i2c_read(dev, addr, &byte, 1); 767 #else 768 ret = i2c_read(chip, addr, alen, &byte, 1); 769 #endif 770 if (ret) 771 err++; 772 crc = crc32 (crc, &byte, 1); 773 addr++; 774 } 775 if (err > 0) 776 i2c_report_err(ret, I2C_ERR_READ); 777 else 778 printf ("%08lx\n", crc); 779 780 return 0; 781 } 782 783 /** 784 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command 785 * @cmdtp: Command data struct pointer 786 * @flag: Command flag 787 * @argc: Command-line argument count 788 * @argv: Array of command-line arguments 789 * 790 * Modify memory. 791 * 792 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 793 * on error. 794 * 795 * Syntax: 796 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 797 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 798 */ 799 static int 800 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) 801 { 802 uint chip; 803 ulong addr; 804 int alen; 805 ulong data; 806 int size = 1; 807 int nbytes; 808 int ret; 809 #ifdef CONFIG_DM_I2C 810 struct udevice *dev; 811 #endif 812 813 if (argc != 3) 814 return CMD_RET_USAGE; 815 816 bootretry_reset_cmd_timeout(); /* got a good command to get here */ 817 /* 818 * We use the last specified parameters, unless new ones are 819 * entered. 820 */ 821 chip = i2c_mm_last_chip; 822 addr = i2c_mm_last_addr; 823 alen = i2c_mm_last_alen; 824 825 if ((flag & CMD_FLAG_REPEAT) == 0) { 826 /* 827 * New command specified. Check for a size specification. 828 * Defaults to byte if no or incorrect specification. 829 */ 830 size = cmd_get_data_size(argv[0], 1); 831 832 /* 833 * Chip is always specified. 834 */ 835 chip = simple_strtoul(argv[1], NULL, 16); 836 837 /* 838 * Address is always specified. 839 */ 840 addr = simple_strtoul(argv[2], NULL, 16); 841 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 842 if (alen > 3) 843 return CMD_RET_USAGE; 844 } 845 846 #ifdef CONFIG_DM_I2C 847 ret = i2c_get_cur_bus_chip(chip, &dev); 848 if (!ret && alen != -1) 849 ret = i2c_set_chip_offset_len(dev, alen); 850 if (ret) 851 return i2c_report_err(ret, I2C_ERR_WRITE); 852 #endif 853 854 /* 855 * Print the address, followed by value. Then accept input for 856 * the next value. A non-converted value exits. 857 */ 858 do { 859 printf("%08lx:", addr); 860 #ifdef CONFIG_DM_I2C 861 ret = dm_i2c_read(dev, addr, (uchar *)&data, size); 862 #else 863 ret = i2c_read(chip, addr, alen, (uchar *)&data, size); 864 #endif 865 if (ret) 866 return i2c_report_err(ret, I2C_ERR_READ); 867 868 data = cpu_to_be32(data); 869 if (size == 1) 870 printf(" %02lx", (data >> 24) & 0x000000FF); 871 else if (size == 2) 872 printf(" %04lx", (data >> 16) & 0x0000FFFF); 873 else 874 printf(" %08lx", data); 875 876 nbytes = cli_readline(" ? "); 877 if (nbytes == 0) { 878 /* 879 * <CR> pressed as only input, don't modify current 880 * location and move to next. 881 */ 882 if (incrflag) 883 addr += size; 884 nbytes = size; 885 /* good enough to not time out */ 886 bootretry_reset_cmd_timeout(); 887 } 888 #ifdef CONFIG_BOOT_RETRY_TIME 889 else if (nbytes == -2) 890 break; /* timed out, exit the command */ 891 #endif 892 else { 893 char *endp; 894 895 data = simple_strtoul(console_buffer, &endp, 16); 896 if (size == 1) 897 data = data << 24; 898 else if (size == 2) 899 data = data << 16; 900 data = be32_to_cpu(data); 901 nbytes = endp - console_buffer; 902 if (nbytes) { 903 /* 904 * good enough to not time out 905 */ 906 bootretry_reset_cmd_timeout(); 907 #ifdef CONFIG_DM_I2C 908 ret = dm_i2c_write(dev, addr, (uchar *)&data, 909 size); 910 #else 911 ret = i2c_write(chip, addr, alen, 912 (uchar *)&data, size); 913 #endif 914 if (ret) 915 return i2c_report_err(ret, 916 I2C_ERR_WRITE); 917 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 918 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); 919 #endif 920 if (incrflag) 921 addr += size; 922 } 923 } 924 } while (nbytes); 925 926 i2c_mm_last_chip = chip; 927 i2c_mm_last_addr = addr; 928 i2c_mm_last_alen = alen; 929 930 return 0; 931 } 932 933 /** 934 * do_i2c_probe() - Handle the "i2c probe" command-line command 935 * @cmdtp: Command data struct pointer 936 * @flag: Command flag 937 * @argc: Command-line argument count 938 * @argv: Array of command-line arguments 939 * 940 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 941 * on error. 942 * 943 * Syntax: 944 * i2c probe {addr} 945 * 946 * Returns zero (success) if one or more I2C devices was found 947 */ 948 static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 949 { 950 int j; 951 int addr = -1; 952 int found = 0; 953 #if defined(CONFIG_SYS_I2C_NOPROBES) 954 int k, skip; 955 unsigned int bus = GET_BUS_NUM; 956 #endif /* NOPROBES */ 957 int ret; 958 #ifdef CONFIG_DM_I2C 959 struct udevice *bus, *dev; 960 961 if (i2c_get_cur_bus(&bus)) 962 return CMD_RET_FAILURE; 963 #endif 964 965 if (argc == 2) 966 addr = simple_strtol(argv[1], 0, 16); 967 968 puts ("Valid chip addresses:"); 969 for (j = 0; j < 128; j++) { 970 if ((0 <= addr) && (j != addr)) 971 continue; 972 973 #if defined(CONFIG_SYS_I2C_NOPROBES) 974 skip = 0; 975 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 976 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { 977 skip = 1; 978 break; 979 } 980 } 981 if (skip) 982 continue; 983 #endif 984 #ifdef CONFIG_DM_I2C 985 ret = dm_i2c_probe(bus, j, 0, &dev); 986 #else 987 ret = i2c_probe(j); 988 #endif 989 if (ret == 0) { 990 printf(" %02X", j); 991 found++; 992 } 993 } 994 putc ('\n'); 995 996 #if defined(CONFIG_SYS_I2C_NOPROBES) 997 puts ("Excluded chip addresses:"); 998 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 999 if (COMPARE_BUS(bus,k)) 1000 printf(" %02X", NO_PROBE_ADDR(k)); 1001 } 1002 putc ('\n'); 1003 #endif 1004 1005 return (0 == found); 1006 } 1007 1008 /** 1009 * do_i2c_loop() - Handle the "i2c loop" command-line command 1010 * @cmdtp: Command data struct pointer 1011 * @flag: Command flag 1012 * @argc: Command-line argument count 1013 * @argv: Array of command-line arguments 1014 * 1015 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1016 * on error. 1017 * 1018 * Syntax: 1019 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] 1020 * {length} - Number of bytes to read 1021 * {delay} - A DECIMAL number and defaults to 1000 uSec 1022 */ 1023 static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1024 { 1025 uint chip; 1026 int alen; 1027 uint addr; 1028 uint length; 1029 u_char bytes[16]; 1030 int delay; 1031 int ret; 1032 #ifdef CONFIG_DM_I2C 1033 struct udevice *dev; 1034 #endif 1035 1036 if (argc < 3) 1037 return CMD_RET_USAGE; 1038 1039 /* 1040 * Chip is always specified. 1041 */ 1042 chip = simple_strtoul(argv[1], NULL, 16); 1043 1044 /* 1045 * Address is always specified. 1046 */ 1047 addr = simple_strtoul(argv[2], NULL, 16); 1048 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 1049 if (alen > 3) 1050 return CMD_RET_USAGE; 1051 #ifdef CONFIG_DM_I2C 1052 ret = i2c_get_cur_bus_chip(chip, &dev); 1053 if (!ret && alen != -1) 1054 ret = i2c_set_chip_offset_len(dev, alen); 1055 if (ret) 1056 return i2c_report_err(ret, I2C_ERR_WRITE); 1057 #endif 1058 1059 /* 1060 * Length is the number of objects, not number of bytes. 1061 */ 1062 length = 1; 1063 length = simple_strtoul(argv[3], NULL, 16); 1064 if (length > sizeof(bytes)) 1065 length = sizeof(bytes); 1066 1067 /* 1068 * The delay time (uSec) is optional. 1069 */ 1070 delay = 1000; 1071 if (argc > 3) 1072 delay = simple_strtoul(argv[4], NULL, 10); 1073 /* 1074 * Run the loop... 1075 */ 1076 while (1) { 1077 #ifdef CONFIG_DM_I2C 1078 ret = dm_i2c_read(dev, addr, bytes, length); 1079 #else 1080 ret = i2c_read(chip, addr, alen, bytes, length); 1081 #endif 1082 if (ret) 1083 i2c_report_err(ret, I2C_ERR_READ); 1084 udelay(delay); 1085 } 1086 1087 /* NOTREACHED */ 1088 return 0; 1089 } 1090 1091 /* 1092 * The SDRAM command is separately configured because many 1093 * (most?) embedded boards don't use SDRAM DIMMs. 1094 * 1095 * FIXME: Document and probably move elsewhere! 1096 */ 1097 #if defined(CONFIG_CMD_SDRAM) 1098 static void print_ddr2_tcyc (u_char const b) 1099 { 1100 printf ("%d.", (b >> 4) & 0x0F); 1101 switch (b & 0x0F) { 1102 case 0x0: 1103 case 0x1: 1104 case 0x2: 1105 case 0x3: 1106 case 0x4: 1107 case 0x5: 1108 case 0x6: 1109 case 0x7: 1110 case 0x8: 1111 case 0x9: 1112 printf ("%d ns\n", b & 0x0F); 1113 break; 1114 case 0xA: 1115 puts ("25 ns\n"); 1116 break; 1117 case 0xB: 1118 puts ("33 ns\n"); 1119 break; 1120 case 0xC: 1121 puts ("66 ns\n"); 1122 break; 1123 case 0xD: 1124 puts ("75 ns\n"); 1125 break; 1126 default: 1127 puts ("?? ns\n"); 1128 break; 1129 } 1130 } 1131 1132 static void decode_bits (u_char const b, char const *str[], int const do_once) 1133 { 1134 u_char mask; 1135 1136 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { 1137 if (b & mask) { 1138 puts (*str); 1139 if (do_once) 1140 return; 1141 } 1142 } 1143 } 1144 1145 /* 1146 * Syntax: 1147 * i2c sdram {i2c_chip} 1148 */ 1149 static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1150 { 1151 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type; 1152 1153 uint chip; 1154 u_char data[128]; 1155 u_char cksum; 1156 int j, ret; 1157 #ifdef CONFIG_DM_I2C 1158 struct udevice *dev; 1159 #endif 1160 1161 static const char *decode_CAS_DDR2[] = { 1162 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" 1163 }; 1164 1165 static const char *decode_CAS_default[] = { 1166 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" 1167 }; 1168 1169 static const char *decode_CS_WE_default[] = { 1170 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" 1171 }; 1172 1173 static const char *decode_byte21_default[] = { 1174 " TBD (bit 7)\n", 1175 " Redundant row address\n", 1176 " Differential clock input\n", 1177 " Registerd DQMB inputs\n", 1178 " Buffered DQMB inputs\n", 1179 " On-card PLL\n", 1180 " Registered address/control lines\n", 1181 " Buffered address/control lines\n" 1182 }; 1183 1184 static const char *decode_byte22_DDR2[] = { 1185 " TBD (bit 7)\n", 1186 " TBD (bit 6)\n", 1187 " TBD (bit 5)\n", 1188 " TBD (bit 4)\n", 1189 " TBD (bit 3)\n", 1190 " Supports partial array self refresh\n", 1191 " Supports 50 ohm ODT\n", 1192 " Supports weak driver\n" 1193 }; 1194 1195 static const char *decode_row_density_DDR2[] = { 1196 "512 MiB", "256 MiB", "128 MiB", "16 GiB", 1197 "8 GiB", "4 GiB", "2 GiB", "1 GiB" 1198 }; 1199 1200 static const char *decode_row_density_default[] = { 1201 "512 MiB", "256 MiB", "128 MiB", "64 MiB", 1202 "32 MiB", "16 MiB", "8 MiB", "4 MiB" 1203 }; 1204 1205 if (argc < 2) 1206 return CMD_RET_USAGE; 1207 1208 /* 1209 * Chip is always specified. 1210 */ 1211 chip = simple_strtoul (argv[1], NULL, 16); 1212 1213 #ifdef CONFIG_DM_I2C 1214 ret = i2c_get_cur_bus_chip(chip, &dev); 1215 if (!ret) 1216 ret = dm_i2c_read(dev, 0, data, sizeof(data)); 1217 #else 1218 ret = i2c_read(chip, 0, 1, data, sizeof(data)); 1219 #endif 1220 if (ret) { 1221 puts ("No SDRAM Serial Presence Detect found.\n"); 1222 return 1; 1223 } 1224 1225 cksum = 0; 1226 for (j = 0; j < 63; j++) { 1227 cksum += data[j]; 1228 } 1229 if (cksum != data[63]) { 1230 printf ("WARNING: Configuration data checksum failure:\n" 1231 " is 0x%02x, calculated 0x%02x\n", data[63], cksum); 1232 } 1233 printf ("SPD data revision %d.%d\n", 1234 (data[62] >> 4) & 0x0F, data[62] & 0x0F); 1235 printf ("Bytes used 0x%02X\n", data[0]); 1236 printf ("Serial memory size 0x%02X\n", 1 << data[1]); 1237 1238 puts ("Memory type "); 1239 switch (data[2]) { 1240 case 2: 1241 type = EDO; 1242 puts ("EDO\n"); 1243 break; 1244 case 4: 1245 type = SDRAM; 1246 puts ("SDRAM\n"); 1247 break; 1248 case 7: 1249 type = DDR; 1250 puts("DDR\n"); 1251 break; 1252 case 8: 1253 type = DDR2; 1254 puts ("DDR2\n"); 1255 break; 1256 case 11: 1257 type = DDR3; 1258 puts("DDR3\n"); 1259 break; 1260 case 12: 1261 type = DDR4; 1262 puts("DDR4\n"); 1263 break; 1264 default: 1265 type = unknown; 1266 puts ("unknown\n"); 1267 break; 1268 } 1269 1270 puts ("Row address bits "); 1271 if ((data[3] & 0x00F0) == 0) 1272 printf ("%d\n", data[3] & 0x0F); 1273 else 1274 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); 1275 1276 puts ("Column address bits "); 1277 if ((data[4] & 0x00F0) == 0) 1278 printf ("%d\n", data[4] & 0x0F); 1279 else 1280 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); 1281 1282 switch (type) { 1283 case DDR2: 1284 printf ("Number of ranks %d\n", 1285 (data[5] & 0x07) + 1); 1286 break; 1287 default: 1288 printf ("Module rows %d\n", data[5]); 1289 break; 1290 } 1291 1292 switch (type) { 1293 case DDR2: 1294 printf ("Module data width %d bits\n", data[6]); 1295 break; 1296 default: 1297 printf ("Module data width %d bits\n", 1298 (data[7] << 8) | data[6]); 1299 break; 1300 } 1301 1302 puts ("Interface signal levels "); 1303 switch(data[8]) { 1304 case 0: puts ("TTL 5.0 V\n"); break; 1305 case 1: puts ("LVTTL\n"); break; 1306 case 2: puts ("HSTL 1.5 V\n"); break; 1307 case 3: puts ("SSTL 3.3 V\n"); break; 1308 case 4: puts ("SSTL 2.5 V\n"); break; 1309 case 5: puts ("SSTL 1.8 V\n"); break; 1310 default: puts ("unknown\n"); break; 1311 } 1312 1313 switch (type) { 1314 case DDR2: 1315 printf ("SDRAM cycle time "); 1316 print_ddr2_tcyc (data[9]); 1317 break; 1318 default: 1319 printf ("SDRAM cycle time %d.%d ns\n", 1320 (data[9] >> 4) & 0x0F, data[9] & 0x0F); 1321 break; 1322 } 1323 1324 switch (type) { 1325 case DDR2: 1326 printf ("SDRAM access time 0.%d%d ns\n", 1327 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1328 break; 1329 default: 1330 printf ("SDRAM access time %d.%d ns\n", 1331 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1332 break; 1333 } 1334 1335 puts ("EDC configuration "); 1336 switch (data[11]) { 1337 case 0: puts ("None\n"); break; 1338 case 1: puts ("Parity\n"); break; 1339 case 2: puts ("ECC\n"); break; 1340 default: puts ("unknown\n"); break; 1341 } 1342 1343 if ((data[12] & 0x80) == 0) 1344 puts ("No self refresh, rate "); 1345 else 1346 puts ("Self refresh, rate "); 1347 1348 switch(data[12] & 0x7F) { 1349 case 0: puts ("15.625 us\n"); break; 1350 case 1: puts ("3.9 us\n"); break; 1351 case 2: puts ("7.8 us\n"); break; 1352 case 3: puts ("31.3 us\n"); break; 1353 case 4: puts ("62.5 us\n"); break; 1354 case 5: puts ("125 us\n"); break; 1355 default: puts ("unknown\n"); break; 1356 } 1357 1358 switch (type) { 1359 case DDR2: 1360 printf ("SDRAM width (primary) %d\n", data[13]); 1361 break; 1362 default: 1363 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); 1364 if ((data[13] & 0x80) != 0) { 1365 printf (" (second bank) %d\n", 1366 2 * (data[13] & 0x7F)); 1367 } 1368 break; 1369 } 1370 1371 switch (type) { 1372 case DDR2: 1373 if (data[14] != 0) 1374 printf ("EDC width %d\n", data[14]); 1375 break; 1376 default: 1377 if (data[14] != 0) { 1378 printf ("EDC width %d\n", 1379 data[14] & 0x7F); 1380 1381 if ((data[14] & 0x80) != 0) { 1382 printf (" (second bank) %d\n", 1383 2 * (data[14] & 0x7F)); 1384 } 1385 } 1386 break; 1387 } 1388 1389 if (DDR2 != type) { 1390 printf ("Min clock delay, back-to-back random column addresses " 1391 "%d\n", data[15]); 1392 } 1393 1394 puts ("Burst length(s) "); 1395 if (data[16] & 0x80) puts (" Page"); 1396 if (data[16] & 0x08) puts (" 8"); 1397 if (data[16] & 0x04) puts (" 4"); 1398 if (data[16] & 0x02) puts (" 2"); 1399 if (data[16] & 0x01) puts (" 1"); 1400 putc ('\n'); 1401 printf ("Number of banks %d\n", data[17]); 1402 1403 switch (type) { 1404 case DDR2: 1405 puts ("CAS latency(s) "); 1406 decode_bits (data[18], decode_CAS_DDR2, 0); 1407 putc ('\n'); 1408 break; 1409 default: 1410 puts ("CAS latency(s) "); 1411 decode_bits (data[18], decode_CAS_default, 0); 1412 putc ('\n'); 1413 break; 1414 } 1415 1416 if (DDR2 != type) { 1417 puts ("CS latency(s) "); 1418 decode_bits (data[19], decode_CS_WE_default, 0); 1419 putc ('\n'); 1420 } 1421 1422 if (DDR2 != type) { 1423 puts ("WE latency(s) "); 1424 decode_bits (data[20], decode_CS_WE_default, 0); 1425 putc ('\n'); 1426 } 1427 1428 switch (type) { 1429 case DDR2: 1430 puts ("Module attributes:\n"); 1431 if (data[21] & 0x80) 1432 puts (" TBD (bit 7)\n"); 1433 if (data[21] & 0x40) 1434 puts (" Analysis probe installed\n"); 1435 if (data[21] & 0x20) 1436 puts (" TBD (bit 5)\n"); 1437 if (data[21] & 0x10) 1438 puts (" FET switch external enable\n"); 1439 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); 1440 if (data[20] & 0x11) { 1441 printf (" %d active registers on DIMM\n", 1442 (data[21] & 0x03) + 1); 1443 } 1444 break; 1445 default: 1446 puts ("Module attributes:\n"); 1447 if (!data[21]) 1448 puts (" (none)\n"); 1449 else 1450 decode_bits (data[21], decode_byte21_default, 0); 1451 break; 1452 } 1453 1454 switch (type) { 1455 case DDR2: 1456 decode_bits (data[22], decode_byte22_DDR2, 0); 1457 break; 1458 default: 1459 puts ("Device attributes:\n"); 1460 if (data[22] & 0x80) puts (" TBD (bit 7)\n"); 1461 if (data[22] & 0x40) puts (" TBD (bit 6)\n"); 1462 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); 1463 else puts (" Upper Vcc tolerance 10%\n"); 1464 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); 1465 else puts (" Lower Vcc tolerance 10%\n"); 1466 if (data[22] & 0x08) puts (" Supports write1/read burst\n"); 1467 if (data[22] & 0x04) puts (" Supports precharge all\n"); 1468 if (data[22] & 0x02) puts (" Supports auto precharge\n"); 1469 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); 1470 break; 1471 } 1472 1473 switch (type) { 1474 case DDR2: 1475 printf ("SDRAM cycle time (2nd highest CAS latency) "); 1476 print_ddr2_tcyc (data[23]); 1477 break; 1478 default: 1479 printf ("SDRAM cycle time (2nd highest CAS latency) %d." 1480 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); 1481 break; 1482 } 1483 1484 switch (type) { 1485 case DDR2: 1486 printf ("SDRAM access from clock (2nd highest CAS latency) 0." 1487 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1488 break; 1489 default: 1490 printf ("SDRAM access from clock (2nd highest CAS latency) %d." 1491 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1492 break; 1493 } 1494 1495 switch (type) { 1496 case DDR2: 1497 printf ("SDRAM cycle time (3rd highest CAS latency) "); 1498 print_ddr2_tcyc (data[25]); 1499 break; 1500 default: 1501 printf ("SDRAM cycle time (3rd highest CAS latency) %d." 1502 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); 1503 break; 1504 } 1505 1506 switch (type) { 1507 case DDR2: 1508 printf ("SDRAM access from clock (3rd highest CAS latency) 0." 1509 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1510 break; 1511 default: 1512 printf ("SDRAM access from clock (3rd highest CAS latency) %d." 1513 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1514 break; 1515 } 1516 1517 switch (type) { 1518 case DDR2: 1519 printf ("Minimum row precharge %d.%02d ns\n", 1520 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); 1521 break; 1522 default: 1523 printf ("Minimum row precharge %d ns\n", data[27]); 1524 break; 1525 } 1526 1527 switch (type) { 1528 case DDR2: 1529 printf ("Row active to row active min %d.%02d ns\n", 1530 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); 1531 break; 1532 default: 1533 printf ("Row active to row active min %d ns\n", data[28]); 1534 break; 1535 } 1536 1537 switch (type) { 1538 case DDR2: 1539 printf ("RAS to CAS delay min %d.%02d ns\n", 1540 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); 1541 break; 1542 default: 1543 printf ("RAS to CAS delay min %d ns\n", data[29]); 1544 break; 1545 } 1546 1547 printf ("Minimum RAS pulse width %d ns\n", data[30]); 1548 1549 switch (type) { 1550 case DDR2: 1551 puts ("Density of each row "); 1552 decode_bits (data[31], decode_row_density_DDR2, 1); 1553 putc ('\n'); 1554 break; 1555 default: 1556 puts ("Density of each row "); 1557 decode_bits (data[31], decode_row_density_default, 1); 1558 putc ('\n'); 1559 break; 1560 } 1561 1562 switch (type) { 1563 case DDR2: 1564 puts ("Command and Address setup "); 1565 if (data[32] >= 0xA0) { 1566 printf ("1.%d%d ns\n", 1567 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); 1568 } else { 1569 printf ("0.%d%d ns\n", 1570 ((data[32] >> 4) & 0x0F), data[32] & 0x0F); 1571 } 1572 break; 1573 default: 1574 printf ("Command and Address setup %c%d.%d ns\n", 1575 (data[32] & 0x80) ? '-' : '+', 1576 (data[32] >> 4) & 0x07, data[32] & 0x0F); 1577 break; 1578 } 1579 1580 switch (type) { 1581 case DDR2: 1582 puts ("Command and Address hold "); 1583 if (data[33] >= 0xA0) { 1584 printf ("1.%d%d ns\n", 1585 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); 1586 } else { 1587 printf ("0.%d%d ns\n", 1588 ((data[33] >> 4) & 0x0F), data[33] & 0x0F); 1589 } 1590 break; 1591 default: 1592 printf ("Command and Address hold %c%d.%d ns\n", 1593 (data[33] & 0x80) ? '-' : '+', 1594 (data[33] >> 4) & 0x07, data[33] & 0x0F); 1595 break; 1596 } 1597 1598 switch (type) { 1599 case DDR2: 1600 printf ("Data signal input setup 0.%d%d ns\n", 1601 (data[34] >> 4) & 0x0F, data[34] & 0x0F); 1602 break; 1603 default: 1604 printf ("Data signal input setup %c%d.%d ns\n", 1605 (data[34] & 0x80) ? '-' : '+', 1606 (data[34] >> 4) & 0x07, data[34] & 0x0F); 1607 break; 1608 } 1609 1610 switch (type) { 1611 case DDR2: 1612 printf ("Data signal input hold 0.%d%d ns\n", 1613 (data[35] >> 4) & 0x0F, data[35] & 0x0F); 1614 break; 1615 default: 1616 printf ("Data signal input hold %c%d.%d ns\n", 1617 (data[35] & 0x80) ? '-' : '+', 1618 (data[35] >> 4) & 0x07, data[35] & 0x0F); 1619 break; 1620 } 1621 1622 puts ("Manufacturer's JEDEC ID "); 1623 for (j = 64; j <= 71; j++) 1624 printf ("%02X ", data[j]); 1625 putc ('\n'); 1626 printf ("Manufacturing Location %02X\n", data[72]); 1627 puts ("Manufacturer's Part Number "); 1628 for (j = 73; j <= 90; j++) 1629 printf ("%02X ", data[j]); 1630 putc ('\n'); 1631 printf ("Revision Code %02X %02X\n", data[91], data[92]); 1632 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); 1633 puts ("Assembly Serial Number "); 1634 for (j = 95; j <= 98; j++) 1635 printf ("%02X ", data[j]); 1636 putc ('\n'); 1637 1638 if (DDR2 != type) { 1639 printf ("Speed rating PC%d\n", 1640 data[126] == 0x66 ? 66 : data[126]); 1641 } 1642 return 0; 1643 } 1644 #endif 1645 1646 /* 1647 * Syntax: 1648 * i2c edid {i2c_chip} 1649 */ 1650 #if defined(CONFIG_I2C_EDID) 1651 int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1652 { 1653 uint chip; 1654 struct edid1_info edid; 1655 int ret; 1656 #ifdef CONFIG_DM_I2C 1657 struct udevice *dev; 1658 #endif 1659 1660 if (argc < 2) { 1661 cmd_usage(cmdtp); 1662 return 1; 1663 } 1664 1665 chip = simple_strtoul(argv[1], NULL, 16); 1666 #ifdef CONFIG_DM_I2C 1667 ret = i2c_get_cur_bus_chip(chip, &dev); 1668 if (!ret) 1669 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); 1670 #else 1671 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); 1672 #endif 1673 if (ret) 1674 return i2c_report_err(ret, I2C_ERR_READ); 1675 1676 if (edid_check_info(&edid)) { 1677 puts("Content isn't valid EDID.\n"); 1678 return 1; 1679 } 1680 1681 edid_print_info(&edid); 1682 return 0; 1683 1684 } 1685 #endif /* CONFIG_I2C_EDID */ 1686 1687 #ifdef CONFIG_DM_I2C 1688 static void show_bus(struct udevice *bus) 1689 { 1690 struct udevice *dev; 1691 1692 printf("Bus %d:\t%s", bus->req_seq, bus->name); 1693 if (device_active(bus)) 1694 printf(" (active %d)", bus->seq); 1695 printf("\n"); 1696 for (device_find_first_child(bus, &dev); 1697 dev; 1698 device_find_next_child(&dev)) { 1699 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); 1700 1701 printf(" %02x: %s, offset len %x, flags %x\n", 1702 chip->chip_addr, dev->name, chip->offset_len, 1703 chip->flags); 1704 } 1705 } 1706 #endif 1707 1708 /** 1709 * do_i2c_show_bus() - Handle the "i2c bus" command-line command 1710 * @cmdtp: Command data struct pointer 1711 * @flag: Command flag 1712 * @argc: Command-line argument count 1713 * @argv: Array of command-line arguments 1714 * 1715 * Returns zero always. 1716 */ 1717 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1718 static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, 1719 char * const argv[]) 1720 { 1721 if (argc == 1) { 1722 /* show all busses */ 1723 #ifdef CONFIG_DM_I2C 1724 struct udevice *bus; 1725 struct uclass *uc; 1726 int ret; 1727 1728 ret = uclass_get(UCLASS_I2C, &uc); 1729 if (ret) 1730 return CMD_RET_FAILURE; 1731 uclass_foreach_dev(bus, uc) 1732 show_bus(bus); 1733 #else 1734 int i; 1735 1736 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { 1737 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1738 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1739 int j; 1740 1741 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1742 if (i2c_bus[i].next_hop[j].chip == 0) 1743 break; 1744 printf("->%s@0x%2x:%d", 1745 i2c_bus[i].next_hop[j].mux.name, 1746 i2c_bus[i].next_hop[j].chip, 1747 i2c_bus[i].next_hop[j].channel); 1748 } 1749 #endif 1750 printf("\n"); 1751 } 1752 #endif 1753 } else { 1754 int i; 1755 1756 /* show specific bus */ 1757 i = simple_strtoul(argv[1], NULL, 10); 1758 #ifdef CONFIG_DM_I2C 1759 struct udevice *bus; 1760 int ret; 1761 1762 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus); 1763 if (ret) { 1764 printf("Invalid bus %d: err=%d\n", i, ret); 1765 return CMD_RET_FAILURE; 1766 } 1767 show_bus(bus); 1768 #else 1769 if (i >= CONFIG_SYS_NUM_I2C_BUSES) { 1770 printf("Invalid bus %d\n", i); 1771 return -1; 1772 } 1773 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1774 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1775 int j; 1776 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1777 if (i2c_bus[i].next_hop[j].chip == 0) 1778 break; 1779 printf("->%s@0x%2x:%d", 1780 i2c_bus[i].next_hop[j].mux.name, 1781 i2c_bus[i].next_hop[j].chip, 1782 i2c_bus[i].next_hop[j].channel); 1783 } 1784 #endif 1785 printf("\n"); 1786 #endif 1787 } 1788 1789 return 0; 1790 } 1791 #endif 1792 1793 /** 1794 * do_i2c_bus_num() - Handle the "i2c dev" command-line command 1795 * @cmdtp: Command data struct pointer 1796 * @flag: Command flag 1797 * @argc: Command-line argument count 1798 * @argv: Array of command-line arguments 1799 * 1800 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1801 * on error. 1802 */ 1803 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ 1804 defined(CONFIG_DM_I2C) 1805 static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, 1806 char * const argv[]) 1807 { 1808 int ret = 0; 1809 int bus_no; 1810 1811 if (argc == 1) { 1812 /* querying current setting */ 1813 #ifdef CONFIG_DM_I2C 1814 struct udevice *bus; 1815 1816 if (!i2c_get_cur_bus(&bus)) 1817 bus_no = bus->seq; 1818 else 1819 bus_no = -1; 1820 #else 1821 bus_no = i2c_get_bus_num(); 1822 #endif 1823 printf("Current bus is %d\n", bus_no); 1824 } else { 1825 bus_no = simple_strtoul(argv[1], NULL, 10); 1826 #if defined(CONFIG_SYS_I2C) 1827 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { 1828 printf("Invalid bus %d\n", bus_no); 1829 return -1; 1830 } 1831 #endif 1832 printf("Setting bus to %d\n", bus_no); 1833 #ifdef CONFIG_DM_I2C 1834 ret = cmd_i2c_set_bus_num(bus_no); 1835 #else 1836 ret = i2c_set_bus_num(bus_no); 1837 #endif 1838 if (ret) 1839 printf("Failure changing bus number (%d)\n", ret); 1840 } 1841 1842 return ret ? CMD_RET_FAILURE : 0; 1843 } 1844 #endif /* defined(CONFIG_SYS_I2C) */ 1845 1846 /** 1847 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command 1848 * @cmdtp: Command data struct pointer 1849 * @flag: Command flag 1850 * @argc: Command-line argument count 1851 * @argv: Array of command-line arguments 1852 * 1853 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1854 * on error. 1855 */ 1856 static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1857 { 1858 int speed, ret=0; 1859 1860 #ifdef CONFIG_DM_I2C 1861 struct udevice *bus; 1862 1863 if (i2c_get_cur_bus(&bus)) 1864 return 1; 1865 #endif 1866 if (argc == 1) { 1867 #ifdef CONFIG_DM_I2C 1868 speed = dm_i2c_get_bus_speed(bus); 1869 #else 1870 speed = i2c_get_bus_speed(); 1871 #endif 1872 /* querying current speed */ 1873 printf("Current bus speed=%d\n", speed); 1874 } else { 1875 speed = simple_strtoul(argv[1], NULL, 10); 1876 printf("Setting bus speed to %d Hz\n", speed); 1877 #ifdef CONFIG_DM_I2C 1878 ret = dm_i2c_set_bus_speed(bus, speed); 1879 #else 1880 ret = i2c_set_bus_speed(speed); 1881 #endif 1882 if (ret) 1883 printf("Failure changing bus speed (%d)\n", ret); 1884 } 1885 1886 return ret ? CMD_RET_FAILURE : 0; 1887 } 1888 1889 /** 1890 * do_i2c_mm() - Handle the "i2c mm" command-line command 1891 * @cmdtp: Command data struct pointer 1892 * @flag: Command flag 1893 * @argc: Command-line argument count 1894 * @argv: Array of command-line arguments 1895 * 1896 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1897 * on error. 1898 */ 1899 static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1900 { 1901 return mod_i2c_mem (cmdtp, 1, flag, argc, argv); 1902 } 1903 1904 /** 1905 * do_i2c_nm() - Handle the "i2c nm" command-line command 1906 * @cmdtp: Command data struct pointer 1907 * @flag: Command flag 1908 * @argc: Command-line argument count 1909 * @argv: Array of command-line arguments 1910 * 1911 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1912 * on error. 1913 */ 1914 static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1915 { 1916 return mod_i2c_mem (cmdtp, 0, flag, argc, argv); 1917 } 1918 1919 /** 1920 * do_i2c_reset() - Handle the "i2c reset" command-line command 1921 * @cmdtp: Command data struct pointer 1922 * @flag: Command flag 1923 * @argc: Command-line argument count 1924 * @argv: Array of command-line arguments 1925 * 1926 * Returns zero always. 1927 */ 1928 static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1929 { 1930 #if defined(CONFIG_DM_I2C) 1931 struct udevice *bus; 1932 1933 if (i2c_get_cur_bus(&bus)) 1934 return CMD_RET_FAILURE; 1935 if (i2c_deblock(bus)) { 1936 printf("Error: Not supported by the driver\n"); 1937 return CMD_RET_FAILURE; 1938 } 1939 #elif defined(CONFIG_SYS_I2C) 1940 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); 1941 #else 1942 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 1943 #endif 1944 return 0; 1945 } 1946 1947 static cmd_tbl_t cmd_i2c_sub[] = { 1948 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1949 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), 1950 #endif 1951 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), 1952 #if defined(CONFIG_SYS_I2C) || \ 1953 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 1954 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), 1955 #endif /* CONFIG_I2C_MULTI_BUS */ 1956 #if defined(CONFIG_I2C_EDID) 1957 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), 1958 #endif /* CONFIG_I2C_EDID */ 1959 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), 1960 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), 1961 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), 1962 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), 1963 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), 1964 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), 1965 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), 1966 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""), 1967 #ifdef CONFIG_DM_I2C 1968 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), 1969 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""), 1970 #endif 1971 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), 1972 #if defined(CONFIG_CMD_SDRAM) 1973 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), 1974 #endif 1975 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), 1976 }; 1977 1978 static __maybe_unused void i2c_reloc(void) 1979 { 1980 static int relocated; 1981 1982 if (!relocated) { 1983 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); 1984 relocated = 1; 1985 }; 1986 } 1987 1988 /** 1989 * do_i2c() - Handle the "i2c" command-line command 1990 * @cmdtp: Command data struct pointer 1991 * @flag: Command flag 1992 * @argc: Command-line argument count 1993 * @argv: Array of command-line arguments 1994 * 1995 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1996 * on error. 1997 */ 1998 static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1999 { 2000 cmd_tbl_t *c; 2001 2002 #ifdef CONFIG_NEEDS_MANUAL_RELOC 2003 i2c_reloc(); 2004 #endif 2005 2006 if (argc < 2) 2007 return CMD_RET_USAGE; 2008 2009 /* Strip off leading 'i2c' command argument */ 2010 argc--; 2011 argv++; 2012 2013 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); 2014 2015 if (c) 2016 return c->cmd(cmdtp, flag, argc, argv); 2017 else 2018 return CMD_RET_USAGE; 2019 } 2020 2021 /***************************************************/ 2022 #ifdef CONFIG_SYS_LONGHELP 2023 static char i2c_help_text[] = 2024 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 2025 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" 2026 #endif 2027 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" 2028 #if defined(CONFIG_SYS_I2C) || \ 2029 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 2030 "i2c dev [dev] - show or set current I2C bus\n" 2031 #endif /* CONFIG_I2C_MULTI_BUS */ 2032 #if defined(CONFIG_I2C_EDID) 2033 "i2c edid chip - print EDID configuration information\n" 2034 #endif /* CONFIG_I2C_EDID */ 2035 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" 2036 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" 2037 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" 2038 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" 2039 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" 2040 "i2c probe [address] - test for and show device(s) on the I2C bus\n" 2041 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" 2042 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n" 2043 " to I2C; the -s option selects bulk write in a single transaction\n" 2044 #ifdef CONFIG_DM_I2C 2045 "i2c flags chip [flags] - set or get chip flags\n" 2046 "i2c olen chip [offset_length] - set or get chip offset length\n" 2047 #endif 2048 "i2c reset - re-init the I2C Controller\n" 2049 #if defined(CONFIG_CMD_SDRAM) 2050 "i2c sdram chip - print SDRAM configuration information\n" 2051 #endif 2052 "i2c speed [speed] - show or set I2C bus speed"; 2053 #endif 2054 2055 U_BOOT_CMD( 2056 i2c, 7, 1, do_i2c, 2057 "I2C sub-system", 2058 i2c_help_text 2059 ); 2060
