1 // Copyright 2016, VIXL authors 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28 // ----------------------------------------------------------------------------- 29 // This file is auto generated from the 30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using 31 // tools/generate_tests.py. 32 // 33 // PLEASE DO NOT EDIT. 34 // ----------------------------------------------------------------------------- 35 36 37 #include "test-runner.h" 38 39 #include "test-utils.h" 40 #include "test-utils-aarch32.h" 41 42 #include "aarch32/assembler-aarch32.h" 43 #include "aarch32/macro-assembler-aarch32.h" 44 45 #define BUF_SIZE (4096) 46 47 namespace vixl { 48 namespace aarch32 { 49 50 // List of instruction mnemonics. 51 #define FOREACH_INSTRUCTION(M) M(rsbs) 52 53 54 // The following definitions are defined again in each generated test, therefore 55 // we need to place them in an anomymous namespace. It expresses that they are 56 // local to this file only, and the compiler is not allowed to share these types 57 // across test files during template instantiation. Specifically, `Operands` has 58 // various layouts across generated tests so it absolutely cannot be shared. 59 60 #ifdef VIXL_INCLUDE_TARGET_T32 61 namespace { 62 63 // Values to be passed to the assembler to produce the instruction under test. 64 struct Operands { 65 Condition cond; 66 Register rd; 67 Register rn; 68 int32_t immediate; 69 }; 70 71 // This structure contains all data needed to test one specific 72 // instruction. 73 struct TestData { 74 // The `operands` field represents what to pass to the assembler to 75 // produce the instruction. 76 Operands operands; 77 // True if we need to generate an IT instruction for this test to be valid. 78 bool in_it_block; 79 // The condition to give the IT instruction, this will be set to "al" by 80 // default. 81 Condition it_condition; 82 // Description of the operands, used for error reporting. 83 const char* operands_description; 84 // Unique identifier, used for generating traces. 85 const char* identifier; 86 }; 87 88 struct TestResult { 89 size_t size; 90 const byte* encoding; 91 }; 92 93 // Each element of this array produce one instruction encoding. 94 const TestData kTests[] = 95 {{{al, r0, r0, 0}, false, al, "al r0 r0 0", "al_r0_r0_0"}, 96 {{al, r0, r1, 0}, false, al, "al r0 r1 0", "al_r0_r1_0"}, 97 {{al, r0, r2, 0}, false, al, "al r0 r2 0", "al_r0_r2_0"}, 98 {{al, r0, r3, 0}, false, al, "al r0 r3 0", "al_r0_r3_0"}, 99 {{al, r0, r4, 0}, false, al, "al r0 r4 0", "al_r0_r4_0"}, 100 {{al, r0, r5, 0}, false, al, "al r0 r5 0", "al_r0_r5_0"}, 101 {{al, r0, r6, 0}, false, al, "al r0 r6 0", "al_r0_r6_0"}, 102 {{al, r0, r7, 0}, false, al, "al r0 r7 0", "al_r0_r7_0"}, 103 {{al, r1, r0, 0}, false, al, "al r1 r0 0", "al_r1_r0_0"}, 104 {{al, r1, r1, 0}, false, al, "al r1 r1 0", "al_r1_r1_0"}, 105 {{al, r1, r2, 0}, false, al, "al r1 r2 0", "al_r1_r2_0"}, 106 {{al, r1, r3, 0}, false, al, "al r1 r3 0", "al_r1_r3_0"}, 107 {{al, r1, r4, 0}, false, al, "al r1 r4 0", "al_r1_r4_0"}, 108 {{al, r1, r5, 0}, false, al, "al r1 r5 0", "al_r1_r5_0"}, 109 {{al, r1, r6, 0}, false, al, "al r1 r6 0", "al_r1_r6_0"}, 110 {{al, r1, r7, 0}, false, al, "al r1 r7 0", "al_r1_r7_0"}, 111 {{al, r2, r0, 0}, false, al, "al r2 r0 0", "al_r2_r0_0"}, 112 {{al, r2, r1, 0}, false, al, "al r2 r1 0", "al_r2_r1_0"}, 113 {{al, r2, r2, 0}, false, al, "al r2 r2 0", "al_r2_r2_0"}, 114 {{al, r2, r3, 0}, false, al, "al r2 r3 0", "al_r2_r3_0"}, 115 {{al, r2, r4, 0}, false, al, "al r2 r4 0", "al_r2_r4_0"}, 116 {{al, r2, r5, 0}, false, al, "al r2 r5 0", "al_r2_r5_0"}, 117 {{al, r2, r6, 0}, false, al, "al r2 r6 0", "al_r2_r6_0"}, 118 {{al, r2, r7, 0}, false, al, "al r2 r7 0", "al_r2_r7_0"}, 119 {{al, r3, r0, 0}, false, al, "al r3 r0 0", "al_r3_r0_0"}, 120 {{al, r3, r1, 0}, false, al, "al r3 r1 0", "al_r3_r1_0"}, 121 {{al, r3, r2, 0}, false, al, "al r3 r2 0", "al_r3_r2_0"}, 122 {{al, r3, r3, 0}, false, al, "al r3 r3 0", "al_r3_r3_0"}, 123 {{al, r3, r4, 0}, false, al, "al r3 r4 0", "al_r3_r4_0"}, 124 {{al, r3, r5, 0}, false, al, "al r3 r5 0", "al_r3_r5_0"}, 125 {{al, r3, r6, 0}, false, al, "al r3 r6 0", "al_r3_r6_0"}, 126 {{al, r3, r7, 0}, false, al, "al r3 r7 0", "al_r3_r7_0"}, 127 {{al, r4, r0, 0}, false, al, "al r4 r0 0", "al_r4_r0_0"}, 128 {{al, r4, r1, 0}, false, al, "al r4 r1 0", "al_r4_r1_0"}, 129 {{al, r4, r2, 0}, false, al, "al r4 r2 0", "al_r4_r2_0"}, 130 {{al, r4, r3, 0}, false, al, "al r4 r3 0", "al_r4_r3_0"}, 131 {{al, r4, r4, 0}, false, al, "al r4 r4 0", "al_r4_r4_0"}, 132 {{al, r4, r5, 0}, false, al, "al r4 r5 0", "al_r4_r5_0"}, 133 {{al, r4, r6, 0}, false, al, "al r4 r6 0", "al_r4_r6_0"}, 134 {{al, r4, r7, 0}, false, al, "al r4 r7 0", "al_r4_r7_0"}, 135 {{al, r5, r0, 0}, false, al, "al r5 r0 0", "al_r5_r0_0"}, 136 {{al, r5, r1, 0}, false, al, "al r5 r1 0", "al_r5_r1_0"}, 137 {{al, r5, r2, 0}, false, al, "al r5 r2 0", "al_r5_r2_0"}, 138 {{al, r5, r3, 0}, false, al, "al r5 r3 0", "al_r5_r3_0"}, 139 {{al, r5, r4, 0}, false, al, "al r5 r4 0", "al_r5_r4_0"}, 140 {{al, r5, r5, 0}, false, al, "al r5 r5 0", "al_r5_r5_0"}, 141 {{al, r5, r6, 0}, false, al, "al r5 r6 0", "al_r5_r6_0"}, 142 {{al, r5, r7, 0}, false, al, "al r5 r7 0", "al_r5_r7_0"}, 143 {{al, r6, r0, 0}, false, al, "al r6 r0 0", "al_r6_r0_0"}, 144 {{al, r6, r1, 0}, false, al, "al r6 r1 0", "al_r6_r1_0"}, 145 {{al, r6, r2, 0}, false, al, "al r6 r2 0", "al_r6_r2_0"}, 146 {{al, r6, r3, 0}, false, al, "al r6 r3 0", "al_r6_r3_0"}, 147 {{al, r6, r4, 0}, false, al, "al r6 r4 0", "al_r6_r4_0"}, 148 {{al, r6, r5, 0}, false, al, "al r6 r5 0", "al_r6_r5_0"}, 149 {{al, r6, r6, 0}, false, al, "al r6 r6 0", "al_r6_r6_0"}, 150 {{al, r6, r7, 0}, false, al, "al r6 r7 0", "al_r6_r7_0"}, 151 {{al, r7, r0, 0}, false, al, "al r7 r0 0", "al_r7_r0_0"}, 152 {{al, r7, r1, 0}, false, al, "al r7 r1 0", "al_r7_r1_0"}, 153 {{al, r7, r2, 0}, false, al, "al r7 r2 0", "al_r7_r2_0"}, 154 {{al, r7, r3, 0}, false, al, "al r7 r3 0", "al_r7_r3_0"}, 155 {{al, r7, r4, 0}, false, al, "al r7 r4 0", "al_r7_r4_0"}, 156 {{al, r7, r5, 0}, false, al, "al r7 r5 0", "al_r7_r5_0"}, 157 {{al, r7, r6, 0}, false, al, "al r7 r6 0", "al_r7_r6_0"}, 158 {{al, r7, r7, 0}, false, al, "al r7 r7 0", "al_r7_r7_0"}}; 159 160 // These headers each contain an array of `TestResult` with the reference output 161 // values. The reference arrays are names `kReference{mnemonic}`. 162 #include "aarch32/traces/assembler-cond-rdlow-rnlow-operand-immediate-zero-rsbs-t32.h" 163 164 165 // The maximum number of errors to report in detail for each test. 166 const unsigned kErrorReportLimit = 8; 167 168 typedef void (MacroAssembler::*Fn)(Condition cond, 169 Register rd, 170 Register rn, 171 const Operand& op); 172 173 void TestHelper(Fn instruction, 174 const char* mnemonic, 175 const TestResult reference[]) { 176 unsigned total_error_count = 0; 177 MacroAssembler masm(BUF_SIZE); 178 179 masm.UseT32(); 180 181 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) { 182 // Values to pass to the macro-assembler. 183 Condition cond = kTests[i].operands.cond; 184 Register rd = kTests[i].operands.rd; 185 Register rn = kTests[i].operands.rn; 186 int32_t immediate = kTests[i].operands.immediate; 187 Operand op(immediate); 188 189 int32_t start = masm.GetCursorOffset(); 190 { 191 // We never generate more that 4 bytes, as IT instructions are only 192 // allowed for narrow encodings. 193 ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize); 194 if (kTests[i].in_it_block) { 195 masm.it(kTests[i].it_condition); 196 } 197 (masm.*instruction)(cond, rd, rn, op); 198 } 199 int32_t end = masm.GetCursorOffset(); 200 201 const byte* result_ptr = 202 masm.GetBuffer()->GetOffsetAddress<const byte*>(start); 203 VIXL_ASSERT(start < end); 204 uint32_t result_size = end - start; 205 206 if (Test::generate_test_trace()) { 207 // Print the result bytes. 208 printf("const byte kInstruction_%s_%s[] = {\n", 209 mnemonic, 210 kTests[i].identifier); 211 for (uint32_t j = 0; j < result_size; j++) { 212 if (j == 0) { 213 printf(" 0x%02" PRIx8, result_ptr[j]); 214 } else { 215 printf(", 0x%02" PRIx8, result_ptr[j]); 216 } 217 } 218 // This comment is meant to be used by external tools to validate 219 // the encoding. We can parse the comment to figure out what 220 // instruction this corresponds to. 221 if (kTests[i].in_it_block) { 222 printf(" // It %s; %s %s\n};\n", 223 kTests[i].it_condition.GetName(), 224 mnemonic, 225 kTests[i].operands_description); 226 } else { 227 printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description); 228 } 229 } else { 230 // Check we've emitted the exact same encoding as present in the 231 // trace file. Only print up to `kErrorReportLimit` errors. 232 if (((result_size != reference[i].size) || 233 (memcmp(result_ptr, reference[i].encoding, reference[i].size) != 234 0)) && 235 (++total_error_count <= kErrorReportLimit)) { 236 printf("Error when testing \"%s\" with operands \"%s\":\n", 237 mnemonic, 238 kTests[i].operands_description); 239 printf(" Expected: "); 240 for (uint32_t j = 0; j < reference[i].size; j++) { 241 if (j == 0) { 242 printf("0x%02" PRIx8, reference[i].encoding[j]); 243 } else { 244 printf(", 0x%02" PRIx8, reference[i].encoding[j]); 245 } 246 } 247 printf("\n"); 248 printf(" Found: "); 249 for (uint32_t j = 0; j < result_size; j++) { 250 if (j == 0) { 251 printf("0x%02" PRIx8, result_ptr[j]); 252 } else { 253 printf(", 0x%02" PRIx8, result_ptr[j]); 254 } 255 } 256 printf("\n"); 257 } 258 } 259 } 260 261 masm.FinalizeCode(); 262 263 if (Test::generate_test_trace()) { 264 // Finalize the trace file by writing the final `TestResult` array 265 // which links all generated instruction encodings. 266 printf("const TestResult kReference%s[] = {\n", mnemonic); 267 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) { 268 printf(" {\n"); 269 printf(" ARRAY_SIZE(kInstruction_%s_%s),\n", 270 mnemonic, 271 kTests[i].identifier); 272 printf(" kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier); 273 printf(" },\n"); 274 } 275 printf("};\n"); 276 } else { 277 if (total_error_count > kErrorReportLimit) { 278 printf("%u other errors follow.\n", 279 total_error_count - kErrorReportLimit); 280 } 281 // Crash if the test failed. 282 VIXL_CHECK(total_error_count == 0); 283 } 284 } 285 286 // Instantiate tests for each instruction in the list. 287 #define TEST(mnemonic) \ 288 void Test_##mnemonic() { \ 289 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \ 290 } \ 291 Test test_##mnemonic( \ 292 "AARCH32_ASSEMBLER_COND_RDLOW_RNLOW_OPERAND_IMMEDIATE_ZERO_" #mnemonic \ 293 "_T32", \ 294 &Test_##mnemonic); 295 FOREACH_INSTRUCTION(TEST) 296 #undef TEST 297 298 } // namespace 299 #endif 300 301 } // namespace aarch32 302 } // namespace vixl 303
