1 /* 2 * This file was generated automatically by gen-mterp.py for 'armv5te'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7 /* File: c/header.c */ 8 /* 9 * Copyright (C) 2008 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24 /* common includes */ 25 #include "Dalvik.h" 26 #include "interp/InterpDefs.h" 27 #include "mterp/Mterp.h" 28 #include <math.h> // needed for fmod, fmodf 29 #include "mterp/common/FindInterface.h" 30 31 /* 32 * Configuration defines. These affect the C implementations, i.e. the 33 * portable interpreter(s) and C stubs. 34 * 35 * Some defines are controlled by the Makefile, e.g.: 36 * WITH_INSTR_CHECKS 37 * WITH_TRACKREF_CHECKS 38 * EASY_GDB 39 * NDEBUG 40 * 41 * If THREADED_INTERP is not defined, we use a classic "while true / switch" 42 * interpreter. If it is defined, then the tail end of each instruction 43 * handler fetches the next instruction and jumps directly to the handler. 44 * This increases the size of the "Std" interpreter by about 10%, but 45 * provides a speedup of about the same magnitude. 46 * 47 * There's a "hybrid" approach that uses a goto table instead of a switch 48 * statement, avoiding the "is the opcode in range" tests required for switch. 49 * The performance is close to the threaded version, and without the 10% 50 * size increase, but the benchmark results are off enough that it's not 51 * worth adding as a third option. 52 */ 53 #define THREADED_INTERP /* threaded vs. while-loop interpreter */ 54 55 #ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */ 56 # define CHECK_BRANCH_OFFSETS 57 # define CHECK_REGISTER_INDICES 58 #endif 59 60 /* 61 * ARM EABI requires 64-bit alignment for access to 64-bit data types. We 62 * can't just use pointers to copy 64-bit values out of our interpreted 63 * register set, because gcc will generate ldrd/strd. 64 * 65 * The __UNION version copies data in and out of a union. The __MEMCPY 66 * version uses a memcpy() call to do the transfer; gcc is smart enough to 67 * not actually call memcpy(). The __UNION version is very bad on ARM; 68 * it only uses one more instruction than __MEMCPY, but for some reason 69 * gcc thinks it needs separate storage for every instance of the union. 70 * On top of that, it feels the need to zero them out at the start of the 71 * method. Net result is we zero out ~700 bytes of stack space at the top 72 * of the interpreter using ARM STM instructions. 73 */ 74 #if defined(__ARM_EABI__) 75 //# define NO_UNALIGN_64__UNION 76 # define NO_UNALIGN_64__MEMCPY 77 #endif 78 79 //#define LOG_INSTR /* verbose debugging */ 80 /* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */ 81 82 /* 83 * Keep a tally of accesses to fields. Currently only works if full DEX 84 * optimization is disabled. 85 */ 86 #ifdef PROFILE_FIELD_ACCESS 87 # define UPDATE_FIELD_GET(_field) { (_field)->gets++; } 88 # define UPDATE_FIELD_PUT(_field) { (_field)->puts++; } 89 #else 90 # define UPDATE_FIELD_GET(_field) ((void)0) 91 # define UPDATE_FIELD_PUT(_field) ((void)0) 92 #endif 93 94 /* 95 * Export another copy of the PC on every instruction; this is largely 96 * redundant with EXPORT_PC and the debugger code. This value can be 97 * compared against what we have stored on the stack with EXPORT_PC to 98 * help ensure that we aren't missing any export calls. 99 */ 100 #if WITH_EXTRA_GC_CHECKS > 1 101 # define EXPORT_EXTRA_PC() (self->currentPc2 = pc) 102 #else 103 # define EXPORT_EXTRA_PC() 104 #endif 105 106 /* 107 * Adjust the program counter. "_offset" is a signed int, in 16-bit units. 108 * 109 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns". 110 * 111 * We don't advance the program counter until we finish an instruction or 112 * branch, because we do want to have to unroll the PC if there's an 113 * exception. 114 */ 115 #ifdef CHECK_BRANCH_OFFSETS 116 # define ADJUST_PC(_offset) do { \ 117 int myoff = _offset; /* deref only once */ \ 118 if (pc + myoff < curMethod->insns || \ 119 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \ 120 { \ 121 char* desc; \ 122 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \ 123 LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \ 124 myoff, (int) (pc - curMethod->insns), \ 125 curMethod->clazz->descriptor, curMethod->name, desc); \ 126 free(desc); \ 127 dvmAbort(); \ 128 } \ 129 pc += myoff; \ 130 EXPORT_EXTRA_PC(); \ 131 } while (false) 132 #else 133 # define ADJUST_PC(_offset) do { \ 134 pc += _offset; \ 135 EXPORT_EXTRA_PC(); \ 136 } while (false) 137 #endif 138 139 /* 140 * If enabled, log instructions as we execute them. 141 */ 142 #ifdef LOG_INSTR 143 # define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__) 144 # define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__) 145 # define ILOG(_level, ...) do { \ 146 char debugStrBuf[128]; \ 147 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \ 148 if (curMethod != NULL) \ 149 LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \ 150 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \ 151 else \ 152 LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \ 153 self->threadId, debugStrBuf); \ 154 } while(false) 155 void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly); 156 # define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly) 157 static const char kSpacing[] = " "; 158 #else 159 # define ILOGD(...) ((void)0) 160 # define ILOGV(...) ((void)0) 161 # define DUMP_REGS(_meth, _frame, _inOnly) ((void)0) 162 #endif 163 164 /* get a long from an array of u4 */ 165 static inline s8 getLongFromArray(const u4* ptr, int idx) 166 { 167 #if defined(NO_UNALIGN_64__UNION) 168 union { s8 ll; u4 parts[2]; } conv; 169 170 ptr += idx; 171 conv.parts[0] = ptr[0]; 172 conv.parts[1] = ptr[1]; 173 return conv.ll; 174 #elif defined(NO_UNALIGN_64__MEMCPY) 175 s8 val; 176 memcpy(&val, &ptr[idx], 8); 177 return val; 178 #else 179 return *((s8*) &ptr[idx]); 180 #endif 181 } 182 183 /* store a long into an array of u4 */ 184 static inline void putLongToArray(u4* ptr, int idx, s8 val) 185 { 186 #if defined(NO_UNALIGN_64__UNION) 187 union { s8 ll; u4 parts[2]; } conv; 188 189 ptr += idx; 190 conv.ll = val; 191 ptr[0] = conv.parts[0]; 192 ptr[1] = conv.parts[1]; 193 #elif defined(NO_UNALIGN_64__MEMCPY) 194 memcpy(&ptr[idx], &val, 8); 195 #else 196 *((s8*) &ptr[idx]) = val; 197 #endif 198 } 199 200 /* get a double from an array of u4 */ 201 static inline double getDoubleFromArray(const u4* ptr, int idx) 202 { 203 #if defined(NO_UNALIGN_64__UNION) 204 union { double d; u4 parts[2]; } conv; 205 206 ptr += idx; 207 conv.parts[0] = ptr[0]; 208 conv.parts[1] = ptr[1]; 209 return conv.d; 210 #elif defined(NO_UNALIGN_64__MEMCPY) 211 double dval; 212 memcpy(&dval, &ptr[idx], 8); 213 return dval; 214 #else 215 return *((double*) &ptr[idx]); 216 #endif 217 } 218 219 /* store a double into an array of u4 */ 220 static inline void putDoubleToArray(u4* ptr, int idx, double dval) 221 { 222 #if defined(NO_UNALIGN_64__UNION) 223 union { double d; u4 parts[2]; } conv; 224 225 ptr += idx; 226 conv.d = dval; 227 ptr[0] = conv.parts[0]; 228 ptr[1] = conv.parts[1]; 229 #elif defined(NO_UNALIGN_64__MEMCPY) 230 memcpy(&ptr[idx], &dval, 8); 231 #else 232 *((double*) &ptr[idx]) = dval; 233 #endif 234 } 235 236 /* 237 * If enabled, validate the register number on every access. Otherwise, 238 * just do an array access. 239 * 240 * Assumes the existence of "u4* fp". 241 * 242 * "_idx" may be referenced more than once. 243 */ 244 #ifdef CHECK_REGISTER_INDICES 245 # define GET_REGISTER(_idx) \ 246 ( (_idx) < curMethod->registersSize ? \ 247 (fp[(_idx)]) : (assert(!"bad reg"),1969) ) 248 # define SET_REGISTER(_idx, _val) \ 249 ( (_idx) < curMethod->registersSize ? \ 250 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) ) 251 # define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx)) 252 # define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 253 # define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx)) 254 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 255 # define GET_REGISTER_WIDE(_idx) \ 256 ( (_idx) < curMethod->registersSize-1 ? \ 257 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) ) 258 # define SET_REGISTER_WIDE(_idx, _val) \ 259 ( (_idx) < curMethod->registersSize-1 ? \ 260 putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) ) 261 # define GET_REGISTER_FLOAT(_idx) \ 262 ( (_idx) < curMethod->registersSize ? \ 263 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) ) 264 # define SET_REGISTER_FLOAT(_idx, _val) \ 265 ( (_idx) < curMethod->registersSize ? \ 266 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) ) 267 # define GET_REGISTER_DOUBLE(_idx) \ 268 ( (_idx) < curMethod->registersSize-1 ? \ 269 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) ) 270 # define SET_REGISTER_DOUBLE(_idx, _val) \ 271 ( (_idx) < curMethod->registersSize-1 ? \ 272 putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) ) 273 #else 274 # define GET_REGISTER(_idx) (fp[(_idx)]) 275 # define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val)) 276 # define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)]) 277 # define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val)) 278 # define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx)) 279 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 280 # define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx)) 281 # define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val)) 282 # define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)])) 283 # define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val)) 284 # define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx)) 285 # define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val)) 286 #endif 287 288 /* 289 * Get 16 bits from the specified offset of the program counter. We always 290 * want to load 16 bits at a time from the instruction stream -- it's more 291 * efficient than 8 and won't have the alignment problems that 32 might. 292 * 293 * Assumes existence of "const u2* pc". 294 */ 295 #define FETCH(_offset) (pc[(_offset)]) 296 297 /* 298 * Extract instruction byte from 16-bit fetch (_inst is a u2). 299 */ 300 #define INST_INST(_inst) ((_inst) & 0xff) 301 302 /* 303 * Replace the opcode (used when handling breakpoints). _opcode is a u1. 304 */ 305 #define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode) 306 307 /* 308 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2). 309 */ 310 #define INST_A(_inst) (((_inst) >> 8) & 0x0f) 311 #define INST_B(_inst) ((_inst) >> 12) 312 313 /* 314 * Get the 8-bit "vAA" 8-bit register index from the instruction word. 315 * (_inst is u2) 316 */ 317 #define INST_AA(_inst) ((_inst) >> 8) 318 319 /* 320 * The current PC must be available to Throwable constructors, e.g. 321 * those created by dvmThrowException(), so that the exception stack 322 * trace can be generated correctly. If we don't do this, the offset 323 * within the current method won't be shown correctly. See the notes 324 * in Exception.c. 325 * 326 * This is also used to determine the address for precise GC. 327 * 328 * Assumes existence of "u4* fp" and "const u2* pc". 329 */ 330 #define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc) 331 332 /* 333 * Determine if we need to switch to a different interpreter. "_current" 334 * is either INTERP_STD or INTERP_DBG. It should be fixed for a given 335 * interpreter generation file, which should remove the outer conditional 336 * from the following. 337 * 338 * If we're building without debug and profiling support, we never switch. 339 */ 340 #if defined(WITH_JIT) 341 # define NEED_INTERP_SWITCH(_current) ( \ 342 (_current == INTERP_STD) ? \ 343 dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() ) 344 #else 345 # define NEED_INTERP_SWITCH(_current) ( \ 346 (_current == INTERP_STD) ? \ 347 dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() ) 348 #endif 349 350 /* 351 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the 352 * pc has already been exported to the stack. 353 * 354 * Perform additional checks on debug builds. 355 * 356 * Use this to check for NULL when the instruction handler calls into 357 * something that could throw an exception (so we have already called 358 * EXPORT_PC at the top). 359 */ 360 static inline bool checkForNull(Object* obj) 361 { 362 if (obj == NULL) { 363 dvmThrowException("Ljava/lang/NullPointerException;", NULL); 364 return false; 365 } 366 #ifdef WITH_EXTRA_OBJECT_VALIDATION 367 if (!dvmIsValidObject(obj)) { 368 LOGE("Invalid object %p\n", obj); 369 dvmAbort(); 370 } 371 #endif 372 #ifndef NDEBUG 373 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 374 /* probable heap corruption */ 375 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj); 376 dvmAbort(); 377 } 378 #endif 379 return true; 380 } 381 382 /* 383 * Check to see if "obj" is NULL. If so, export the PC into the stack 384 * frame and throw an exception. 385 * 386 * Perform additional checks on debug builds. 387 * 388 * Use this to check for NULL when the instruction handler doesn't do 389 * anything else that can throw an exception. 390 */ 391 static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc) 392 { 393 if (obj == NULL) { 394 EXPORT_PC(); 395 dvmThrowException("Ljava/lang/NullPointerException;", NULL); 396 return false; 397 } 398 #ifdef WITH_EXTRA_OBJECT_VALIDATION 399 if (!dvmIsValidObject(obj)) { 400 LOGE("Invalid object %p\n", obj); 401 dvmAbort(); 402 } 403 #endif 404 #ifndef NDEBUG 405 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 406 /* probable heap corruption */ 407 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj); 408 dvmAbort(); 409 } 410 #endif 411 return true; 412 } 413 414 /* File: cstubs/stubdefs.c */ 415 /* this is a standard (no debug support) interpreter */ 416 #define INTERP_TYPE INTERP_STD 417 #define CHECK_DEBUG_AND_PROF() ((void)0) 418 # define CHECK_TRACKED_REFS() ((void)0) 419 #define CHECK_JIT_BOOL() (false) 420 #define CHECK_JIT_VOID() 421 #define ABORT_JIT_TSELECT() ((void)0) 422 423 /* 424 * In the C mterp stubs, "goto" is a function call followed immediately 425 * by a return. 426 */ 427 428 #define GOTO_TARGET_DECL(_target, ...) \ 429 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__); 430 431 #define GOTO_TARGET(_target, ...) \ 432 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__) { \ 433 u2 ref, vsrc1, vsrc2, vdst; \ 434 u2 inst = FETCH(0); \ 435 const Method* methodToCall; \ 436 StackSaveArea* debugSaveArea; 437 438 #define GOTO_TARGET_END } 439 440 /* 441 * Redefine what used to be local variable accesses into MterpGlue struct 442 * references. (These are undefined down in "footer.c".) 443 */ 444 #define retval glue->retval 445 #define pc glue->pc 446 #define fp glue->fp 447 #define curMethod glue->method 448 #define methodClassDex glue->methodClassDex 449 #define self glue->self 450 #define debugTrackedRefStart glue->debugTrackedRefStart 451 452 /* ugh */ 453 #define STUB_HACK(x) x 454 455 456 /* 457 * Opcode handler framing macros. Here, each opcode is a separate function 458 * that takes a "glue" argument and returns void. We can't declare 459 * these "static" because they may be called from an assembly stub. 460 */ 461 #define HANDLE_OPCODE(_op) \ 462 void dvmMterp_##_op(MterpGlue* glue) { \ 463 u2 ref, vsrc1, vsrc2, vdst; \ 464 u2 inst = FETCH(0); 465 466 #define OP_END } 467 468 /* 469 * Like the "portable" FINISH, but don't reload "inst", and return to caller 470 * when done. 471 */ 472 #define FINISH(_offset) { \ 473 ADJUST_PC(_offset); \ 474 CHECK_DEBUG_AND_PROF(); \ 475 CHECK_TRACKED_REFS(); \ 476 return; \ 477 } 478 479 480 /* 481 * The "goto label" statements turn into function calls followed by 482 * return statements. Some of the functions take arguments, which in the 483 * portable interpreter are handled by assigning values to globals. 484 */ 485 486 #define GOTO_exceptionThrown() \ 487 do { \ 488 dvmMterp_exceptionThrown(glue); \ 489 return; \ 490 } while(false) 491 492 #define GOTO_returnFromMethod() \ 493 do { \ 494 dvmMterp_returnFromMethod(glue); \ 495 return; \ 496 } while(false) 497 498 #define GOTO_invoke(_target, _methodCallRange) \ 499 do { \ 500 dvmMterp_##_target(glue, _methodCallRange); \ 501 return; \ 502 } while(false) 503 504 #define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \ 505 do { \ 506 dvmMterp_invokeMethod(glue, _methodCallRange, _methodToCall, \ 507 _vsrc1, _vdst); \ 508 return; \ 509 } while(false) 510 511 /* 512 * As a special case, "goto bail" turns into a longjmp. Use "bail_switch" 513 * if we need to switch to the other interpreter upon our return. 514 */ 515 #define GOTO_bail() \ 516 dvmMterpStdBail(glue, false); 517 #define GOTO_bail_switch() \ 518 dvmMterpStdBail(glue, true); 519 520 /* 521 * Periodically check for thread suspension. 522 * 523 * While we're at it, see if a debugger has attached or the profiler has 524 * started. If so, switch to a different "goto" table. 525 */ 526 #define PERIODIC_CHECKS(_entryPoint, _pcadj) { \ 527 if (dvmCheckSuspendQuick(self)) { \ 528 EXPORT_PC(); /* need for precise GC */ \ 529 dvmCheckSuspendPending(self); \ 530 } \ 531 if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \ 532 ADJUST_PC(_pcadj); \ 533 glue->entryPoint = _entryPoint; \ 534 LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \ 535 self->threadId, (_entryPoint), (_pcadj)); \ 536 GOTO_bail_switch(); \ 537 } \ 538 } 539 540 /* File: c/opcommon.c */ 541 /* forward declarations of goto targets */ 542 GOTO_TARGET_DECL(filledNewArray, bool methodCallRange); 543 GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange); 544 GOTO_TARGET_DECL(invokeSuper, bool methodCallRange); 545 GOTO_TARGET_DECL(invokeInterface, bool methodCallRange); 546 GOTO_TARGET_DECL(invokeDirect, bool methodCallRange); 547 GOTO_TARGET_DECL(invokeStatic, bool methodCallRange); 548 GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange); 549 GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange); 550 GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall, 551 u2 count, u2 regs); 552 GOTO_TARGET_DECL(returnFromMethod); 553 GOTO_TARGET_DECL(exceptionThrown); 554 555 /* 556 * =========================================================================== 557 * 558 * What follows are opcode definitions shared between multiple opcodes with 559 * minor substitutions handled by the C pre-processor. These should probably 560 * use the mterp substitution mechanism instead, with the code here moved 561 * into common fragment files (like the asm "binop.S"), although it's hard 562 * to give up the C preprocessor in favor of the much simpler text subst. 563 * 564 * =========================================================================== 565 */ 566 567 #define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \ 568 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 569 vdst = INST_A(inst); \ 570 vsrc1 = INST_B(inst); \ 571 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 572 SET_REGISTER##_totype(vdst, \ 573 GET_REGISTER##_fromtype(vsrc1)); \ 574 FINISH(1); 575 576 #define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \ 577 _tovtype, _tortype) \ 578 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 579 { \ 580 /* spec defines specific handling for +/- inf and NaN values */ \ 581 _fromvtype val; \ 582 _tovtype intMin, intMax, result; \ 583 vdst = INST_A(inst); \ 584 vsrc1 = INST_B(inst); \ 585 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 586 val = GET_REGISTER##_fromrtype(vsrc1); \ 587 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \ 588 intMax = ~intMin; \ 589 result = (_tovtype) val; \ 590 if (val >= intMax) /* +inf */ \ 591 result = intMax; \ 592 else if (val <= intMin) /* -inf */ \ 593 result = intMin; \ 594 else if (val != val) /* NaN */ \ 595 result = 0; \ 596 else \ 597 result = (_tovtype) val; \ 598 SET_REGISTER##_tortype(vdst, result); \ 599 } \ 600 FINISH(1); 601 602 #define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \ 603 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 604 vdst = INST_A(inst); \ 605 vsrc1 = INST_B(inst); \ 606 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \ 607 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \ 608 FINISH(1); 609 610 /* NOTE: the comparison result is always a signed 4-byte integer */ 611 #define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \ 612 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 613 { \ 614 int result; \ 615 u2 regs; \ 616 _varType val1, val2; \ 617 vdst = INST_AA(inst); \ 618 regs = FETCH(1); \ 619 vsrc1 = regs & 0xff; \ 620 vsrc2 = regs >> 8; \ 621 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 622 val1 = GET_REGISTER##_type(vsrc1); \ 623 val2 = GET_REGISTER##_type(vsrc2); \ 624 if (val1 == val2) \ 625 result = 0; \ 626 else if (val1 < val2) \ 627 result = -1; \ 628 else if (val1 > val2) \ 629 result = 1; \ 630 else \ 631 result = (_nanVal); \ 632 ILOGV("+ result=%d\n", result); \ 633 SET_REGISTER(vdst, result); \ 634 } \ 635 FINISH(2); 636 637 #define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \ 638 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \ 639 vsrc1 = INST_A(inst); \ 640 vsrc2 = INST_B(inst); \ 641 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \ 642 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 643 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \ 644 branchOffset); \ 645 ILOGV("> branch taken"); \ 646 if (branchOffset < 0) \ 647 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \ 648 FINISH(branchOffset); \ 649 } else { \ 650 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \ 651 FINISH(2); \ 652 } 653 654 #define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \ 655 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \ 656 vsrc1 = INST_AA(inst); \ 657 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \ 658 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 659 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \ 660 ILOGV("> branch taken"); \ 661 if (branchOffset < 0) \ 662 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \ 663 FINISH(branchOffset); \ 664 } else { \ 665 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \ 666 FINISH(2); \ 667 } 668 669 #define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \ 670 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 671 vdst = INST_A(inst); \ 672 vsrc1 = INST_B(inst); \ 673 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 674 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \ 675 FINISH(1); 676 677 #define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \ 678 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 679 { \ 680 u2 srcRegs; \ 681 vdst = INST_AA(inst); \ 682 srcRegs = FETCH(1); \ 683 vsrc1 = srcRegs & 0xff; \ 684 vsrc2 = srcRegs >> 8; \ 685 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 686 if (_chkdiv != 0) { \ 687 s4 firstVal, secondVal, result; \ 688 firstVal = GET_REGISTER(vsrc1); \ 689 secondVal = GET_REGISTER(vsrc2); \ 690 if (secondVal == 0) { \ 691 EXPORT_PC(); \ 692 dvmThrowException("Ljava/lang/ArithmeticException;", \ 693 "divide by zero"); \ 694 GOTO_exceptionThrown(); \ 695 } \ 696 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 697 if (_chkdiv == 1) \ 698 result = firstVal; /* division */ \ 699 else \ 700 result = 0; /* remainder */ \ 701 } else { \ 702 result = firstVal _op secondVal; \ 703 } \ 704 SET_REGISTER(vdst, result); \ 705 } else { \ 706 /* non-div/rem case */ \ 707 SET_REGISTER(vdst, \ 708 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \ 709 } \ 710 } \ 711 FINISH(2); 712 713 #define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \ 714 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 715 { \ 716 u2 srcRegs; \ 717 vdst = INST_AA(inst); \ 718 srcRegs = FETCH(1); \ 719 vsrc1 = srcRegs & 0xff; \ 720 vsrc2 = srcRegs >> 8; \ 721 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 722 SET_REGISTER(vdst, \ 723 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \ 724 } \ 725 FINISH(2); 726 727 #define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \ 728 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \ 729 vdst = INST_A(inst); \ 730 vsrc1 = INST_B(inst); \ 731 vsrc2 = FETCH(1); \ 732 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \ 733 (_opname), vdst, vsrc1, vsrc2); \ 734 if (_chkdiv != 0) { \ 735 s4 firstVal, result; \ 736 firstVal = GET_REGISTER(vsrc1); \ 737 if ((s2) vsrc2 == 0) { \ 738 EXPORT_PC(); \ 739 dvmThrowException("Ljava/lang/ArithmeticException;", \ 740 "divide by zero"); \ 741 GOTO_exceptionThrown(); \ 742 } \ 743 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \ 744 /* won't generate /lit16 instr for this; check anyway */ \ 745 if (_chkdiv == 1) \ 746 result = firstVal; /* division */ \ 747 else \ 748 result = 0; /* remainder */ \ 749 } else { \ 750 result = firstVal _op (s2) vsrc2; \ 751 } \ 752 SET_REGISTER(vdst, result); \ 753 } else { \ 754 /* non-div/rem case */ \ 755 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \ 756 } \ 757 FINISH(2); 758 759 #define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \ 760 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 761 { \ 762 u2 litInfo; \ 763 vdst = INST_AA(inst); \ 764 litInfo = FETCH(1); \ 765 vsrc1 = litInfo & 0xff; \ 766 vsrc2 = litInfo >> 8; /* constant */ \ 767 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 768 (_opname), vdst, vsrc1, vsrc2); \ 769 if (_chkdiv != 0) { \ 770 s4 firstVal, result; \ 771 firstVal = GET_REGISTER(vsrc1); \ 772 if ((s1) vsrc2 == 0) { \ 773 EXPORT_PC(); \ 774 dvmThrowException("Ljava/lang/ArithmeticException;", \ 775 "divide by zero"); \ 776 GOTO_exceptionThrown(); \ 777 } \ 778 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \ 779 if (_chkdiv == 1) \ 780 result = firstVal; /* division */ \ 781 else \ 782 result = 0; /* remainder */ \ 783 } else { \ 784 result = firstVal _op ((s1) vsrc2); \ 785 } \ 786 SET_REGISTER(vdst, result); \ 787 } else { \ 788 SET_REGISTER(vdst, \ 789 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \ 790 } \ 791 } \ 792 FINISH(2); 793 794 #define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \ 795 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 796 { \ 797 u2 litInfo; \ 798 vdst = INST_AA(inst); \ 799 litInfo = FETCH(1); \ 800 vsrc1 = litInfo & 0xff; \ 801 vsrc2 = litInfo >> 8; /* constant */ \ 802 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 803 (_opname), vdst, vsrc1, vsrc2); \ 804 SET_REGISTER(vdst, \ 805 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \ 806 } \ 807 FINISH(2); 808 809 #define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \ 810 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 811 vdst = INST_A(inst); \ 812 vsrc1 = INST_B(inst); \ 813 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 814 if (_chkdiv != 0) { \ 815 s4 firstVal, secondVal, result; \ 816 firstVal = GET_REGISTER(vdst); \ 817 secondVal = GET_REGISTER(vsrc1); \ 818 if (secondVal == 0) { \ 819 EXPORT_PC(); \ 820 dvmThrowException("Ljava/lang/ArithmeticException;", \ 821 "divide by zero"); \ 822 GOTO_exceptionThrown(); \ 823 } \ 824 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 825 if (_chkdiv == 1) \ 826 result = firstVal; /* division */ \ 827 else \ 828 result = 0; /* remainder */ \ 829 } else { \ 830 result = firstVal _op secondVal; \ 831 } \ 832 SET_REGISTER(vdst, result); \ 833 } else { \ 834 SET_REGISTER(vdst, \ 835 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \ 836 } \ 837 FINISH(1); 838 839 #define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \ 840 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 841 vdst = INST_A(inst); \ 842 vsrc1 = INST_B(inst); \ 843 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 844 SET_REGISTER(vdst, \ 845 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \ 846 FINISH(1); 847 848 #define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \ 849 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 850 { \ 851 u2 srcRegs; \ 852 vdst = INST_AA(inst); \ 853 srcRegs = FETCH(1); \ 854 vsrc1 = srcRegs & 0xff; \ 855 vsrc2 = srcRegs >> 8; \ 856 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 857 if (_chkdiv != 0) { \ 858 s8 firstVal, secondVal, result; \ 859 firstVal = GET_REGISTER_WIDE(vsrc1); \ 860 secondVal = GET_REGISTER_WIDE(vsrc2); \ 861 if (secondVal == 0LL) { \ 862 EXPORT_PC(); \ 863 dvmThrowException("Ljava/lang/ArithmeticException;", \ 864 "divide by zero"); \ 865 GOTO_exceptionThrown(); \ 866 } \ 867 if ((u8)firstVal == 0x8000000000000000ULL && \ 868 secondVal == -1LL) \ 869 { \ 870 if (_chkdiv == 1) \ 871 result = firstVal; /* division */ \ 872 else \ 873 result = 0; /* remainder */ \ 874 } else { \ 875 result = firstVal _op secondVal; \ 876 } \ 877 SET_REGISTER_WIDE(vdst, result); \ 878 } else { \ 879 SET_REGISTER_WIDE(vdst, \ 880 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \ 881 } \ 882 } \ 883 FINISH(2); 884 885 #define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \ 886 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 887 { \ 888 u2 srcRegs; \ 889 vdst = INST_AA(inst); \ 890 srcRegs = FETCH(1); \ 891 vsrc1 = srcRegs & 0xff; \ 892 vsrc2 = srcRegs >> 8; \ 893 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 894 SET_REGISTER_WIDE(vdst, \ 895 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \ 896 } \ 897 FINISH(2); 898 899 #define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \ 900 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 901 vdst = INST_A(inst); \ 902 vsrc1 = INST_B(inst); \ 903 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 904 if (_chkdiv != 0) { \ 905 s8 firstVal, secondVal, result; \ 906 firstVal = GET_REGISTER_WIDE(vdst); \ 907 secondVal = GET_REGISTER_WIDE(vsrc1); \ 908 if (secondVal == 0LL) { \ 909 EXPORT_PC(); \ 910 dvmThrowException("Ljava/lang/ArithmeticException;", \ 911 "divide by zero"); \ 912 GOTO_exceptionThrown(); \ 913 } \ 914 if ((u8)firstVal == 0x8000000000000000ULL && \ 915 secondVal == -1LL) \ 916 { \ 917 if (_chkdiv == 1) \ 918 result = firstVal; /* division */ \ 919 else \ 920 result = 0; /* remainder */ \ 921 } else { \ 922 result = firstVal _op secondVal; \ 923 } \ 924 SET_REGISTER_WIDE(vdst, result); \ 925 } else { \ 926 SET_REGISTER_WIDE(vdst, \ 927 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\ 928 } \ 929 FINISH(1); 930 931 #define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \ 932 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 933 vdst = INST_A(inst); \ 934 vsrc1 = INST_B(inst); \ 935 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 936 SET_REGISTER_WIDE(vdst, \ 937 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \ 938 FINISH(1); 939 940 #define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \ 941 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 942 { \ 943 u2 srcRegs; \ 944 vdst = INST_AA(inst); \ 945 srcRegs = FETCH(1); \ 946 vsrc1 = srcRegs & 0xff; \ 947 vsrc2 = srcRegs >> 8; \ 948 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 949 SET_REGISTER_FLOAT(vdst, \ 950 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \ 951 } \ 952 FINISH(2); 953 954 #define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \ 955 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 956 { \ 957 u2 srcRegs; \ 958 vdst = INST_AA(inst); \ 959 srcRegs = FETCH(1); \ 960 vsrc1 = srcRegs & 0xff; \ 961 vsrc2 = srcRegs >> 8; \ 962 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 963 SET_REGISTER_DOUBLE(vdst, \ 964 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \ 965 } \ 966 FINISH(2); 967 968 #define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \ 969 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 970 vdst = INST_A(inst); \ 971 vsrc1 = INST_B(inst); \ 972 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 973 SET_REGISTER_FLOAT(vdst, \ 974 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \ 975 FINISH(1); 976 977 #define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \ 978 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 979 vdst = INST_A(inst); \ 980 vsrc1 = INST_B(inst); \ 981 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 982 SET_REGISTER_DOUBLE(vdst, \ 983 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \ 984 FINISH(1); 985 986 #define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \ 987 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 988 { \ 989 ArrayObject* arrayObj; \ 990 u2 arrayInfo; \ 991 EXPORT_PC(); \ 992 vdst = INST_AA(inst); \ 993 arrayInfo = FETCH(1); \ 994 vsrc1 = arrayInfo & 0xff; /* array ptr */ \ 995 vsrc2 = arrayInfo >> 8; /* index */ \ 996 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 997 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 998 if (!checkForNull((Object*) arrayObj)) \ 999 GOTO_exceptionThrown(); \ 1000 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 1001 LOGV("Invalid array access: %p %d (len=%d)\n", \ 1002 arrayObj, vsrc2, arrayObj->length); \ 1003 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \ 1004 NULL); \ 1005 GOTO_exceptionThrown(); \ 1006 } \ 1007 SET_REGISTER##_regsize(vdst, \ 1008 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)]); \ 1009 ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \ 1010 } \ 1011 FINISH(2); 1012 1013 #define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \ 1014 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 1015 { \ 1016 ArrayObject* arrayObj; \ 1017 u2 arrayInfo; \ 1018 EXPORT_PC(); \ 1019 vdst = INST_AA(inst); /* AA: source value */ \ 1020 arrayInfo = FETCH(1); \ 1021 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \ 1022 vsrc2 = arrayInfo >> 8; /* CC: index */ \ 1023 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 1024 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 1025 if (!checkForNull((Object*) arrayObj)) \ 1026 GOTO_exceptionThrown(); \ 1027 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 1028 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \ 1029 NULL); \ 1030 GOTO_exceptionThrown(); \ 1031 } \ 1032 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\ 1033 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)] = \ 1034 GET_REGISTER##_regsize(vdst); \ 1035 } \ 1036 FINISH(2); 1037 1038 /* 1039 * It's possible to get a bad value out of a field with sub-32-bit stores 1040 * because the -quick versions always operate on 32 bits. Consider: 1041 * short foo = -1 (sets a 32-bit register to 0xffffffff) 1042 * iput-quick foo (writes all 32 bits to the field) 1043 * short bar = 1 (sets a 32-bit register to 0x00000001) 1044 * iput-short (writes the low 16 bits to the field) 1045 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001) 1046 * This can only happen when optimized and non-optimized code has interleaved 1047 * access to the same field. This is unlikely but possible. 1048 * 1049 * The easiest way to fix this is to always read/write 32 bits at a time. On 1050 * a device with a 16-bit data bus this is sub-optimal. (The alternative 1051 * approach is to have sub-int versions of iget-quick, but now we're wasting 1052 * Dalvik instruction space and making it less likely that handler code will 1053 * already be in the CPU i-cache.) 1054 */ 1055 #define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \ 1056 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1057 { \ 1058 InstField* ifield; \ 1059 Object* obj; \ 1060 EXPORT_PC(); \ 1061 vdst = INST_A(inst); \ 1062 vsrc1 = INST_B(inst); /* object ptr */ \ 1063 ref = FETCH(1); /* field ref */ \ 1064 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1065 obj = (Object*) GET_REGISTER(vsrc1); \ 1066 if (!checkForNull(obj)) \ 1067 GOTO_exceptionThrown(); \ 1068 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1069 if (ifield == NULL) { \ 1070 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1071 if (ifield == NULL) \ 1072 GOTO_exceptionThrown(); \ 1073 } \ 1074 SET_REGISTER##_regsize(vdst, \ 1075 dvmGetField##_ftype(obj, ifield->byteOffset)); \ 1076 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \ 1077 (u8) GET_REGISTER##_regsize(vdst)); \ 1078 UPDATE_FIELD_GET(&ifield->field); \ 1079 } \ 1080 FINISH(2); 1081 1082 #define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1083 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1084 { \ 1085 Object* obj; \ 1086 vdst = INST_A(inst); \ 1087 vsrc1 = INST_B(inst); /* object ptr */ \ 1088 ref = FETCH(1); /* field offset */ \ 1089 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \ 1090 (_opname), vdst, vsrc1, ref); \ 1091 obj = (Object*) GET_REGISTER(vsrc1); \ 1092 if (!checkForNullExportPC(obj, fp, pc)) \ 1093 GOTO_exceptionThrown(); \ 1094 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \ 1095 ILOGV("+ IGETQ %d=0x%08llx", ref, \ 1096 (u8) GET_REGISTER##_regsize(vdst)); \ 1097 } \ 1098 FINISH(2); 1099 1100 #define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \ 1101 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1102 { \ 1103 InstField* ifield; \ 1104 Object* obj; \ 1105 EXPORT_PC(); \ 1106 vdst = INST_A(inst); \ 1107 vsrc1 = INST_B(inst); /* object ptr */ \ 1108 ref = FETCH(1); /* field ref */ \ 1109 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1110 obj = (Object*) GET_REGISTER(vsrc1); \ 1111 if (!checkForNull(obj)) \ 1112 GOTO_exceptionThrown(); \ 1113 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1114 if (ifield == NULL) { \ 1115 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1116 if (ifield == NULL) \ 1117 GOTO_exceptionThrown(); \ 1118 } \ 1119 dvmSetField##_ftype(obj, ifield->byteOffset, \ 1120 GET_REGISTER##_regsize(vdst)); \ 1121 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \ 1122 (u8) GET_REGISTER##_regsize(vdst)); \ 1123 UPDATE_FIELD_PUT(&ifield->field); \ 1124 } \ 1125 FINISH(2); 1126 1127 #define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1128 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1129 { \ 1130 Object* obj; \ 1131 vdst = INST_A(inst); \ 1132 vsrc1 = INST_B(inst); /* object ptr */ \ 1133 ref = FETCH(1); /* field offset */ \ 1134 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \ 1135 (_opname), vdst, vsrc1, ref); \ 1136 obj = (Object*) GET_REGISTER(vsrc1); \ 1137 if (!checkForNullExportPC(obj, fp, pc)) \ 1138 GOTO_exceptionThrown(); \ 1139 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \ 1140 ILOGV("+ IPUTQ %d=0x%08llx", ref, \ 1141 (u8) GET_REGISTER##_regsize(vdst)); \ 1142 } \ 1143 FINISH(2); 1144 1145 /* 1146 * The JIT needs dvmDexGetResolvedField() to return non-null. 1147 * Since we use the portable interpreter to build the trace, the extra 1148 * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp. 1149 */ 1150 #define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \ 1151 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1152 { \ 1153 StaticField* sfield; \ 1154 vdst = INST_AA(inst); \ 1155 ref = FETCH(1); /* field ref */ \ 1156 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1157 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1158 if (sfield == NULL) { \ 1159 EXPORT_PC(); \ 1160 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1161 if (sfield == NULL) \ 1162 GOTO_exceptionThrown(); \ 1163 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1164 ABORT_JIT_TSELECT(); \ 1165 } \ 1166 } \ 1167 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \ 1168 ILOGV("+ SGET '%s'=0x%08llx", \ 1169 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1170 UPDATE_FIELD_GET(&sfield->field); \ 1171 } \ 1172 FINISH(2); 1173 1174 #define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \ 1175 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1176 { \ 1177 StaticField* sfield; \ 1178 vdst = INST_AA(inst); \ 1179 ref = FETCH(1); /* field ref */ \ 1180 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1181 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1182 if (sfield == NULL) { \ 1183 EXPORT_PC(); \ 1184 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1185 if (sfield == NULL) \ 1186 GOTO_exceptionThrown(); \ 1187 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1188 ABORT_JIT_TSELECT(); \ 1189 } \ 1190 } \ 1191 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \ 1192 ILOGV("+ SPUT '%s'=0x%08llx", \ 1193 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1194 UPDATE_FIELD_PUT(&sfield->field); \ 1195 } \ 1196 FINISH(2); 1197 1198 /* File: cstubs/enddefs.c */ 1199 1200 /* undefine "magic" name remapping */ 1201 #undef retval 1202 #undef pc 1203 #undef fp 1204 #undef curMethod 1205 #undef methodClassDex 1206 #undef self 1207 #undef debugTrackedRefStart 1208 1209 /* File: armv5te/debug.c */ 1210 #include <inttypes.h> 1211 1212 /* 1213 * Dump the fixed-purpose ARM registers, along with some other info. 1214 * 1215 * This function MUST be compiled in ARM mode -- THUMB will yield bogus 1216 * results. 1217 * 1218 * This will NOT preserve r0-r3/ip. 1219 */ 1220 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) 1221 { 1222 register uint32_t rPC asm("r4"); 1223 register uint32_t rFP asm("r5"); 1224 register uint32_t rGLUE asm("r6"); 1225 register uint32_t rINST asm("r7"); 1226 register uint32_t rIBASE asm("r8"); 1227 register uint32_t r9 asm("r9"); 1228 register uint32_t r10 asm("r10"); 1229 1230 //extern char dvmAsmInstructionStart[]; 1231 1232 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3); 1233 printf(" : rPC=%08x rFP=%08x rGLUE=%08x rINST=%08x\n", 1234 rPC, rFP, rGLUE, rINST); 1235 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10); 1236 1237 //MterpGlue* glue = (MterpGlue*) rGLUE; 1238 //const Method* method = glue->method; 1239 printf(" + self is %p\n", dvmThreadSelf()); 1240 //printf(" + currently in %s.%s %s\n", 1241 // method->clazz->descriptor, method->name, method->shorty); 1242 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart); 1243 //printf(" + next handler for 0x%02x = %p\n", 1244 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64); 1245 } 1246 1247 /* 1248 * Dump the StackSaveArea for the specified frame pointer. 1249 */ 1250 void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea) 1251 { 1252 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp); 1253 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea); 1254 #ifdef EASY_GDB 1255 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n", 1256 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc, 1257 saveArea->method, saveArea->xtra.currentPc); 1258 #else 1259 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n", 1260 saveArea->prevFrame, saveArea->savedPc, 1261 saveArea->method, saveArea->xtra.currentPc, 1262 *(u4*)fp); 1263 #endif 1264 } 1265 1266 /* 1267 * Does the bulk of the work for common_printMethod(). 1268 */ 1269 void dvmMterpPrintMethod(Method* method) 1270 { 1271 /* 1272 * It is a direct (non-virtual) method if it is static, private, 1273 * or a constructor. 1274 */ 1275 bool isDirect = 1276 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) || 1277 (method->name[0] == '<'); 1278 1279 char* desc = dexProtoCopyMethodDescriptor(&method->prototype); 1280 1281 printf("<%c:%s.%s %s> ", 1282 isDirect ? 'D' : 'V', 1283 method->clazz->descriptor, 1284 method->name, 1285 desc); 1286 1287 free(desc); 1288 } 1289 1290
