Home | History | Annotate | Download | only in X86
      1 //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the X86 specific subclass of TargetSubtargetInfo.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef X86SUBTARGET_H
     15 #define X86SUBTARGET_H
     16 
     17 #include "llvm/ADT/Triple.h"
     18 #include "llvm/Target/TargetSubtargetInfo.h"
     19 #include "llvm/CallingConv.h"
     20 #include <string>
     21 
     22 #define GET_SUBTARGETINFO_HEADER
     23 #include "X86GenSubtargetInfo.inc"
     24 
     25 namespace llvm {
     26 class GlobalValue;
     27 class StringRef;
     28 class TargetMachine;
     29 
     30 /// PICStyles - The X86 backend supports a number of different styles of PIC.
     31 ///
     32 namespace PICStyles {
     33 enum Style {
     34   StubPIC,          // Used on i386-darwin in -fPIC mode.
     35   StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
     36   GOT,              // Used on many 32-bit unices in -fPIC mode.
     37   RIPRel,           // Used on X86-64 when not in -static mode.
     38   None              // Set when in -static mode (not PIC or DynamicNoPIC mode).
     39 };
     40 }
     41 
     42 class X86Subtarget : public X86GenSubtargetInfo {
     43 protected:
     44   enum X86SSEEnum {
     45     NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
     46   };
     47 
     48   enum X863DNowEnum {
     49     NoThreeDNow, ThreeDNow, ThreeDNowA
     50   };
     51 
     52   /// PICStyle - Which PIC style to use
     53   ///
     54   PICStyles::Style PICStyle;
     55 
     56   /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
     57   /// none supported.
     58   X86SSEEnum X86SSELevel;
     59 
     60   /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
     61   ///
     62   X863DNowEnum X863DNowLevel;
     63 
     64   /// HasCMov - True if this processor has conditional move instructions
     65   /// (generally pentium pro+).
     66   bool HasCMov;
     67 
     68   /// HasX86_64 - True if the processor supports X86-64 instructions.
     69   ///
     70   bool HasX86_64;
     71 
     72   /// HasPOPCNT - True if the processor supports POPCNT.
     73   bool HasPOPCNT;
     74 
     75   /// HasSSE4A - True if the processor supports SSE4A instructions.
     76   bool HasSSE4A;
     77 
     78   /// HasAVX - Target has AVX instructions
     79   bool HasAVX;
     80 
     81   /// HasAES - Target has AES instructions
     82   bool HasAES;
     83 
     84   /// HasCLMUL - Target has carry-less multiplication
     85   bool HasCLMUL;
     86 
     87   /// HasFMA3 - Target has 3-operand fused multiply-add
     88   bool HasFMA3;
     89 
     90   /// HasFMA4 - Target has 4-operand fused multiply-add
     91   bool HasFMA4;
     92 
     93   /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
     94   bool IsBTMemSlow;
     95 
     96   /// IsUAMemFast - True if unaligned memory access is fast.
     97   bool IsUAMemFast;
     98 
     99   /// HasVectorUAMem - True if SIMD operations can have unaligned memory
    100   /// operands. This may require setting a feature bit in the processor.
    101   bool HasVectorUAMem;
    102 
    103   /// stackAlignment - The minimum alignment known to hold of the stack frame on
    104   /// entry to the function and which must be maintained by every function.
    105   unsigned stackAlignment;
    106 
    107   /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
    108   ///
    109   unsigned MaxInlineSizeThreshold;
    110 
    111   /// TargetTriple - What processor and OS we're targeting.
    112   Triple TargetTriple;
    113 
    114 private:
    115   /// In64BitMode - True if compiling for 64-bit, false for 32-bit.
    116   bool In64BitMode;
    117 
    118 public:
    119 
    120   /// This constructor initializes the data members to match that
    121   /// of the specified triple.
    122   ///
    123   X86Subtarget(const std::string &TT, const std::string &CPU,
    124                const std::string &FS,
    125                unsigned StackAlignOverride, bool is64Bit);
    126 
    127   /// getStackAlignment - Returns the minimum alignment known to hold of the
    128   /// stack frame on entry to the function and which must be maintained by every
    129   /// function for this subtarget.
    130   unsigned getStackAlignment() const { return stackAlignment; }
    131 
    132   /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
    133   /// that still makes it profitable to inline the call.
    134   unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
    135 
    136   /// ParseSubtargetFeatures - Parses features string setting specified
    137   /// subtarget options.  Definition of function is auto generated by tblgen.
    138   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
    139 
    140   /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
    141   /// instruction.
    142   void AutoDetectSubtargetFeatures();
    143 
    144   bool is64Bit() const { return In64BitMode; }
    145 
    146   PICStyles::Style getPICStyle() const { return PICStyle; }
    147   void setPICStyle(PICStyles::Style Style)  { PICStyle = Style; }
    148 
    149   bool hasCMov() const { return HasCMov; }
    150   bool hasMMX() const { return X86SSELevel >= MMX; }
    151   bool hasSSE1() const { return X86SSELevel >= SSE1; }
    152   bool hasSSE2() const { return X86SSELevel >= SSE2; }
    153   bool hasSSE3() const { return X86SSELevel >= SSE3; }
    154   bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
    155   bool hasSSE41() const { return X86SSELevel >= SSE41; }
    156   bool hasSSE42() const { return X86SSELevel >= SSE42; }
    157   bool hasSSE4A() const { return HasSSE4A; }
    158   bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
    159   bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
    160   bool hasPOPCNT() const { return HasPOPCNT; }
    161   bool hasAVX() const { return HasAVX; }
    162   bool hasXMM() const { return hasSSE1() || hasAVX(); }
    163   bool hasXMMInt() const { return hasSSE2() || hasAVX(); }
    164   bool hasAES() const { return HasAES; }
    165   bool hasCLMUL() const { return HasCLMUL; }
    166   bool hasFMA3() const { return HasFMA3; }
    167   bool hasFMA4() const { return HasFMA4; }
    168   bool isBTMemSlow() const { return IsBTMemSlow; }
    169   bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
    170   bool hasVectorUAMem() const { return HasVectorUAMem; }
    171 
    172   const Triple &getTargetTriple() const { return TargetTriple; }
    173 
    174   bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
    175   bool isTargetFreeBSD() const {
    176     return TargetTriple.getOS() == Triple::FreeBSD;
    177   }
    178   bool isTargetSolaris() const {
    179     return TargetTriple.getOS() == Triple::Solaris;
    180   }
    181 
    182   // ELF is a reasonably sane default and the only other X86 targets we
    183   // support are Darwin and Windows. Just use "not those".
    184   bool isTargetELF() const {
    185     return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
    186   }
    187   bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
    188 
    189   bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
    190   bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
    191   bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
    192   bool isTargetCygMing() const {
    193     return isTargetMingw() || isTargetCygwin();
    194   }
    195 
    196   /// isTargetCOFF - Return true if this is any COFF/Windows target variant.
    197   bool isTargetCOFF() const {
    198     return isTargetMingw() || isTargetCygwin() || isTargetWindows();
    199   }
    200 
    201   bool isTargetWin64() const {
    202     // FIXME: x86_64-cygwin has not been released yet.
    203     return In64BitMode && (isTargetCygMing() || isTargetWindows());
    204   }
    205 
    206   bool isTargetEnvMacho() const {
    207     return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO);
    208   }
    209 
    210   bool isTargetWin32() const {
    211     return !In64BitMode && (isTargetMingw() || isTargetWindows());
    212   }
    213 
    214   bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
    215   bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
    216   bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
    217 
    218   bool isPICStyleStubPIC() const {
    219     return PICStyle == PICStyles::StubPIC;
    220   }
    221 
    222   bool isPICStyleStubNoDynamic() const {
    223     return PICStyle == PICStyles::StubDynamicNoPIC;
    224   }
    225   bool isPICStyleStubAny() const {
    226     return PICStyle == PICStyles::StubDynamicNoPIC ||
    227            PICStyle == PICStyles::StubPIC; }
    228 
    229   /// ClassifyGlobalReference - Classify a global variable reference for the
    230   /// current subtarget according to how we should reference it in a non-pcrel
    231   /// context.
    232   unsigned char ClassifyGlobalReference(const GlobalValue *GV,
    233                                         const TargetMachine &TM)const;
    234 
    235   /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
    236   /// current subtarget according to how we should reference it in a non-pcrel
    237   /// context.
    238   unsigned char ClassifyBlockAddressReference() const;
    239 
    240   /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
    241   /// to immediate address.
    242   bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
    243 
    244   /// This function returns the name of a function which has an interface
    245   /// like the non-standard bzero function, if such a function exists on
    246   /// the current subtarget and it is considered prefereable over
    247   /// memset with zero passed as the second argument. Otherwise it
    248   /// returns null.
    249   const char *getBZeroEntry() const;
    250 
    251   /// getSpecialAddressLatency - For targets where it is beneficial to
    252   /// backschedule instructions that compute addresses, return a value
    253   /// indicating the number of scheduling cycles of backscheduling that
    254   /// should be attempted.
    255   unsigned getSpecialAddressLatency() const;
    256 };
    257 
    258 } // End llvm namespace
    259 
    260 #endif
    261