1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the X86 specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #define DEBUG_TYPE "subtarget" 15 #include "X86Subtarget.h" 16 #include "X86InstrInfo.h" 17 #include "llvm/GlobalValue.h" 18 #include "llvm/Support/Debug.h" 19 #include "llvm/Support/raw_ostream.h" 20 #include "llvm/Support/Host.h" 21 #include "llvm/Target/TargetMachine.h" 22 #include "llvm/ADT/SmallVector.h" 23 24 #define GET_SUBTARGETINFO_TARGET_DESC 25 #define GET_SUBTARGETINFO_CTOR 26 #include "X86GenSubtargetInfo.inc" 27 28 using namespace llvm; 29 30 #if defined(_MSC_VER) 31 #include <intrin.h> 32 #endif 33 34 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the 35 /// current subtarget according to how we should reference it in a non-pcrel 36 /// context. 37 unsigned char X86Subtarget:: 38 ClassifyBlockAddressReference() const { 39 if (isPICStyleGOT()) // 32-bit ELF targets. 40 return X86II::MO_GOTOFF; 41 42 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode. 43 return X86II::MO_PIC_BASE_OFFSET; 44 45 // Direct static reference to label. 46 return X86II::MO_NO_FLAG; 47 } 48 49 /// ClassifyGlobalReference - Classify a global variable reference for the 50 /// current subtarget according to how we should reference it in a non-pcrel 51 /// context. 52 unsigned char X86Subtarget:: 53 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const { 54 // DLLImport only exists on windows, it is implemented as a load from a 55 // DLLIMPORT stub. 56 if (GV->hasDLLImportLinkage()) 57 return X86II::MO_DLLIMPORT; 58 59 // Determine whether this is a reference to a definition or a declaration. 60 // Materializable GVs (in JIT lazy compilation mode) do not require an extra 61 // load from stub. 62 bool isDecl = GV->hasAvailableExternallyLinkage(); 63 if (GV->isDeclaration() && !GV->isMaterializable()) 64 isDecl = true; 65 66 // X86-64 in PIC mode. 67 if (isPICStyleRIPRel()) { 68 // Large model never uses stubs. 69 if (TM.getCodeModel() == CodeModel::Large) 70 return X86II::MO_NO_FLAG; 71 72 if (isTargetDarwin()) { 73 // If symbol visibility is hidden, the extra load is not needed if 74 // target is x86-64 or the symbol is definitely defined in the current 75 // translation unit. 76 if (GV->hasDefaultVisibility() && 77 (isDecl || GV->isWeakForLinker())) 78 return X86II::MO_GOTPCREL; 79 } else if (!isTargetWin64()) { 80 assert(isTargetELF() && "Unknown rip-relative target"); 81 82 // Extra load is needed for all externally visible. 83 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility()) 84 return X86II::MO_GOTPCREL; 85 } 86 87 return X86II::MO_NO_FLAG; 88 } 89 90 if (isPICStyleGOT()) { // 32-bit ELF targets. 91 // Extra load is needed for all externally visible. 92 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility()) 93 return X86II::MO_GOTOFF; 94 return X86II::MO_GOT; 95 } 96 97 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode. 98 // Determine whether we have a stub reference and/or whether the reference 99 // is relative to the PIC base or not. 100 101 // If this is a strong reference to a definition, it is definitely not 102 // through a stub. 103 if (!isDecl && !GV->isWeakForLinker()) 104 return X86II::MO_PIC_BASE_OFFSET; 105 106 // Unless we have a symbol with hidden visibility, we have to go through a 107 // normal $non_lazy_ptr stub because this symbol might be resolved late. 108 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 109 return X86II::MO_DARWIN_NONLAZY_PIC_BASE; 110 111 // If symbol visibility is hidden, we have a stub for common symbol 112 // references and external declarations. 113 if (isDecl || GV->hasCommonLinkage()) { 114 // Hidden $non_lazy_ptr reference. 115 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE; 116 } 117 118 // Otherwise, no stub. 119 return X86II::MO_PIC_BASE_OFFSET; 120 } 121 122 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode. 123 // Determine whether we have a stub reference. 124 125 // If this is a strong reference to a definition, it is definitely not 126 // through a stub. 127 if (!isDecl && !GV->isWeakForLinker()) 128 return X86II::MO_NO_FLAG; 129 130 // Unless we have a symbol with hidden visibility, we have to go through a 131 // normal $non_lazy_ptr stub because this symbol might be resolved late. 132 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 133 return X86II::MO_DARWIN_NONLAZY; 134 135 // Otherwise, no stub. 136 return X86II::MO_NO_FLAG; 137 } 138 139 // Direct static reference to global. 140 return X86II::MO_NO_FLAG; 141 } 142 143 144 /// getBZeroEntry - This function returns the name of a function which has an 145 /// interface like the non-standard bzero function, if such a function exists on 146 /// the current subtarget and it is considered prefereable over memset with zero 147 /// passed as the second argument. Otherwise it returns null. 148 const char *X86Subtarget::getBZeroEntry() const { 149 // Darwin 10 has a __bzero entry point for this purpose. 150 if (getTargetTriple().isMacOSX() && 151 !getTargetTriple().isMacOSXVersionLT(10, 6)) 152 return "__bzero"; 153 154 return 0; 155 } 156 157 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls 158 /// to immediate address. 159 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const { 160 if (In64BitMode) 161 return false; 162 return isTargetELF() || TM.getRelocationModel() == Reloc::Static; 163 } 164 165 /// getSpecialAddressLatency - For targets where it is beneficial to 166 /// backschedule instructions that compute addresses, return a value 167 /// indicating the number of scheduling cycles of backscheduling that 168 /// should be attempted. 169 unsigned X86Subtarget::getSpecialAddressLatency() const { 170 // For x86 out-of-order targets, back-schedule address computations so 171 // that loads and stores aren't blocked. 172 // This value was chosen arbitrarily. 173 return 200; 174 } 175 176 void X86Subtarget::AutoDetectSubtargetFeatures() { 177 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; 178 union { 179 unsigned u[3]; 180 char c[12]; 181 } text; 182 183 if (X86_MC::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1)) 184 return; 185 186 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); 187 188 if ((EDX >> 15) & 1) HasCMov = true; ToggleFeature(X86::FeatureCMOV); 189 if ((EDX >> 23) & 1) X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX); 190 if ((EDX >> 25) & 1) X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1); 191 if ((EDX >> 26) & 1) X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2); 192 if (ECX & 0x1) X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3); 193 if ((ECX >> 9) & 1) X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3); 194 if ((ECX >> 19) & 1) X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41); 195 if ((ECX >> 20) & 1) X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42); 196 // FIXME: AVX codegen support is not ready. 197 //if ((ECX >> 28) & 1) { HasAVX = true; } ToggleFeature(X86::FeatureAVX); 198 199 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0; 200 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0; 201 202 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1); ToggleFeature(X86::FeatureCLMUL); 203 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); ToggleFeature(X86::FeatureFMA3); 204 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1); ToggleFeature(X86::FeaturePOPCNT); 205 HasAES = IsIntel && ((ECX >> 25) & 0x1); ToggleFeature(X86::FeatureAES); 206 207 if (IsIntel || IsAMD) { 208 // Determine if bit test memory instructions are slow. 209 unsigned Family = 0; 210 unsigned Model = 0; 211 X86_MC::DetectFamilyModel(EAX, Family, Model); 212 if (IsAMD || (Family == 6 && Model >= 13)) { 213 IsBTMemSlow = true; 214 ToggleFeature(X86::FeatureSlowBTMem); 215 } 216 // If it's Nehalem, unaligned memory access is fast. 217 if (Family == 15 && Model == 26) { 218 IsUAMemFast = true; 219 ToggleFeature(X86::FeatureFastUAMem); 220 } 221 222 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); 223 if ((EDX >> 29) & 0x1) { 224 HasX86_64 = true; 225 ToggleFeature(X86::Feature64Bit); 226 } 227 if (IsAMD && ((ECX >> 6) & 0x1)) { 228 HasSSE4A = true; 229 ToggleFeature(X86::FeatureSSE4A); 230 } 231 if (IsAMD && ((ECX >> 16) & 0x1)) { 232 HasFMA4 = true; 233 ToggleFeature(X86::FeatureFMA4); 234 } 235 } 236 } 237 238 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, 239 const std::string &FS, 240 unsigned StackAlignOverride, bool is64Bit) 241 : X86GenSubtargetInfo(TT, CPU, FS) 242 , PICStyle(PICStyles::None) 243 , X86SSELevel(NoMMXSSE) 244 , X863DNowLevel(NoThreeDNow) 245 , HasCMov(false) 246 , HasX86_64(false) 247 , HasPOPCNT(false) 248 , HasSSE4A(false) 249 , HasAVX(false) 250 , HasAES(false) 251 , HasCLMUL(false) 252 , HasFMA3(false) 253 , HasFMA4(false) 254 , IsBTMemSlow(false) 255 , IsUAMemFast(false) 256 , HasVectorUAMem(false) 257 , stackAlignment(8) 258 // FIXME: this is a known good value for Yonah. How about others? 259 , MaxInlineSizeThreshold(128) 260 , TargetTriple(TT) 261 , In64BitMode(is64Bit) { 262 // Determine default and user specified characteristics 263 if (!FS.empty() || !CPU.empty()) { 264 std::string CPUName = CPU; 265 if (CPUName.empty()) { 266 #if defined (__x86_64__) || defined(__i386__) 267 CPUName = sys::getHostCPUName(); 268 #else 269 CPUName = "generic"; 270 #endif 271 } 272 273 // Make sure 64-bit features are available in 64-bit mode. (But make sure 274 // SSE2 can be turned off explicitly.) 275 std::string FullFS = FS; 276 if (In64BitMode) { 277 if (!FullFS.empty()) 278 FullFS = "+64bit,+sse2," + FullFS; 279 else 280 FullFS = "+64bit,+sse2"; 281 } 282 283 // If feature string is not empty, parse features string. 284 ParseSubtargetFeatures(CPUName, FullFS); 285 } else { 286 // Otherwise, use CPUID to auto-detect feature set. 287 AutoDetectSubtargetFeatures(); 288 289 // Make sure 64-bit features are available in 64-bit mode. 290 if (In64BitMode) { 291 HasX86_64 = true; ToggleFeature(X86::Feature64Bit); 292 HasCMov = true; ToggleFeature(X86::FeatureCMOV); 293 294 if (!HasAVX && X86SSELevel < SSE2) { 295 X86SSELevel = SSE2; 296 ToggleFeature(X86::FeatureSSE1); 297 ToggleFeature(X86::FeatureSSE2); 298 } 299 } 300 } 301 302 // It's important to keep the MCSubtargetInfo feature bits in sync with 303 // target data structure which is shared with MC code emitter, etc. 304 if (In64BitMode) 305 ToggleFeature(X86::Mode64Bit); 306 307 if (HasAVX) 308 X86SSELevel = NoMMXSSE; 309 310 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel 311 << ", 3DNowLevel " << X863DNowLevel 312 << ", 64bit " << HasX86_64 << "\n"); 313 assert((!In64BitMode || HasX86_64) && 314 "64-bit code requested on a subtarget that doesn't support it!"); 315 316 // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both 317 // 32 and 64 bit) and for all 64-bit targets. 318 if (StackAlignOverride) 319 stackAlignment = StackAlignOverride; 320 else if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() || 321 isTargetSolaris() || In64BitMode) 322 stackAlignment = 16; 323 } 324
