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    Searched refs:CodeGenOpt (Results 26 - 50 of 82) sorted by null

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  /external/llvm/include/llvm/Target/
TargetSubtargetInfo.h 57 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/CBackend/
CTargetMachine.h 30 CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/CppBackend/
CPPTargetMachine.h 32 CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/PowerPC/
PPCTargetMachine.h 69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
70 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
71 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
PPCTargetMachine.cpp 89 CodeGenOpt::Level OptLevel) {
96 CodeGenOpt::Level OptLevel) {
103 CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/X86/
X86TargetMachine.cpp 135 CodeGenOpt::Level OptLevel) {
147 CodeGenOpt::Level OptLevel) {
153 CodeGenOpt::Level OptLevel) {
159 CodeGenOpt::Level OptLevel) {
160 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
168 CodeGenOpt::Level OptLevel,
  /external/llvm/tools/lli/
lli.cpp 196 CodeGenOpt::Level OLvl = CodeGenOpt::Default;
202 case '0': OLvl = CodeGenOpt::None; break;
203 case '1': OLvl = CodeGenOpt::Less; break;
204 case '2': OLvl = CodeGenOpt::Default; break;
205 case '3': OLvl = CodeGenOpt::Aggressive; break;
  /external/llvm/lib/Target/Blackfin/
BlackfinTargetMachine.cpp 38 CodeGenOpt::Level OptLevel) {
BlackfinTargetMachine.h 59 CodeGenOpt::Level OptLevel);
  /external/llvm/lib/Target/CellSPU/
SPUSubtarget.h 91 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/SystemZ/
SystemZTargetMachine.cpp 36 CodeGenOpt::Level OptLevel) {
SystemZTargetMachine.h 62 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
  /external/llvm/lib/Target/XCore/
XCoreTargetMachine.cpp 36 CodeGenOpt::Level OptLevel) {
  /external/llvm/lib/CodeGen/
LLVMTargetMachine.cpp 128 CodeGenOpt::Level OptLevel,
218 CodeGenOpt::Level OptLevel,
242 CodeGenOpt::Level OptLevel,
300 CodeGenOpt::Level OptLevel,
318 if (OptLevel != CodeGenOpt::None && !DisableLSR) {
354 if (OptLevel != CodeGenOpt::None && !DisableCGP)
388 (OptLevel == CodeGenOpt::None && EnableFastISelOption != cl::BOU_FALSE))
402 if (OptLevel != CodeGenOpt::None && !DisableEarlyTailDup) {
409 if (OptLevel != CodeGenOpt::None)
416 if (OptLevel != CodeGenOpt::None)
    [all...]
MachineFunctionAnalysis.cpp 23 CodeGenOpt::Level OL) :
  /external/llvm/include/llvm/CodeGen/
Passes.h 101 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
146 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
  /external/llvm/lib/Target/MBlaze/
MBlazeTargetMachine.cpp 86 CodeGenOpt::Level OptLevel) {
95 CodeGenOpt::Level OptLevel) {
MBlazeSubtarget.h 57 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/PTX/
PTXMFInfoExtract.cpp 36 PTXMFInfoExtract(PTXTargetMachine &TM, CodeGenOpt::Level OptLevel)
90 CodeGenOpt::Level OptLevel) {
PTXTargetMachine.h 55 CodeGenOpt::Level OptLevel);
57 CodeGenOpt::Level OptLevel);
  /external/llvm/lib/Target/Sparc/
SparcTargetMachine.cpp 38 CodeGenOpt::Level OptLevel) {
47 CodeGenOpt::Level OptLevel){
SparcTargetMachine.h 57 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
58 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
  /external/llvm/include/llvm/ExecutionEngine/
ExecutionEngine.h 137 CodeGenOpt::Level OptLevel,
144 CodeGenOpt::Level OptLevel,
189 CodeGenOpt::Level OptLevel =
190 CodeGenOpt::Default,
202 CodeGenOpt::Level OptLevel =
203 CodeGenOpt::Default,
465 CodeGenOpt::Level OptLevel;
479 OptLevel = CodeGenOpt::Default;
518 /// defaults to CodeGenOpt::Default.
519 EngineBuilder &setOptLevel(CodeGenOpt::Level l)
    [all...]
  /external/llvm/lib/ExecutionEngine/JIT/
JIT.h 81 JITMemoryManager *JMM, CodeGenOpt::Level OptLevel,
100 CodeGenOpt::Level OptLevel =
101 CodeGenOpt::Default,
188 CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/ARM/
ARM.h 47 CodeGenOpt::Level OptLevel);

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12 3 4