| /external/llvm/lib/Target/ARM/ |
| ARMInstrNEON.td | [all...] |
| ARMInstrThumb2.td | 468 PatFrag opnode, string baseOpc, bit Commutable = 0,
484 let isCommutable = Commutable;
524 PatFrag opnode, string baseOpc, bit Commutable = 0> :
525 T2I_bin_irs<opcod, opc, iii, iir, iis, opnode, baseOpc, Commutable, ".w">;
569 PatFrag opnode, bit Commutable = 0> {
586 let isCommutable = Commutable;
611 bit Commutable = 0> {
650 let isCommutable = Commutable;
676 bit Commutable = 0> {
692 let isCommutable = Commutable;
[all...] |
| ARMInstrInfo.td | 729 PatFrag opnode, string baseOpc, bit Commutable = 0> {
752 let isCommutable = Commutable;
794 PatFrag opnode, bit Commutable = 0> {
813 let isCommutable = Commutable;
842 PatFrag opnode, bit Commutable = 0> {
859 let isCommutable = Commutable;
[all...] |
| README.txt | 504 ARM::MOVCCr is commutable (by flipping the condition). But we need to implement
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 220 /// commutable but require converting to different instructions or making
222 /// that. The default implementation simply swaps the commutable operands.
225 /// method for a non-commutable instruction, but there may be some cases
230 /// findCommutedOpIndices - If specified MI is commutable, return the two
[all...] |
| Target.td | 325 bit isCommutable = 0; // Is this 3 operand instruction commutable?
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 116 Commutable,
429 /// Note that this flag may be set on instructions that are only commutable
434 return Flags & (1 << MCID::Commutable);
|
| /external/llvm/lib/CodeGen/ |
| RegisterCoalescer.h | 97 /// If the source value number is defined by a commutable instruction and
|
| TargetInstrInfoImpl.cpp | 116 /// findCommutedOpIndices - If specified MI is commutable, return the two
|
| MachineCSE.cpp | 377 // Commute commutable instructions.
|
| RegisterCoalescer.cpp | 471 /// commutable instruction and its other operand is coalesced to the copy dest
[all...] |
| VirtRegRewriter.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrMMX.td | 27 bit Commutable = 0> {
32 let isCommutable = Commutable;
|
| README-SSE.txt | 361 Floating point max / min are commutable when -enable-unsafe-fp-path is
363 nodes which are selected to max / min instructions that are marked commutable.
|
| /external/llvm/utils/TableGen/ |
| InstrInfoEmitter.cpp | 285 if (Inst.isCommutable) OS << "|(1<<MCID::Commutable)";
|
| /external/llvm/test/MC/X86/ |
| x86-64.s | 416 // rdar://8456371 - Handle commutable instructions written backward.
541 // rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
|
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 257 bool isCommutable : 1; // Is a commutable instruction.
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | [all...] |
| /external/llvm/docs/ |
| WritingAnLLVMBackend.html | [all...] |
| CodeGenerator.html | 458 (accesses memory, is commutable, etc), and holds any target-specific
[all...] |
