| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/reference/vc/m4p10/src/ |
| omxVCM4P10_GetVLCInfo.c | 72 OMX_U32 Mask = 4, RunBefore;
129 Value == -1 ? Mask : 0;
130 Mask >>= 1;
136 Mask = 0;
147 /* Mask becomes zero after entering */
148 if (Mask &&
155 Value == -1 ? Mask : 0;
156 Mask >>= 1;
163 if (Mask)
165 Mask = 0
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 89 unsigned Mask = MI->getOperand(1).getImm();
90 unsigned NumTZ = CountTrailingZeros_32(Mask);
91 assert(NumTZ <= 3 && "Invalid IT mask!");
|
| Thumb2InstrInfo.cpp | 75 unsigned Mask = MBBI->getOperand(1).getImm();
81 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn);
526 unsigned Mask = (1 << NumBits) - 1;
527 if ((unsigned)Offset <= Mask * Scale) {
543 ImmedOffset = ImmedOffset & Mask;
556 Offset &= ~(Mask*Scale);
|
| Thumb1RegisterInfo.cpp | 424 unsigned Mask = (1 << NumBits) - 1;
425 if (((Offset / Scale) & ~Mask) == 0) {
460 AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg).addImm(Mask));
463 MI.getOperand(FrameRegIdx+1).ChangeToImmediate(Mask);
465 Offset = (Offset - Mask * Scale);
495 unsigned Mask = (1 << NumBits) - 1;
497 if ((unsigned)Offset <= Mask * Scale) {
512 Mask = (1 << NumBits) - 1;
520 ImmedOffset = ImmedOffset & Mask;
522 Offset &= ~(Mask * Scale)
[all...] |
| Thumb2ITBlockPass.cpp | 197 unsigned Mask = 0, Pos = 3;
211 Mask |= (NCC & 1) << Pos;
231 // Finalize IT mask.
232 Mask |= (1 << Pos);
233 // Tag along (firstcond[0] << 4) with the mask.
234 Mask |= (CC & 1) << 4;
235 MIB.addImm(Mask);
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| ARMBaseRegisterInfo.cpp | [all...] |
| /external/webkit/Source/JavaScriptCore/tests/mozilla/ecma/Expressions/ |
| 11.4.8.js | 136 function Mask( b, n ) {
|
| 11.7.1.js | 38 7. Mask out all but the least significant 5 bits of Result(6), that is,
143 function Mask( b, n ) {
214 add = Mask( add, 5 );
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| 11.7.2.js | 38 7. Mask out all but the least significant 5 bits of Result(6), that is,
157 function Mask( b, n ) {
226 a = Mask( a, 5 );
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| 11.7.3.js | 39 7. Mask out all but the least significant 5 bits of Result(6), that is,
148 function Mask( b, n ) {
228 a = Mask( a, 5 );
|
| 11.10-1.js | 145 function Mask( b, n ) {
|
| 11.10-2.js | 144 function Mask( b, n ) {
|
| 11.10-3.js | 144 function Mask( b, n ) {
|
| /external/clang/include/clang/AST/ |
| DeclAccessPair.h | 32 enum { Mask = 0x3 };
42 return (NamedDecl*) (~Mask & (uintptr_t) Ptr);
45 return AccessSpecifier(Mask & (uintptr_t) Ptr);
|
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | 90 // Bit mask of live FP registers. Bit 0 = FP0, bit 1 = FP1, &c.
91 unsigned Mask;
101 LiveBundle() : Mask(0), FixCount(0) {}
104 bool isFixed() const { return !Mask || FixCount; }
116 unsigned Mask = 0;
121 Mask |= 1 << Reg;
123 return Mask;
294 /// Adjust the live registers to be the set in Mask.
295 void adjustLiveRegs(unsigned Mask, MachineBasicBlock::iterator I);
395 const unsigned Mask = calcLiveInMask(MBB)
[all...] |
| /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/X11/ |
| Xdefs.h | 75 typedef unsigned long Mask;
77 typedef CARD32 Mask;
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAddSub.cpp | 129 APInt Mask = APInt::getHighBitsSet(TySizeBits, ExtendAmt);
130 if (!MaskedValueIsZero(XorLHS, Mask))
192 APInt Mask = APInt::getAllOnesValue(IT->getBitWidth());
195 ComputeMaskedBits(LHS, Mask, LHSKnownZero, LHSKnownOne);
199 ComputeMaskedBits(RHS, Mask, RHSKnownZero, RHSKnownOne);
240 // in the mask. First, get the rightmost bit.
243 // Form a mask of all bits from the lowest bit added through the top.
246 // See if the and mask includes all of these bits.
411 // Build a mask for high order bits.
|
| InstCombineVectorOps.cpp | 56 /// getShuffleMask - Read and decode a shufflevector mask.
248 /// elements from either LHS or RHS, return the shuffle mask and true.
251 std::vector<Constant*> &Mask) {
257 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext())));
263 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i));
269 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()),
287 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) {
288 // If so, update the mask to reflect the inserted undef.
289 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext()));
302 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) {
[all...] |
| /frameworks/base/media/libstagefright/codecs/m4v_h263/enc/src/ |
| bitstream_io.cpp | 29 static const UChar Mask[ ] =
372 BitstreamPutBits(stream, restBits, Mask[restBits]);
400 BitstreamPutBits(stream,count,Mask[count]);
|
| /external/llvm/lib/Analysis/ |
| Lint.cpp | 414 APInt Mask = APInt::getAllOnesValue(BitWidth),
416 ComputeMaskedBits(Ptr, Mask, KnownZero, KnownOne, TD);
474 APInt Mask = APInt::getAllOnesValue(BitWidth),
476 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
|
| ConstantFolding.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 391 SDValue Mask = Op.getOperand(0);
403 && "Invalid mask size");
404 // Bitcast the operands to be the same type as the mask.
406 // the mask is a vector of integers.
412 SDValue NotMask = DAG.getNode(ISD::XOR, DL, VT, Mask, AllOnes);
414 Op1 = DAG.getNode(ISD::AND, DL, VT, Op1, Mask);
|
| SelectionDAGBuilder.h | 150 uint64_t Mask;
154 CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits):
155 Mask(mask), BB(bb), Bits(bits) { }
262 Mask(M), ThisBB(T), TargetBB(Tr) { }
263 uint64_t Mask;
|
| /external/llvm/lib/Transforms/Utils/ |
| Local.cpp | 767 APInt Mask = APInt::getAllOnesValue(BitWidth);
769 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
[all...] |
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| ExplodedGraph.h | 64 enum { Size1 = 0x0, SizeOther = 0x1, AuxFlag = 0x2, Mask = 0x3 };
73 return reinterpret_cast<void*>(P & ~Mask);
89 bool empty() const { return (P & ~Mask) == 0; }
|
