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      1 //=- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file implements the CriticalAntiDepBreaker class, which
     11 // implements register anti-dependence breaking along a blocks
     12 // critical path during post-RA scheduler.
     13 //
     14 //===----------------------------------------------------------------------===//
     15 
     16 #ifndef LLVM_CODEGEN_CRITICALANTIDEPBREAKER_H
     17 #define LLVM_CODEGEN_CRITICALANTIDEPBREAKER_H
     18 
     19 #include "AntiDepBreaker.h"
     20 #include "RegisterClassInfo.h"
     21 #include "llvm/CodeGen/MachineBasicBlock.h"
     22 #include "llvm/CodeGen/MachineFrameInfo.h"
     23 #include "llvm/CodeGen/MachineFunction.h"
     24 #include "llvm/CodeGen/MachineRegisterInfo.h"
     25 #include "llvm/CodeGen/ScheduleDAG.h"
     26 #include "llvm/ADT/BitVector.h"
     27 #include "llvm/ADT/SmallSet.h"
     28 #include <map>
     29 
     30 namespace llvm {
     31 class RegisterClassInfo;
     32 class TargetInstrInfo;
     33 class TargetRegisterInfo;
     34 
     35   class CriticalAntiDepBreaker : public AntiDepBreaker {
     36     MachineFunction& MF;
     37     MachineRegisterInfo &MRI;
     38     const TargetInstrInfo *TII;
     39     const TargetRegisterInfo *TRI;
     40     const RegisterClassInfo &RegClassInfo;
     41 
     42     /// AllocatableSet - The set of allocatable registers.
     43     /// We'll be ignoring anti-dependencies on non-allocatable registers,
     44     /// because they may not be safe to break.
     45     const BitVector AllocatableSet;
     46 
     47     /// Classes - For live regs that are only used in one register class in a
     48     /// live range, the register class. If the register is not live, the
     49     /// corresponding value is null. If the register is live but used in
     50     /// multiple register classes, the corresponding value is -1 casted to a
     51     /// pointer.
     52     std::vector<const TargetRegisterClass*> Classes;
     53 
     54     /// RegRefs - Map registers to all their references within a live range.
     55     std::multimap<unsigned, MachineOperand *> RegRefs;
     56     typedef std::multimap<unsigned, MachineOperand *>::const_iterator
     57       RegRefIter;
     58 
     59     /// KillIndices - The index of the most recent kill (proceding bottom-up),
     60     /// or ~0u if the register is not live.
     61     std::vector<unsigned> KillIndices;
     62 
     63     /// DefIndices - The index of the most recent complete def (proceding bottom
     64     /// up), or ~0u if the register is live.
     65     std::vector<unsigned> DefIndices;
     66 
     67     /// KeepRegs - A set of registers which are live and cannot be changed to
     68     /// break anti-dependencies.
     69     SmallSet<unsigned, 4> KeepRegs;
     70 
     71   public:
     72     CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
     73     ~CriticalAntiDepBreaker();
     74 
     75     /// Start - Initialize anti-dep breaking for a new basic block.
     76     void StartBlock(MachineBasicBlock *BB);
     77 
     78     /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
     79     /// path
     80     /// of the ScheduleDAG and break them by renaming registers.
     81     ///
     82     unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
     83                                    MachineBasicBlock::iterator Begin,
     84                                    MachineBasicBlock::iterator End,
     85                                    unsigned InsertPosIndex,
     86                                    DbgValueVector &DbgValues);
     87 
     88     /// Observe - Update liveness information to account for the current
     89     /// instruction, which will not be scheduled.
     90     ///
     91     void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
     92 
     93     /// Finish - Finish anti-dep breaking for a basic block.
     94     void FinishBlock();
     95 
     96   private:
     97     void PrescanInstruction(MachineInstr *MI);
     98     void ScanInstruction(MachineInstr *MI, unsigned Count);
     99     bool isNewRegClobberedByRefs(RegRefIter RegRefBegin,
    100                                  RegRefIter RegRefEnd,
    101                                  unsigned NewReg);
    102     unsigned findSuitableFreeRegister(RegRefIter RegRefBegin,
    103                                       RegRefIter RegRefEnd,
    104                                       unsigned AntiDepReg,
    105                                       unsigned LastNewReg,
    106                                       const TargetRegisterClass *RC);
    107   };
    108 }
    109 
    110 #endif
    111