/external/llvm/lib/Target/MSP430/InstPrinter/ |
MSP430InstPrinter.cpp | 63 const MCOperand &Disp = MI->getOperand(OpNo+1); 76 if (Disp.isExpr()) 77 O << *Disp.getExpr(); 79 assert(Disp.isImm() && "Expected immediate in displacement field"); 80 O << Disp.getImm();
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/external/llvm/lib/Target/SystemZ/ |
SystemZISelDAGToDAG.cpp | 48 int64_t Disp; 52 : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) { 72 errs() << " Disp " << Disp << '\n'; 86 SDValue &Base, SDValue &Disp); 88 SDValue &Base, SDValue &Disp, 124 SDValue &Base, SDValue &Disp); 126 SDValue &Base, SDValue &Disp, 128 bool SelectAddrRI(SDValue& Addr, SDValue &Base, SDValue &Disp); 130 SDValue &Base, SDValue &Disp, SDValue &Index) [all...] |
SystemZInstrBuilder.h | 33 /// with R15 or R11 and Disp being offsetted accordingly. 46 int32_t Disp; 49 SystemZAddressMode() : BaseType(RegBase), IndexReg(0), Disp(0) { 98 return MIB.addImm(AM.Disp).addReg(AM.IndexReg);
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/external/llvm/lib/Target/MSP430/ |
MSP430ISelDAGToDAG.cpp | 46 int16_t Disp; 55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0), 71 errs() << " Disp " << Disp << '\n'; 123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp); 149 AM.Disp += G->getOffset(); 154 AM.Disp += CP->getOffset(); 191 AM.Disp += Val; 234 AM.Disp += Offset; 249 SDValue &Base, SDValue &Disp) { [all...] |
MSP430AsmPrinter.cpp | 114 const MachineOperand &Disp = MI->getOperand(OpNum+1); 119 if (Disp.isImm() && !Base.getReg())
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/external/llvm/lib/Target/X86/ |
X86InstrBuilder.h | 36 /// with BP or SP and Disp being offsetted accordingly. The displacement may 51 int Disp; 56 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { 77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); 79 MO.push_back(MachineOperand::CreateImm(Disp)); 136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); 138 MIB.addImm(AM.Disp);
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X86ISelDAGToDAG.cpp | 65 int32_t Disp; 76 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), 118 dbgs() << " Disp " << Disp << '\n' 203 SDValue &Scale, SDValue &Index, SDValue &Disp, 206 SDValue &Scale, SDValue &Index, SDValue &Disp, 209 SDValue &Scale, SDValue &Index, SDValue &Disp, 213 SDValue &Index, SDValue &Disp, 219 SDValue &Index, SDValue &Disp, 232 SDValue &Disp, SDValue &Segment) [all...] |
X86CodeEmitter.cpp | 82 intptr_t Disp = 0, intptr_t PCAdj = 0, 85 void emitConstPoolAddress(unsigned CPI, unsigned Reloc, intptr_t Disp = 0, 262 intptr_t Disp /* = 0 */, 265 intptr_t RelocCST = Disp; 279 MCE.emitDWordLE(Disp); 281 MCE.emitWordLE((int32_t)Disp); 311 intptr_t Disp /* = 0 */, 322 MCE.emitDWordLE(Disp); 324 MCE.emitWordLE((int32_t)Disp); 555 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EB [all...] |
X86FastISel.cpp | 394 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue(); 396 if (isInt<32>(Disp)) { 397 AM.Disp = (uint32_t)Disp; 408 uint64_t Disp = (int32_t)AM.Disp; 419 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue()); 429 Disp += CI->getSExtValue() * S; 441 Disp += CI->getSExtValue() * S [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelDAGToDAG.cpp | 86 bool SelectAddrRegImm(SDValue N, SDValue &Disp, SDValue &Base); 148 SelectAddrRegImm(SDValue N, SDValue &Base, SDValue &Disp) { 150 if (SelectAddrRegReg(N, Base, Disp)) 156 Disp = CurDAG->getTargetConstant(imm, MVT::i32); 167 Disp = CurDAG->getTargetConstant(Imm, CN->getValueType(0)); 172 Disp = CurDAG->getTargetConstant(0, TM.getTargetLowering()->getPointerTy());
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/external/llvm/include/llvm/CodeGen/ |
MachineInstrBuilder.h | 165 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, 167 switch (Disp.getType()) { 171 return addImm(Disp.getImm() + off); 173 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
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/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 137 const MCExpr *Disp; 178 return Mem.Disp; 345 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, 349 Res->Mem.Disp = Disp; 357 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp, 369 Res->Mem.Disp = Disp; 384 isa<MCConstantExpr>(Op.Mem.Disp) && 385 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 & [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCCodeEmitter.cpp | 88 void EmitImmediate(const MCOperand &Disp, 245 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); 272 EmitImmediate(Disp, 4, MCFixupKind(FixupKind), 296 EmitImmediate(Disp, 4, FK_Data_4, CurByte, OS, Fixups); 304 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) { 310 if (Disp.isImm() && isDisp8(Disp.getImm())) { 312 EmitImmediate(Disp, 1, FK_Data_1, CurByte, OS, Fixups); 318 EmitImmediate(Disp, 4, MCFixupKind(X86::reloc_signed_4byte), CurByte, OS [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.h | 268 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base, 279 bool SelectAddressRegImmShift(SDValue N, SDValue &Disp, SDValue &Base,
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PPCISelLowering.cpp | [all...] |
PPCISelDAGToDAG.cpp | 106 bool SelectAddrImm(SDValue N, SDValue &Disp, 108 return PPCLowering.SelectAddressRegImm(N, Disp, Base, *CurDAG); 135 bool SelectAddrImmShift(SDValue N, SDValue &Disp, SDValue &Base) { 136 return PPCLowering.SelectAddressRegImmShift(N, Disp, Base, *CurDAG); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMConstantIslandPass.cpp | 203 MachineInstr *CPEMI, unsigned Disp, bool NegOk, 208 unsigned Disp, bool NegativeOK, bool IsSoImm = false); 209 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp); 251 unsigned Disp = UserOffset < CPEOffset ? CPEOffset - UserOffset : 253 assert(Disp <= U.MaxDisp || "Constant pool entry out of range!"); [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelDAGToDAG.cpp | 254 bool SelectDForm2Addr(SDNode *Op, SDValue N, SDValue &Disp, 258 bool DFormAddressPredicate(SDNode *Op, SDValue N, SDValue &Disp, 373 SPUDAGToDAGISel::SelectDForm2Addr(SDNode *Op, SDValue N, SDValue &Disp, 377 return DFormAddressPredicate(Op, N, Disp, Base, minDForm2Offset, [all...] |