| /external/llvm/lib/Target/Alpha/ |
| AlphaBranchSelector.cpp | 49 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
50 MBBI != EE; ++MBBI) {
51 if (MBBI->getOpcode() == Alpha::COND_BRANCH_I ||
52 MBBI->getOpcode() == Alpha::COND_BRANCH_F) {
59 MBBI->setDesc(TII->get(MBBI->getOperand(0).getImm()));
|
| AlphaFrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin();
52 DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc());
56 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29)
58 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29)
61 BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT))
82 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
85 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
87 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
95 BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ)
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 34 MachineBasicBlock::iterator MBBI = MBB.begin();
35 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
55 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
61 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
63 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
65 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
72 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
75 DebugLoc dl = MBBI->getDebugLoc();
76 assert(MBBI->getOpcode() == SP::RETL &
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 39 MachineBasicBlock::iterator &MBBI,
43 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
49 MachineBasicBlock::iterator MBBI = MBB.begin();
60 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
74 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
79 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
118 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
119 ++MBBI;
[all...] |
| Thumb2InstrInfo.h | 39 MachineBasicBlock::iterator MBBI) const;
47 MachineBasicBlock::iterator MBBI,
53 MachineBasicBlock::iterator MBBI,
|
| Thumb1InstrInfo.h | 45 MachineBasicBlock::iterator MBBI,
51 MachineBasicBlock::iterator MBBI,
|
| Thumb2RegisterInfo.cpp | 36 MachineBasicBlock::iterator &MBBI,
48 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
|
| Thumb2RegisterInfo.h | 34 MachineBasicBlock::iterator &MBBI,
|
| ARMFrameLowering.cpp | 108 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
112 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
115 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
121 MachineBasicBlock::iterator MBBI = MBB.begin();
134 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
144 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -VARegSaveSize,
149 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
189 if (GPRCS1Size > 0) MBBI++;
200 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr
[all...] |
| Thumb2ITBlockPass.cpp | 168 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
169 while (MBBI != E) {
170 MachineInstr *MI = &*MBBI;
175 ++MBBI;
184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
193 ++MBBI;
200 for (; MBBI != E && Pos &&
201 (!MI->getDesc().isBranch() && !MI->getDesc().isReturn()) ; ++MBBI) {
202 if (MBBI->isDebugValue())
205 MachineInstr *NMI = &*MBBI;
[all...] |
| Thumb2InstrInfo.cpp | 57 MachineBasicBlock::iterator MBBI = Tail;
60 --MBBI;
69 while (Count && MBBI != E) {
70 if (MBBI->isDebugValue()) {
71 --MBBI;
74 if (MBBI->getOpcode() == ARM::t2IT) {
75 unsigned Mask = MBBI->getOperand(1).getImm();
77 MBBI->eraseFromParent();
81 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn);
85 --MBBI;
[all...] |
| ARMLoadStoreOptimizer.cpp | 81 MachineBasicBlock::iterator MBBI;
85 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
90 bool MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
116 MachineBasicBlock::iterator &MBBI);
118 MachineBasicBlock::iterator MBBI,
123 MachineBasicBlock::iterator MBBI,
290 MachineBasicBlock::iterator MBBI,
344 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
355 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
405 MachineBasicBlock::iterator Loc = memOps[insertAfter].MBBI;
[all...] |
| ARMExpandPseudoInsts.cpp | 58 MachineBasicBlock::iterator MBBI);
60 void ExpandVLD(MachineBasicBlock::iterator &MBBI);
61 void ExpandVST(MachineBasicBlock::iterator &MBBI);
62 void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
63 void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
66 MachineBasicBlock::iterator &MBBI);
408 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) {
409 MachineInstr &MI = *MBBI;
417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
472 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
83 ++MBBI;
85 if (MBBI != MBB.end())
86 DL = MBBI->getDebugLoc()
[all...] |
| MSP430BranchSelector.cpp | 68 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
69 MBBI != EE; ++MBBI)
70 BlockSize += TII->GetInstSizeInBytes(MBBI);
|
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinFrameLowering.cpp | 45 MachineBasicBlock::iterator MBBI = MBB.begin();
52 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
63 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize);
69 BuildMI(MBB, MBBI, dl, TII.get(BF::LINK)).addImm(FrameSize);
79 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
81 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
83 BuildMI(MBB, MBBI, dl, TII.get(BF::MOVE), BF::FP)
85 RegInfo->loadConstant(MBB, MBBI, dl, BF::P1, -FrameSize);
86 BuildMI(MBB, MBBI, dl, TII.get(BF::ADDpp), BF::SP
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin();
97 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
103 // Move MBBI back to the beginning of the function.
104 MBBI = MBB.begin();
119 BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(FrameLabel);
124 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
128 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
131 BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
136 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.cpp | 146 MachineBasicBlock::iterator MBBI = MBB.begin();
147 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
165 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
169 BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
171 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
182 MBBI);
183 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
188 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
192 BuildMI(MBB, MBBI, dl
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 57 MachineBasicBlock::iterator MBBI = MI;
58 ++MBBI;
59 assert(MBBI != Entry->end() && MBBI->getOpcode() == PPC::MTVRSAVE);
60 MBBI->eraseFromParent();
69 for (MBBI = I->end(); MBBI != I->begin(); ) {
70 --MBBI;
71 if (MBBI->getOpcode() == PPC::MTVRSAVE) {
72 MBBI->eraseFromParent(); // remove it
[all...] |
| PPCBranchSelector.cpp | 69 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
70 MBBI != EE; ++MBBI)
71 BlockSize += TII->GetInstSizeInBytes(MBBI);
|
| /external/llvm/lib/CodeGen/ |
| ExpandISelPseudos.cpp | 60 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
61 MBBI != MBBE; ) {
62 MachineInstr *MI = MBBI++;
74 MBBI = NewMBB->begin();
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 67 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
81 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
86 BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D)
101 MachineBasicBlock::iterator MBBI = MBB.begin();
102 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
113 while (MBBI != MBB.end() &&
114 (MBBI->getOpcode() == SystemZ::MOV64mr ||
115 MBBI->getOpcode() == SystemZ::MOV64mrm)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 86 MachineBasicBlock::iterator &MBBI,
103 unsigned Opc = MBBI->getOpcode();
117 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
118 MachineOperand &MO = MBBI->getOperand(i);
142 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
152 DebugLoc DL = MBB.findDebugLoc(MBBI);
160 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
165 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
175 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
187 void mergeSPUpdatesUp(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin();
100 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
107 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
136 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
143 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
157 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII);
162 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel);
173 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
178 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 35 MachineBasicBlock::iterator MBBI;
67 /// before MBBI. One bit per physical register. If bit is set that means it's
91 while (MBBI != I) forward();
96 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
121 return scavengeRegister(RegClass, MBBI, SPAdj);
|
