| /external/llvm/lib/CodeGen/ |
| VirtRegRewriter.h | 16 class VirtRegMap;
22 virtual bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM,
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| Spiller.h | 18 class VirtRegMap;
36 VirtRegMap &vrm);
39 /// of deferring though VirtRegMap.
42 VirtRegMap &vrm);
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| LiveDebugVariables.h | 30 class VirtRegMap;
55 void emitDebugValues(VirtRegMap *VRM);
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| AllocationOrder.h | 23 class VirtRegMap;
40 const VirtRegMap &VRM,
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| VirtRegMap.cpp | 1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
10 // This file implements the VirtRegMap class.
19 #define DEBUG_TYPE "virtregmap"
20 #include "VirtRegMap.h"
48 // VirtRegMap implementation
51 char VirtRegMap::ID = 0;
53 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
55 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
92 void VirtRegMap::grow()
[all...] |
| RegAllocBase.h | 48 class VirtRegMap;
93 VirtRegMap *VRM;
107 void init(VirtRegMap &vrm, LiveIntervals &lis);
122 // The top-level driver. The output is a VirtRegMap that us updated with
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| LiveRangeEdit.h | 31 class VirtRegMap;
129 LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
133 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) {
195 LiveIntervals&, VirtRegMap&,
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| SplitKit.h | 35 class VirtRegMap;
44 const VirtRegMap &VRM;
119 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
206 VirtRegMap &VRM;
344 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
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| Spiller.cpp | 13 #include "VirtRegMap.h"
55 VirtRegMap *vrm;
63 SpillerBase(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm)
180 VirtRegMap &vrm)
200 VirtRegMap *vrm;
203 VirtRegMap &vrm)
220 if (SS == VirtRegMap::NO_STACK_SLOT)
234 VirtRegMap &vrm) {
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| VirtRegMap.h | 1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
40 class VirtRegMap : public MachineFunctionPass {
141 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
142 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
146 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
522 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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| VirtRegRewriter.cpp | 12 #include "VirtRegMap.h"
93 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM,
214 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
216 << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1);
424 VirtRegMap &VRM);
442 VirtRegMap &VRM) {
679 VirtRegMap &VRM) {
759 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
760 DEBUG(dbgs() << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 <<"\n");
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| AllocationOrder.cpp | 19 #include "VirtRegMap.h"
24 // Compare VirtRegMap::getRegAllocPref().
26 const VirtRegMap &VRM,
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| RenderMachineFunction.h | 34 class VirtRegMap;
236 const VirtRegMap *vrm = 0,
250 const VirtRegMap *vrm;
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| LiveIntervalAnalysis.cpp | 20 #include "VirtRegMap.h"
153 VirtRegMap &vrm, unsigned reg) {
[all...] |
| Android.mk | 101 VirtRegMap.cpp \
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| LiveDebugVariables.cpp | 24 #include "VirtRegMap.h"
260 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
263 void emitDebugValues(VirtRegMap *VRM,
344 void emitDebugValues(VirtRegMap *VRM);
876 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) {
892 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT &&
[all...] |
| RegAllocBasic.cpp | 22 #include "VirtRegMap.h"
170 AU.addRequired<VirtRegMap>();
171 AU.addPreserved<VirtRegMap>();
230 void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis) {
543 RegAllocBase::init(getAnalysis<VirtRegMap>(), getAnalysis<LiveIntervals>());
551 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *VRM << "\n");
582 // The pass output is in VirtRegMap. Release all the transient data.
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| LiveRangeEdit.cpp | 16 #include "VirtRegMap.h"
34 VirtRegMap &VRM) {
212 LiveIntervals &LIS, VirtRegMap &VRM,
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| StackSlotColoring.cpp | 15 #include "VirtRegMap.h"
61 VirtRegMap* VRM;
111 AU.addRequired<VirtRegMap>();
112 AU.addPreserved<VirtRegMap>();
156 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
725 VRM = &getAnalysis<VirtRegMap>();
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| RegAllocPBQP.cpp | 36 #include "VirtRegMap.h"
137 VirtRegMap *vrm;
463 au.addRequired<VirtRegMap>();
495 if (stackSlot == VirtRegMap::NO_STACK_SLOT) {
652 vrm = &getAnalysis<VirtRegMap>();
698 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
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| RegAllocLinearScan.cpp | 17 #include "VirtRegMap.h"
173 VirtRegMap* vrm_;
217 AU.addRequired<VirtRegMap>();
218 AU.addPreserved<VirtRegMap>();
397 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
530 vrm_ = &getAnalysis<VirtRegMap>();
[all...] |
| InlineSpiller.cpp | 11 // inserting spills and restores in VirtRegMap.
18 #include "VirtRegMap.h"
61 VirtRegMap &VRM;
138 VirtRegMap &vrm)
192 VirtRegMap &vrm) {
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| RenderMachineFunction.cpp | 14 #include "VirtRegMap.h"
583 (vrm->getStackSlot(li->reg) == VirtRegMap::NO_STACK_SLOT)) {
595 (vrm->getStackSlot(li->reg) == VirtRegMap::NO_STACK_SLOT)) {
[all...] |
| RegAllocGreedy.cpp | 24 #include "VirtRegMap.h"
341 AU.addRequired<VirtRegMap>();
342 AU.addPreserved<VirtRegMap>();
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveIntervalAnalysis.h | 44 class VirtRegMap;
133 bool conflictsWithPhysReg(const LiveInterval &li, VirtRegMap &vrm,
280 const MachineLoopInfo *loopInfo, VirtRegMap& vrm);
286 unsigned PhysReg, VirtRegMap &vrm);
386 bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
425 void handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm,
432 MachineInstr *MI, unsigned NewVReg, VirtRegMap &vrm);
442 VirtRegMap &vrm, const TargetRegisterClass* rc,
451 VirtRegMap &vrm, const TargetRegisterClass* rc,
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