| /cts/tests/tests/graphics/src/android/graphics/cts/ |
| RegionTest.java | 441 method = "op",
442 args = {android.graphics.Rect.class, android.graphics.Region.Op.class}
465 assertFalse(mRegion.op(rect1, Region.Op.DIFFERENCE));
466 assertFalse(mRegion.op(rect1, Region.Op.INTERSECT));
467 assertFalse(mRegion.op(rect1, Region.Op.UNION));
468 assertFalse(mRegion.op(rect1, Region.Op.XOR))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 242 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
300 virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
305 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
330 virtual void LowerAsmOperandForConstraint(SDValue Op,
403 SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
404 SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
405 SDValue LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG) const;
406 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
408 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
409 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 72 SDValue Op(Node, ResNo);
74 VRBaseMap.erase(Op);
75 bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
107 SDValue Op = User->getOperand(i);
108 if (Op.getNode() != Node || Op.getResNo() != ResNo)
110 EVT VT = Node->getValueType(Op.getResNo());
161 SDValue Op(Node, ResNo);
163 VRBaseMap.erase(Op);
164 bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second
[all...] |
| LegalizeTypes.h | 146 SDValue BitConvertToInteger(SDValue Op);
147 SDValue BitConvertVectorToIntegerVector(SDValue Op);
148 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
170 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
171 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
178 /// GetPromotedInteger - Given a processed operand Op which was promoted to a
180 /// promoted value corresponding to the original type are exactly equal to Op.
184 /// For example, if Op is an i16 and was promoted to an i32, then this method
185 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
187 SDValue GetPromotedInteger(SDValue Op) {
[all...] |
| TargetLowering.cpp | 638 bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
640 switch (Op) {
[all...] |
| LegalizeTypes.cpp | 476 SDValue Op = OrigOp;
478 AnalyzeNewValue(Op); // Op may morph.
480 if (Op.getNode()->getNodeId() == Processed)
485 NewOps.push_back(Op);
486 } else if (Op != OrigOp) {
489 NewOps.push_back(Op);
732 void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) {
734 TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
738 SDValue &OpEntry = PromotedIntegers[Op];
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 45 static ConstraintInfo getTied(unsigned Op) {
48 I.OtherTiedOperand = Op;
168 std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
173 unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
174 return OperandList[Op.first].MIOperandNo + Op.second;
179 std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
182 if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
183 return std::make_pair(i, Op-OperandList[i].MIOperandNo);
191 std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo)
[all...] |
| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 89 Operator *Op; // The Operation used to generate this value.
147 static const char *getZeroCostOpName(unsigned short Op) {
148 if (ShufTab[Op].Arg0 == 0x0123)
150 else if (ShufTab[Op].Arg0 == 0x4567)
162 std::cerr << " = " << ShufTab[ThisOp].Op->getName() << "(";
176 if (!ShufTab[Vals[ValNo]].Op->isOnlyLHSOperator()) {
222 ShufTab[0x0123].Op = 0;
225 ShufTab[0x4567].Op = 0;
304 Operator *Op = TheOperators[opnum];
306 // Evaluate op(LHS,LHS
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 201 const MCOperand &Op = MI->getOperand(OpNo);
202 if (Op.isReg()) {
203 unsigned Reg = Op.getReg();
205 } else if (Op.isImm()) {
206 O << '#' << Op.getImm();
208 assert(Op.isExpr() && "unknown operand kind in printOperand");
211 const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
219 O << *Op.getExpr();
278 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
280 const MCOperand &MO1 = MI->getOperand(Op);
[all...] |
| /external/llvm/include/llvm/Bitcode/ |
| BitstreamWriter.h | 260 /// record. This is a no-op, since the abbrev specifies the literal to use.
262 void EmitAbbreviatedLiteral(const BitCodeAbbrevOp &Op, uintty V) {
263 assert(Op.isLiteral() && "Not a literal");
266 assert(V == Op.getLiteralValue() &&
273 void EmitAbbreviatedField(const BitCodeAbbrevOp &Op, uintty V) {
274 assert(!Op.isLiteral() && "Literals should use EmitAbbreviatedLiteral!");
277 switch (Op.getEncoding()) {
280 if (Op.getEncodingData())
281 Emit((unsigned)V, (unsigned)Op.getEncodingData());
284 if (Op.getEncodingData()
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 61 bool isSrcOp(X86Operand &Op);
65 bool isDstOp(X86Operand &Op);
379 bool X86ATTAsmParser::isSrcOp(X86Operand &Op) {
382 return (Op.isMem() &&
383 (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::DS) &&
384 isa<MCConstantExpr>(Op.Mem.Disp) &&
385 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
386 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0)
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.h | 37 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
55 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
56 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerADDE(SDValue Op, SelectionDAG &DAG) const;
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 47 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
52 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
96 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
97 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
|
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.h | 44 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
46 virtual SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
|
| /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/i686-linux/include/c++/4.4.3/parallel/ |
| omp_loop.h | 51 * @param f Functor to "process" an element with op (depends on
62 typename Op,
66 Op
69 Op o, Fu& f, Red r, Result base,
|
| omp_loop_static.h | 51 * @param f Functor to "process" an element with op (depends on
62 typename Op,
66 Op
69 Op o, Fu& f, Red r,
|
| /external/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | 51 Value *Op;
52 ValueEntry(unsigned R, Value *O) : Rank(R), Op(O) {}
65 << *Ops[0].Op->getType() << '\t';
68 WriteAsOperand(dbgs(), Ops[i].Op, false, M);
118 Instruction *Op = dyn_cast<Instruction>(V);
119 if (!Op || !isa<BinaryOperator>(Op))
122 Value *LHS = Op->getOperand(0), *RHS = Op->getOperand(1);
124 ValueRankMap.erase(Op);
[all...] |
| /development/samples/ApiDemos/src/com/example/android/apis/graphics/ |
| Clipping.java | 75 canvas.clipRect(30, 30, 70, 70, Region.Op.DIFFERENCE);
84 canvas.clipPath(mPath, Region.Op.REPLACE);
91 canvas.clipRect(40, 40, 100, 100, Region.Op.UNION);
98 canvas.clipRect(40, 40, 100, 100, Region.Op.XOR);
105 canvas.clipRect(40, 40, 100, 100, Region.Op.REVERSE_DIFFERENCE);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
125 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
|
| /external/llvm/lib/VMCore/ |
| ConstantsContext.h | 40 : ConstantExpr(Ty, Opcode, &Op<0>(), 1) {
41 Op<0>() = C;
57 : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) {
58 Op<0>() = C1;
59 Op<1>() = C2;
76 : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) {
77 Op<0>() = C1;
78 Op<1>() = C2;
79 Op<2>() = C3;
97 Instruction::ExtractElement, &Op<0>(), 2)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /frameworks/base/tests/FrameworkPerf/src/com/android/frameworkperf/ |
| TestService.java | 56 final static Op[] mOpPairs = new Op[] {
112 final static Op[] mAvailOps = new Op[] {
228 Op mForegroundOp;
229 Op mBackgroundOp;
400 RunnerThread(String name, Runnable op, int priority) {
402 mOp = op;
412 static public abstract class Op {
416 public Op(String name, String longName)
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 61 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG,
70 for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
71 EVT ArgVT = Op.getOperand(i).getValueType();
73 Entry.Node = Op.getOperand(i);
84 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
89 Callee, Args, DAG, Op.getDebugLoc());
558 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
559 LoadSDNode *LN = cast<LoadSDNode>(Op);
563 EVT OutVT = Op.getValueType();
567 DebugLoc dl = Op.getDebugLoc()
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 63 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
76 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
77 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
|
