| /external/clang/lib/StaticAnalyzer/Core/ |
| SimpleConstraintManager.cpp | 33 switch (SIE->getOpcode()) {
177 BinaryOperator::Opcode op = SE->getOpcode();
241 switch (SE->getOpcode()) {
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 180 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
187 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
195 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
|
| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeMCCodeEmitter.cpp | 138 switch (MI.getOpcode()) {
162 switch (MI.getOpcode()) {
182 unsigned Opcode = MI.getOpcode();
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
114 unsigned RetOpcode = MBBI->getOpcode();
142 unsigned Opc = PI->getOpcode();
|
| /external/llvm/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 75 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
78 } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 229 if (Node->getOpcode() == ISD::CALLSEQ_START)
231 else if (Node->getOpcode() == ISD::CALLSEQ_END) {
276 while (Node->getOpcode() != ISD::CALLSEQ_START || nested) {
280 switch (Node->getOpcode()) {
[all...] |
| SelectionDAGISel.cpp | 364 const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode());
447 if (N->getOpcode() != ISD::CopyToReg)
663 if (ResNode == Node || Node->getOpcode() == ISD::DELETED_NODE)
[all...] |
| LegalizeIntegerTypes.cpp | 44 switch (N->getOpcode()) {
168 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
181 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
195 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
351 unsigned NewOpc = N->getOpcode();
358 if (N->getOpcode() == ISD::FP_TO_UINT &&
368 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ?
377 SDValue Res = DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
396 if (N->getOpcode() == ISD::SIGN_EXTEND)
399 if (N->getOpcode() == ISD::ZERO_EXTEND
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/ |
| OutputFinisher.java | 379 result[i] = insns.get(i).getOpcode();
524 Dop result = findOpcodeForInsn(insn.getLowRegVersion(), insn.getOpcode());
566 Dop originalOpcode = insn.getOpcode();
599 Dop originalOpcode = insn.getOpcode();
689 Dop opcode = insn.getOpcode();
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 114 (MBBI->getOpcode() == SystemZ::MOV64mr ||
115 MBBI->getOpcode() == SystemZ::MOV64mrm))
149 unsigned RetOpcode = MBBI->getOpcode();
176 assert((MBBI->getOpcode() == SystemZ::MOV64rmm ||
177 MBBI->getOpcode() == SystemZ::MOV64rm) &&
|
| SystemZISelDAGToDAG.cpp | 193 switch (N.getOpcode()) {
367 unsigned Opcode = Addr.getOpcode();
376 if (UI->getOpcode() == ISD::CopyToReg) {
416 unsigned Opcode = Addr.getOpcode();
425 if (UI->getOpcode() == ISD::CopyToReg) {
459 unsigned Opcode = Addr.getOpcode();
468 if (UI->getOpcode() == ISD::CopyToReg) {
508 unsigned Opcode = Addr.getOpcode();
517 if (UI->getOpcode() == ISD::CopyToReg) {
590 unsigned Opcode = Node->getOpcode();
[all...] |
| SystemZInstrInfo.cpp | 128 switch (MI->getOpcode()) {
163 switch (MI->getOpcode()) {
240 if (I->getOpcode() == SystemZ::JMP) {
266 SystemZCC::CondCodes BranchCode = getCondFromBranchOpc(I->getOpcode());
307 if (I->getOpcode() != SystemZ::JMP &&
308 getCondFromBranchOpc(I->getOpcode()) == SystemZCC::INVALID)
|
| /external/llvm/include/llvm/Support/ |
| PatternMatch.h | 284 return CE->getOpcode() == Opcode && L.match(CE->getOperand(0)) &&
416 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
533 return I->getOpcode() == Opcode && Op.match(I->getOperand(0));
535 return CE->getOpcode() == Opcode && Op.match(CE->getOperand(0));
589 if (I->getOpcode() == Instruction::Xor)
592 if (CE->getOpcode() == Instruction::Xor)
619 if (I->getOpcode() == Instruction::Sub)
622 if (CE->getOpcode() == Instruction::Sub)
648 if (I->getOpcode() == Instruction::FSub
[all...] |
| /external/llvm/lib/VMCore/ |
| Constants.cpp | 191 switch (CE->getOpcode()) {
252 if (CE->getOpcode() == Instruction::Sub) {
256 LHS->getOpcode() == Instruction::PtrToInt &&
257 RHS->getOpcode() == Instruction::PtrToInt &&
742 return Instruction::isCast(getOpcode());
746 return getOpcode() == Instruction::ICmp || getOpcode() == Instruction::FCmp;
750 if (getOpcode() != Instruction::GetElementPtr) return false;
775 return getOpcode() == Instruction::ExtractValue ||
776 getOpcode() == Instruction::InsertValue
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 92 if (Vec.getOpcode() == ISD::UNDEF)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 682 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
728 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
[all...] |
| /external/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 196 if (CE->getOpcode() == Instruction::PtrToInt ||
197 CE->getOpcode() == Instruction::BitCast)
201 if (CE->getOpcode() == Instruction::GetElementPtr) {
350 if (CE->getOpcode() == Instruction::IntToPtr &&
438 if (CE->getOpcode() == Instruction::GetElementPtr) {
599 if (CE && CE->getOpcode() == Instruction::Sub &&
643 if (CE->getOpcode() == Instruction::IntToPtr)
784 return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Ops, TD);
805 return ConstantFoldInstOperands(CE->getOpcode(), CE->getType(), Ops, TD);
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCasts.cpp | 43 if (I->getOpcode() == Instruction::Shl) {
50 if (I->getOpcode() == Instruction::Mul) {
57 if (I->getOpcode() == Instruction::Add) {
168 unsigned Opc = I->getOpcode();
241 Instruction::CastOps firstOp = Instruction::CastOps(CI->getOpcode());
291 isEliminableCastPair(CSrc, CI.getOpcode(), CI.getType(), TD)) {
348 unsigned Opc = I->getOpcode();
667 unsigned Opc = I->getOpcode(), Tmp;
[all...] |
| InstCombinePHI.cpp | 27 unsigned Opc = FirstInst->getOpcode();
46 if (!I || I->getOpcode() != Opc || !I->hasOneUse() ||
114 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(),
122 BinaryOperator::Create(BinOp->getOpcode(), LHSVal, RHSVal);
484 CastInst *NewCI = CastInst::Create(FirstCI->getOpcode(), PhiVal,
491 BinOp = BinaryOperator::Create(BinOp->getOpcode(), PhiVal, ConstantOp);
500 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(),
673 if (User->getOpcode() != Instruction::LShr ||
802 cast<Instruction>(PN.getIncomingValue(0))->getOpcode() ==
803 cast<Instruction>(PN.getIncomingValue(1))->getOpcode() &
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 84 if (MI->getOpcode() == ARM::LDMIA_RET ||
85 MI->getOpcode() == ARM::t2LDMIA_RET ||
86 MI->getOpcode() == ARM::LDMIA_UPD ||
87 MI->getOpcode() == ARM::t2LDMIA_UPD ||
88 MI->getOpcode() == ARM::VLDMDIA_UPD) {
96 if ((MI->getOpcode() == ARM::LDR_POST_IMM ||
97 MI->getOpcode() == ARM::LDR_POST_REG ||
98 MI->getOpcode() == ARM::t2LDR_POST) &&
225 while (MBBI->getOpcode() == ARM::VSTMDDB_UPD)
314 unsigned RetOpcode = MBBI->getOpcode();
[all...] |
| ARMBaseInstrInfo.cpp | 141 unsigned MemOpc = getUnindexedOpcode(MI->getOpcode());
291 unsigned LastOpc = LastInst->getOpcode();
309 unsigned SecondLastOpc = SecondLastInst->getOpcode();
317 LastOpc = LastInst->getOpcode();
324 SecondLastOpc = SecondLastInst->getOpcode();
378 if (!isUncondBranchOpcode(I->getOpcode()) &&
379 !isCondBranchOpcode(I->getOpcode()))
389 if (!isCondBranchOpcode(I->getOpcode()))
446 unsigned Opc = MI->getOpcode();
548 if (MI->getOpcode() == ARM::INLINEASM
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 576 switch (Op.getOpcode()) {
681 if (Op.getOperand(1).getOpcode() == ISD::Constant) {
683 SDValue Tmp1 = Op.getNode()->getOpcode() == ISD::UREM ?
694 if (Op.getOperand(1).getOpcode() == ISD::Constant)
695 return Op.getOpcode() == ISD::SDIV ? BuildSDIV(Op.getNode(), DAG, NULL)
698 switch (Op.getOpcode()) {
782 N->getOpcode() == ISD::VAARG &&
[all...] |
| /external/clang/lib/AST/ |
| ExprConstant.cpp | 653 if (E->getOpcode() != BO_Add &&
654 E->getOpcode() != BO_Sub)
684 if (E->getOpcode() == BO_Add)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 167 switch (Op.getOpcode())
198 switch (N->getOpcode()) {
358 if (Addr.getOpcode() != ISD::ADD) {
368 if (Base.getOpcode() == ISD::ADD &&
369 Base.getOperand(1).getOpcode() == ISD::SHL) {
382 if (Root->getOpcode() == XCoreISD::DPRelativeWrapper ||
383 Root->getOpcode() == XCoreISD::CPRelativeWrapper) {
554 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI &&
571 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI &&
594 if (Op.getOpcode() != ISD::ADD
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| InsnFormat.java | 46 String op = insn.getOpcode().getName();
409 int opcode = insn.getOpcode().getOpcode();
|
