| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| RopTranslator.java | 185 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) {
276 Rop lastRop = lastInsn.getOpcode();
464 if (insn.getOpcode().isCommutative()
524 Rop rop = insn.getOpcode();
525 if (rop.getOpcode() == RegOps.MARK_LOCAL) {
532 if (rop.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
574 Rop rop = insn.getOpcode();
575 int ropOpcode = rop.getOpcode();
671 if (insn.getOpcode().getOpcode() != RegOps.MOVE_RESULT_PSEUDO)
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/ |
| RopTranslator.java | 192 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) {
283 Rop lastRop = lastInsn.getOpcode();
471 if (insn.getOpcode().isCommutative()
531 Rop rop = insn.getOpcode();
532 if (rop.getOpcode() == RegOps.MARK_LOCAL) {
539 if (rop.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
581 Rop rop = insn.getOpcode();
582 int ropOpcode = rop.getOpcode();
678 if (insn.getOpcode().getOpcode() != RegOps.MOVE_RESULT_PSEUDO)
[all...] |
| /dalvik/dx/src/com/android/dx/io/instructions/ |
| FiveRegisterDecodedInstruction.java | 88 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| FourRegisterDecodedInstruction.java | 79 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| ThreeRegisterDecodedInstruction.java | 70 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| InstructionCodec.java | 110 out.write(codeUnit(insn.getOpcode(), insn.getA()));
127 out.write(codeUnit(insn.getOpcode(), relativeTarget));
163 codeUnit(insn.getOpcode(), insn.getLiteralByte()),
182 codeUnit(insn.getOpcode(), insn.getA()),
202 out.write(codeUnit(insn.getOpcode(), insn.getA()), relativeTarget);
220 codeUnit(insn.getOpcode(), insn.getA()),
247 int opcode = insn.getOpcode();
270 codeUnit(insn.getOpcode(), insn.getA()),
291 codeUnit(insn.getOpcode(), insn.getA()),
312 codeUnit(insn.getOpcode(), insn.getA())
[all...] |
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| FixedAddressChecker.cpp | 40 if (B->getOpcode() != BO_Assign)
|
| /external/webkit/Source/JavaScriptCore/interpreter/ |
| Interpreter.h | 76 Opcode getOpcode(OpcodeID id)
152 bool isCallBytecode(Opcode opcode) { return opcode == getOpcode(op_call) || opcode == getOpcode(op_construct) || opcode == getOpcode(op_call_eval); }
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 42 if (MI->getOpcode() == SP::LDri ||
43 MI->getOpcode() == SP::LDFri ||
44 MI->getOpcode() == SP::LDDFri) {
61 if (MI->getOpcode() == SP::STri ||
62 MI->getOpcode() == SP::STFri ||
63 MI->getOpcode() == SP::STDFri) {
140 if (I->getOpcode() == SP::BA) {
166 unsigned Opcode = I->getOpcode();
257 if (I->getOpcode() != SP::BA
258 && I->getOpcode() != SP::BCON
[all...] |
| DelaySlotFiller.cpp | 139 if (slot->getOpcode() == SP::RET)
142 if (slot->getOpcode() == SP::RETL) {
144 if (I->getOpcode() != SP::RESTORErr)
237 switch(MI->getOpcode()) {
299 if (candidate->getOpcode() == SP::UNIMP)
311 switch (I->getOpcode()) {
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| DexTranslationAdvice.java | 67 opcode.getOpcode() == RegOps.SUB) {
77 switch (opcode.getOpcode()) {
|
| Insn.java | 124 public final Rop getOpcode() {
157 if (opcode.getOpcode() == RegOps.MARK_LOCAL) {
187 * is just a convenient wrapper for {@code getOpcode().canThrow()}.
279 return opcode == b.getOpcode()
|
| BasicBlock.java | 79 Rop one = insns.get(i).getOpcode();
87 if (lastInsn.getOpcode().getBranchingness() == Rop.BRANCH_NONE) {
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| LiteralOpUpgrader.java | 97 Rop opcode = originalRopInsn.getOpcode();
114 RegOps.flippedIfOpcode(opcode.getOpcode()), null);
117 opcode.getOpcode(), null);
148 Rop opcode = originalRopInsn.getOpcode();
152 opcode.getOpcode() != RegOps.CONST) {
160 if (opcode.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
|
| MoveParamCombiner.java | 68 if (insn.getOpcode().getOpcode() != RegOps.MOVE_PARAM) {
|
| /external/llvm/include/llvm/ |
| InstrTypes.h | 118 return I->getOpcode() == Instruction::Alloca ||
119 I->getOpcode() == Instruction::Load ||
120 I->getOpcode() == Instruction::VAArg ||
121 I->getOpcode() == Instruction::ExtractValue ||
122 (I->getOpcode() >= CastOpsBegin && I->getOpcode() < CastOpsEnd);
328 BinaryOps getOpcode() const {
329 return static_cast<BinaryOps>(Instruction::getOpcode());
597 Instruction::CastOps getOpcode() const {
598 return Instruction::CastOps(Instruction::getOpcode());
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 291 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
308 return N->getOpcode() == Opc &&
351 if (Use->getOpcode() == ISD::CopyToReg)
357 unsigned Opcode = MCID.getOpcode();
397 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
421 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
447 if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB &&
449 if (N.getOpcode() == ISD::FrameIndex) {
457 if (N.getOpcode() == ARMISD::Wrapper &
[all...] |
| /external/llvm/lib/Analysis/ |
| PHITransAddr.cpp | 33 if (Inst->getOpcode() == Instruction::Add &&
199 return AddAsInput(ConstantExpr::getCast(Cast->getOpcode(),
207 if (CastI->getOpcode() == Cast->getOpcode() &&
261 if (Inst->getOpcode() == Instruction::Add &&
273 if (BOp->getOpcode() == Instruction::Add)
302 if (BO->getOpcode() == Instruction::Add &&
390 CastInst *New = CastInst::Create(Cast->getOpcode(),
424 if (Inst->getOpcode() == Instruction::Add &&
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCodeEmitter.cpp | 116 switch (MI.getOpcode()) {
141 assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
251 assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) ||
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSelect.cpp | 85 switch (I->getOpcode()) {
105 switch (I->getOpcode()) {
139 return CastInst::Create(Instruction::CastOps(TI->getOpcode()), NewSI,
182 return BinaryOperator::Create(BO->getOpcode(), MatchOp, NewSI);
184 return BinaryOperator::Create(BO->getOpcode(), NewSI, MatchOp);
229 BinaryOperator *BO = BinaryOperator::Create(TVI_BO->getOpcode(),
264 BinaryOperator *BO = BinaryOperator::Create(FVI_BO->getOpcode(),
297 return SimplifyBinOp(B->getOpcode(), RepOp, B->getOperand(1), TD);
299 return SimplifyBinOp(B->getOpcode(), B->getOperand(0), RepOp, TD);
332 return ConstantFoldInstOperands(I->getOpcode(), I->getType()
[all...] |
| InstCombineAndOrXor.cpp | 203 switch (Op->getOpcode()) {
416 switch (LHSI->getOpcode()) {
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | 325 switch (N.getOpcode()) {
348 switch (Op0.getOpcode()) {
405 unsigned Opc = N.getOpcode();
424 if ((Op0.getOpcode() == SPUISD::Hi && Op1.getOpcode() == SPUISD::Lo)
425 || (Op1.getOpcode() == SPUISD::Hi && Op0.getOpcode() == SPUISD::Lo)) {
429 } else if (Op1.getOpcode() == ISD::Constant
430 || Op1.getOpcode() == ISD::TargetConstant) {
434 if (Op0.getOpcode() == ISD::FrameIndex)
[all...] |
| SPUInstrInfo.cpp | 33 unsigned opc = I->getOpcode();
42 unsigned opc = I->getOpcode();
74 switch (MI->getOpcode()) {
100 switch (MI->getOpcode()) {
246 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode()));
267 Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode()));
290 if (I->getOpcode() == SPU::HBRA ||
291 I->getOpcode() == SPU::HBR_LABEL){
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 146 if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
151 assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
220 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill();
237 switch (MI.getOpcode()) {
258 switch (MI.getOpcode()) {
285 switch (MI.getOpcode()) {
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| BasicBlock.java | 79 Rop one = insns.get(i).getOpcode();
87 if (lastInsn.getOpcode().getBranchingness() == Rop.BRANCH_NONE) {
|
