| /external/llvm/lib/Target/Alpha/ |
| AlphaInstrInfo.cpp | 143 AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUInstrInfo.cpp | 139 SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/PTX/ |
| PTXInstrInfo.cpp | 300 void PTXInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
305 assert(false && "storeRegToStackSlot should not be called for PTX");
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 287 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 291 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i].getFrameIdx(),
|
| SystemZInstrInfo.cpp | 43 void SystemZInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 297 TII.storeRegToStackSlot(MBB, MI, Reg, true,
|
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 322 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
397 TII.storeRegToStackSlot(*MBB, I, Reg,
|
| VirtRegRewriter.cpp | [all...] |
| InlineSpiller.cpp | 725 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot,
[all...] |
| RegAllocFast.cpp | 269 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 166 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 339 PPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF,
456 return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx,
479 PPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
487 if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) {
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 702 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
[all...] |
