1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 .global irq_glue 30 .global irq_vector_table 31 32 #include <boot/arm.h> 33 34 v_reset: 35 b start 36 v_undefined: 37 b . 38 v_swi: 39 b . 40 v_prefetch_abt: 41 b . 42 v_data_abt: 43 b . 44 v_reserved: 45 b . 46 v_irq: 47 b . 48 v_fiq: 49 b . 50 51 start: 52 ldr r5, =0xfffff000 53 ands r4, pc, r5 54 beq already_at_zero 55 56 /* we're not loaded at 0 -- relocate us back down to where we belong */ 57 mov r5, #0 58 ldr r6, =BOOTLOADER_END 59 1: ldr r7, [r4], #4 60 str r7, [r5], #4 61 cmp r5, r6 62 bne 1b 63 64 mov pc, #0 65 66 already_at_zero: 67 /* save registers for main() */ 68 mov r7, r0 69 mov r8, r1 70 mov r9, r2 71 mov r10, r3 72 73 /* init stack */ 74 ldr r0, =BOOTLOADER_STACK 75 msr cpsr_c, #(PSR_I | PSR_F | PSR_SVC) 76 mov sp, r0 77 78 /* zero the BSS */ 79 ldr r1, =BOOTLOADER_BSS 80 ldr r2, =BOOTLOADER_END 81 mov r0, #0 82 1: str r0, [r1], #4 83 cmp r1, r2 84 ble 1b 85 86 bl periph_2gb_open 87 88 /* restore registers for main() */ 89 mov r0, r7 90 mov r1, r8 91 mov r2, r9 92 mov r3, r10 93 94 ldr r4, =_main 95 blx r4 96 b . 97
