/external/clang/test/Parser/ |
cxx-using-declaration.cpp | 4 int VA; 9 using A::VA; 15 VA = 1;
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/external/clang/test/Preprocessor/ |
macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__ 33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}}
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/external/clang/test/CXX/special/class.dtor/ |
p3-0x.cpp | 140 struct VA { 142 virtual ~VA() {} 145 struct VB : VA 149 struct TVB : VA
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/external/mksh/src/ |
shf.c | 771 #define VA(type) va_arg(args, type) 820 tmp = VA(int); 877 lnum = (long)VA(ssize_t); 879 lnum = VA(long); 881 lnum = (long)(short)VA(int); 883 lnum = (long)VA(int); 890 lnum = VA(size_t); 892 lnum = VA(unsigned long); 894 lnum = (unsigned long)(unsigned short)VA(int); 896 lnum = (unsigned long)VA(unsigned int) [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 721 CCValAssign &VA = ArgLocs[i]; 722 MVT RegVT = VA.getLocVT(); 726 switch (VA.getLocInfo()) { 742 if (VA.isRegLoc()) { 743 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 746 assert(VA.isMemLoc()); 754 unsigned ArgSize = VA.getValVT().getSizeInBits()/8; 755 unsigned StackLoc = VA.getLocMemOffset() + 4; [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 319 CCValAssign &VA = ArgLocs[i]; 320 if (VA.isRegLoc()) { 322 EVT RegVT = VA.getLocVT(); 335 RegInfo.addLiveIn(VA.getLocReg(), VReg); 341 if (VA.getLocInfo() == CCValAssign::SExt) 343 DAG.getValueType(VA.getValVT())); 344 else if (VA.getLocInfo() == CCValAssign::ZExt) 346 DAG.getValueType(VA.getValVT())); 348 if (VA.getLocInfo() != CCValAssign::Full) 349 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue) [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombinePHI.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | 316 CCValAssign &VA = RVLocs[i]; 318 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); 419 CCValAssign &VA = ArgLocs[i]; 420 if (VA.isMemLoc()) { 443 CCValAssign &VA = ArgLocs[i]; 448 switch (VA.getLocInfo()) { 455 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 458 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 461 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 465 if (VA.isMemLoc()) [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 110 CCValAssign &VA = RVLocs[i]; 111 assert(VA.isRegLoc() && "Can only return in registers!"); 113 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), 169 CCValAssign &VA = ArgLocs[i]; 182 if (VA.isRegLoc()) { 183 if (VA.needsCustom()) { 184 assert(VA.getLocVT() == MVT::f64); 186 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi); 212 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg); 214 if (VA.getLocVT() == MVT::f32 [all...] |
/external/webkit/Source/WebKit/android/content/ |
address_detector.cpp | 722 VA = 52, // VA Virginia 753 DC, VA, DC, DC, DC, DC, MD, MD, MD, MD, // 200-209 755 VA, VA, VA, VA, VA, VA, VA, VA, VA, VA, // 220-22 [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | 758 CCValAssign &VA = ValLocs[0]; 761 if (VA.getLocInfo() != CCValAssign::Full) 764 if (!VA.isRegLoc()) 769 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) 772 unsigned SrcReg = Reg + VA.getValNo(); 774 EVT DstVT = VA.getValVT(); 798 unsigned DstReg = VA.getLocReg(); 807 MRI.addLiveOut(VA.getLocReg()); [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/VMCore/ |
Verifier.cpp | [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/qemu/ |
ppc-dis.c | 820 /* The VA field in a VA, VX or VXR form instruction. */ 821 #define VA UI + 1 824 /* The VB field in a VA, VX or VXR form instruction. */ 825 #define VB VA + 1 828 /* The VC field in a VA form instruction. */ 832 /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 846 /* The SHB field in a VA form instruction. */ [all...] |