| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.cpp | 35 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
36 NopInst.addOperand(MCOperand::CreateReg(0));
39 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
40 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
41 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
42 NopInst.addOperand(MCOperand::CreateReg(0));
43 NopInst.addOperand(MCOperand::CreateReg(0));
|
| ARMAsmPrinter.cpp | [all...] |
| Thumb1InstrInfo.cpp | 31 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
33 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
34 NopInst.addOperand(MCOperand::CreateReg(0));
|
| ARMExpandPseudoInsts.cpp | 81 UseMI.addOperand(MO);
83 DefMI.addOperand(MO);
400 MIB.addOperand(MI.getOperand(OpIdx++));
403 MIB.addOperand(MI.getOperand(OpIdx++));
404 MIB.addOperand(MI.getOperand(OpIdx++));
407 MIB.addOperand(MI.getOperand(OpIdx++));
417 MIB.addOperand(MI.getOperand(OpIdx++));
418 MIB.addOperand(MI.getOperand(OpIdx++));
425 MIB.addOperand(MO);
452 MIB.addOperand(MI.getOperand(OpIdx++))
[all...] |
| ARMMCInstLower.cpp | 123 OutMI.addOperand(MCOp);
|
| Thumb2SizeReduction.cpp | 457 MIB.addOperand(MI->getOperand(0));
458 MIB.addOperand(MI->getOperand(1));
471 MIB.addOperand(MI->getOperand(OpNum));
518 .addOperand(MI->getOperand(0))
519 .addOperand(MI->getOperand(1))
674 MIB.addOperand(MI->getOperand(0));
689 MIB.addOperand(MI->getOperand(i));
765 MIB.addOperand(MI->getOperand(0));
794 MIB.addOperand(MO);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsMCInstLower.cpp | 114 Inst.addOperand(Opnd0);
115 Inst.addOperand(Opnd1);
117 Inst.addOperand(Opnd2);
204 OutMI.addOperand(MCOp);
229 Move.addOperand(Target);
230 Move.addOperand(ATReg);
231 Move.addOperand(ZeroReg);
239 Instr1.addOperand(ATReg);
240 Instr1.addOperand(Base);
241 Instr1.addOperand(AdjName)
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXMCInstLower.cpp | 29 OutMI.addOperand(AP.lowerOperand(MO));
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 548 instr.addOperand(MCOperand::CreateReg(RD));
549 instr.addOperand(MCOperand::CreateReg(RB));
550 instr.addOperand(MCOperand::CreateReg(RA));
556 instr.addOperand(MCOperand::CreateReg(RD));
557 instr.addOperand(MCOperand::CreateReg(RA));
558 instr.addOperand(MCOperand::CreateReg(RB));
564 instr.addOperand(MCOperand::CreateReg(RD));
565 instr.addOperand(MCOperand::CreateReg(RA));
575 instr.addOperand(MCOperand::CreateReg(RD));
576 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 62 MI->addOperand(MachineOperand::CreateReg(RegNo,
77 MI->addOperand(MachineOperand::CreateImm(Val));
82 MI->addOperand(MachineOperand::CreateCImm(Val));
87 MI->addOperand(MachineOperand::CreateFPImm(Val));
93 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
98 MI->addOperand(MachineOperand::CreateFI(Idx));
105 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
111 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
118 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
124 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags))
[all...] |
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 373 Inst.addOperand(MCOperand::CreateReg(CPU64RegsTable[RegNo]));
384 Inst.addOperand(MCOperand::CreateReg(CPURegsTable[RegNo]));
395 Inst.addOperand(MCOperand::CreateReg(FGR64RegsTable[RegNo]));
406 Inst.addOperand(MCOperand::CreateReg(FGR32RegsTable[RegNo]));
414 Inst.addOperand(MCOperand::CreateReg(RegNo));
427 Inst.addOperand(MCOperand::CreateReg(CPURegsTable[Reg]));
430 Inst.addOperand(MCOperand::CreateReg(CPURegsTable[Reg]));
431 Inst.addOperand(MCOperand::CreateReg(CPURegsTable[Base]));
432 Inst.addOperand(MCOperand::CreateImm(Offset));
445 Inst.addOperand(MCOperand::CreateReg(FGR64RegsTable[Reg]))
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 344 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
346 Inst.addOperand(MCOperand::CreateExpr(Expr));
351 Inst.addOperand(MCOperand::CreateReg(getReg()));
383 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
384 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
385 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
387 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
394 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
396 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 536 MI.addOperand(MCOperand::CreateExpr(ARMMCExpr::CreateUpper16(Expr, *Ctx)));
538 MI.addOperand(MCOperand::CreateExpr(ARMMCExpr::CreateLower16(Expr, *Ctx)));
540 MI.addOperand(MCOperand::CreateExpr(Expr));
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 226 OutMI.addOperand(OutMI.getOperand(0));
227 OutMI.addOperand(OutMI.getOperand(0));
249 Inst.addOperand(Saved);
300 Inst.addOperand(Saved);
345 OutMI.addOperand(MCOp);
402 OutMI.addOperand(Saved);
428 OutMI.addOperand(Saved);
540 OutMI.addOperand(MCOperand::CreateReg(X86::R10));
541 OutMI.addOperand(MCOperand::CreateReg(X86::RAX));
568 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // des
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 205 MI->addOperand(MachineOperand::CreateReg(VRBase, true));
220 MI->addOperand(MachineOperand::CreateReg(Reg, true));
232 MI->addOperand(MachineOperand::CreateReg(VRBase, true));
328 MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef,
335 /// AddOperand - Add the specified operand to the specified machine instr. II
339 void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op,
348 MI->addOperand(MachineOperand::CreateImm(C->getSExtValue()));
351 MI->addOperand(MachineOperand::CreateFPImm(CFP));
353 MI->addOperand(MachineOperand::CreateReg(R->getReg(), false));
355 MI->addOperand(MachineOperand::CreateRegMask(RM->getRegMask()))
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 174 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum));
285 MI.addOperand(MCOperand::CreateExpr(Expr));
383 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
386 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4)));
418 mcInst.addOperand(MCOperand::CreateImm(immediate));
449 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break;
596 mcInst.addOperand(baseReg);
597 mcInst.addOperand(scaleAmount);
598 mcInst.addOperand(indexReg);
602 mcInst.addOperand(displacement)
[all...] |
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 178 Inst.addOperand(MCOperand::CreateImm(0));
180 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
182 Inst.addOperand(MCOperand::CreateExpr(Expr));
187 Inst.addOperand(MCOperand::CreateReg(getReg()));
203 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
207 Inst.addOperand(MCOperand::CreateReg(RegOff));
|
| /external/llvm/unittests/VMCore/ |
| MetadataTest.cpp | 143 NMD->addOperand(n);
144 NMD->addOperand(n2);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 91 MCI.addOperand(MCO);
|
| /frameworks/compile/slang/ |
| slang_rs_metadata_spec_encoder.cpp | 285 RecordInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
330 mVarInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
356 mFuncInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
434 RSMetadataStrTab->addOperand(llvm::MDNode::get(mModule->getContext(),
476 RSTypeInfo->addOperand(llvm::MDNode::get(mModule->getContext(),
|
| slang_rs_backend.cpp | 266 mExportVarMetadata->addOperand(
276 mRSObjectSlotsMetadata->addOperand(llvm::MDNode::get(mLLVMContext,
407 mExportFuncMetadata->addOperand(
437 mExportForEachNameMetadata->addOperand(
445 mExportForEachSignatureMetadata->addOperand(
476 mExportTypeMetadata->addOperand(
503 StructInfoMetadata->addOperand(
|
| /external/llvm/include/llvm/ |
| Metadata.h | 224 /// addOperand - Add metadata operand.
225 void addOperand(MDNode *M);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430BranchSelector.cpp | 156 .addImm(4).addOperand(Cond[0]);
|
| MSP430MCInstLower.cpp | 151 OutMI.addOperand(MCOp);
|
