| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldr_ext.ll | 12 define i32 @test2(i16* %v.pntr.s0.u1) {
13 %tmp.u = load i16* %v.pntr.s0.u1
14 %tmp1.s = zext i16 %tmp.u to i32
25 %tmp.s = load i16* null
26 %tmp1.s = sext i16 %tmp.s to i32
|
| thumb2-smla.ll | 3 define i32 @f3(i32 %a, i16 %x, i32 %y) {
6 %tmp = sext i16 %x to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| norex-subreg.ll | 20 %conv1 = trunc i32 %add to i16
21 %bf.value = and i16 %conv1, 255
22 %1 = and i16 %bf.value, 255
23 %2 = shl i16 %1, 8
24 %3 = load i16* undef, align 1
25 %4 = and i16 %3, 255
26 %5 = or i16 %4, %2
27 store i16 %5, i16* undef, align 1
28 %6 = load i16* undef, align
[all...] |
| 2007-10-12-SpillerUnfold2.ll | 3 define signext i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) {
12 %tmp180181 = sext i16 0 to i32 ; <i32> [#uses=1]
17 ret i16
[all...] |
| avx2-cmp.ll | 18 define <16 x i16> @v16i16-cmp(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
19 %bincmp = icmp slt <16 x i16> %i, %j
20 %x = sext <16 x i1> %bincmp to <16 x i16>
21 ret <16 x i16> %x
46 define <16 x i16> @v16i16-cmpeq(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
47 %bincmp = icmp eq <16 x i16> %i, %
[all...] |
| shl_elim.ll | 9 %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1]
10 %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1]
|
| twoaddr-pass-sink.ll | 5 %tmp25 = bitcast <2 x i64> %a1 to <8 x i16> ; <<8 x i16>> [#uses=1]
17 %tmp13 = bitcast <2 x i64> %tmp8 to <8 x i16> ; <<8 x i16>> [#uses=1]
18 %tmp15 = bitcast <2 x i64> %tmp11 to <8 x i16> ; <<8 x i16>> [#uses=1]
19 %tmp16 = shufflevector <8 x i16> %tmp15, <8 x i16> %tmp13, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
20 %tmp26 = mul <8 x i16> %tmp25, %tmp16 ; <<8 x i16>> [#uses=1
[all...] |
| blend-msb.ll | 34 define <8 x i16> @vsel_8xi16(<8 x i16> %v1, <8 x i16> %v2) {
35 %vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x i16> %v1, <8 x i16> %v2
36 ret <8 x i16> %vsel
|
| machine-cp.ll | 30 define <8 x i16> @t2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
34 %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
35 ret <8 x i16> %tmp8
|
| /external/llvm/test/CodeGen/XCore/ |
| store.ll | 21 define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
25 %0 = getelementptr i16* %p, i32 %offset
26 store i16 %val, i16* %0, align 2
|
| /external/llvm/test/ExecutionEngine/ |
| test-setcond-int.ll | 10 %short1 = add i16 0, 0 ; <i16> [#uses=6]
11 %short2 = add i16 0, 0 ; <i16> [#uses=6]
18 %ushort1 = add i16 0, 0 ; <i16> [#uses=6]
19 %ushort2 = add i16 0, 0 ; <i16> [#uses=6]
26 %test7 = icmp eq i16 %ushort1, %ushort2 ; <i1> [#uses=0]
27 %test8 = icmp uge i16 %ushort1, %ushort2 ; <i1> [#uses=0
[all...] |
| test-arith.ll | 11 %A.upgrd.1 = add i16 0, 12 ; <i16> [#uses=1]
12 %B.upgrd.2 = sub i16 %A.upgrd.1, 1 ; <i16> [#uses=2]
13 %C.upgrd.3 = mul i16 %B.upgrd.2, %B.upgrd.2 ; <i16> [#uses=2]
14 %D.upgrd.4 = sdiv i16 %C.upgrd.3, %C.upgrd.3 ; <i16> [#uses=2]
15 %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0
[all...] |
| /external/llvm/test/Transforms/LoopRotate/ |
| alloca.ll | 11 @e = global i16 10
17 %end = load i16* @e
21 %n.phi = phi i16 [ %n, %loop.fin ], [ 0, %entry ]
23 %cond = icmp eq i16 %n.phi, %end
27 %n = add i16 %n.phi, 1
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| different-type-ivs.ll | 10 %indvar.upgrd.1 = trunc i32 %indvar to i16 ; <i16> [#uses=1]
11 %X.0.0 = mul i16 %indvar.upgrd.1, 1234 ; <i16> [#uses=1]
13 %tmp.5 = sext i16 %X.0.0 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/LoopUnswitch/ |
| 2008-06-02-DomInfo.ll | 5 define i32 @func_3(i16 signext %p_5, i16 signext %p_6) nounwind {
7 %tmp3 = icmp eq i16 %p_5, 0 ; <i1> [#uses=1]
8 %tmp1314 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
21 %tmp6566 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/ARM/ |
| vldlane.ll | 14 define <4 x i16> @vld1lanei16(i16* %A, <4 x i16>* %B) nounwind {
18 %tmp1 = load <4 x i16>* %B
19 %tmp2 = load i16* %A, align 8
20 %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2
21 ret <4 x i16> %tmp3
62 define <8 x i16> @vld1laneQi16(i16* %A, <8 x i16>* %B) nounwind
[all...] |
| vzip.ll | 15 define <4 x i16> @vzipi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
18 ;CHECK-NEXT: vadd.i16
19 %tmp1 = load <4 x i16>* %A
20 %tmp2 = load <4 x i16>* %B
21 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
22 %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7
[all...] |
| fast-isel-binary.ll | 30 define void @add_i16(i16 %a, i16 %b) nounwind ssp {
34 %a.addr = alloca i16, align 4
35 %0 = add i16 %a, %b
38 store i16 %0, i16* %a.addr, align 4
68 define void @or_i16(i16 %a, i16 %b) nounwind ssp {
72 %a.addr = alloca i16, align 4
73 %0 = or i16 %a, %
[all...] |
| fast-isel-fold.ll | 5 @b = global i16 2, align 2
26 %1 = load i16* @b, align 2
27 call void @foo2(i16 zeroext %1)
32 declare void @foo2(i16 zeroext)
53 %1 = load i16* @b, align 2
54 %2 = zext i16 %1 to i32
65 %1 = load i16* @b, align 2
66 %2 = sext i16 %1 to i32
|
| vceq.ll | 13 define <4 x i16> @vceqi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
15 ;CHECK: vceq.i16
16 %tmp1 = load <4 x i16>* %A
17 %tmp2 = load <4 x i16>* %B
18 %tmp3 = icmp eq <4 x i16> %tmp1, %tmp2
19 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
20 ret <4 x i16> %tmp4
53 define <8 x i16> @vceqQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind
[all...] |
| vcgt.ll | 14 define <4 x i16> @vcgts16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
17 %tmp1 = load <4 x i16>* %A
18 %tmp2 = load <4 x i16>* %B
19 %tmp3 = icmp sgt <4 x i16> %tmp1, %tmp2
20 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
21 ret <4 x i16> %tmp4
44 define <4 x i16> @vcgtu16(<4 x i16>* %A, <4 x i16>* %B) nounwind
[all...] |
| /external/llvm/test/Transforms/CodeExtractor/ |
| 2004-03-14-NoSwitchSupport.ll | 23 switch i16 0, label %codeReplTail [
24 i16 0, label %loopexit.0.loopexit
25 i16 1, label %then.1
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-05-18-FoldIntToPtr.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
12 ret i1 icmp eq (i8* inttoptr (i16 1 to i8*), i8* inttoptr (i16 2 to i8*))
|
| cast.ll | 3 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64"
15 %c1 = zext i8 %A to i16 ; <i16> [#uses=1]
16 %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1]
78 define i16 @test9(i16 %A) {
79 %c1 = sext i16 %A to i32 ; <i32> [#uses=1]
80 %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1]
81 ret i16 %c
[all...] |
| /external/llvm/test/Transforms/SimplifyCFG/ |
| PhiEliminate2.ll | 3 define i32 @test(i1 %C, i32 %V1, i32 %V2, i16 %V3) {
10 %V5 = sext i16 %V3 to i32 ; <i32> [#uses=1]
14 call i32 @test( i1 false, i32 0, i32 0, i16 0 ) ; <i32>:0 [#uses=0]
|
