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Searched
refs:isUse
(Results
1 - 25
of
41
) sorted by null
1
2
/external/llvm/lib/Target/Sparc/
DelaySlotFiller.cpp
223
if (MO.
isUse
()) {
245
assert(Reg.
isUse
() && "JMPL first operand is not a use.");
252
assert(RegOrImm.
isUse
() && "JMPLrr second operand is not a use.");
273
if (MO.
isUse
())
/external/llvm/lib/CodeGen/
Spiller.cpp
113
hasUse |= mi->getOperand(i).
isUse
();
127
if (mop.
isUse
() && !mi->isRegTiedToDefOperand(mopIdx)) {
ExpandPostRAPseudos.cpp
90
if (!MO.isReg() || !MO.isImplicit() || MO.
isUse
())
100
(MI->getOperand(2).isReg() && MI->getOperand(2).
isUse
()) &&
TwoAddressInstructionPass.cpp
215
if (MO.
isUse
() && MOReg != SavedReg)
371
if (MO.
isUse
() && DI->second < LastUse)
397
if (MO.
isUse
() && DI->second > LastUseDist) {
475
if (!MO.isReg() || !MO.
isUse
() || MO.getReg() != Reg)
829
if (MO.
isUse
() && MO.isKill())
[
all
...]
MachineInstr.cpp
[
all
...]
RegAllocFast.cpp
224
if (MO.
isUse
() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) {
596
if (LRI->LastUse != MI || LRI->LastUse->getOperand(LRI->LastOpNum).
isUse
())
628
if (MO.
isUse
())
724
if (MO.
isUse
()) {
806
if (!MO.isReg() || !MO.
isUse
())
[
all
...]
RegisterScavenging.cpp
161
if (MO.
isUse
()) {
185
if (MO.
isUse
()) {
CriticalAntiDepBreaker.cpp
236
if (MO.
isUse
() && Special) {
307
if (!MO.
isUse
()) continue;
606
if (MO.
isUse
() && TRI->regsOverlap(AntiDepReg, Reg)) {
MachineCSE.cpp
123
if (!MO.isReg() || !MO.
isUse
())
179
if (MO.
isUse
())
344
if (MO.isReg() && MO.
isUse
() &&
TargetInstrInfoImpl.cpp
367
assert(MI->getOperand(Ops[i]).
isUse
() && "Folding load into def!");
439
if (MO.
isUse
()) {
460
if (MO.
isUse
())
MachineSink.cpp
483
if (MO.
isUse
()) {
495
if (MO.
isUse
()) continue;
DeadMachineInstructionElim.cpp
187
if (MO.isReg() && MO.
isUse
()) {
PostRASchedulerList.cpp
531
if (!MO.isReg() || !MO.
isUse
()) continue;
567
if (!MO.isReg() || !MO.
isUse
() || MO.isUndef()) continue;
BranchFolding.cpp
155
if (!MO.isReg() || !MO.
isUse
())
[
all
...]
InlineSpiller.cpp
844
if (MO.isReg() && MO.
isUse
() && MO.getReg() == VirtReg.reg)
[
all
...]
MachineLICM.cpp
[
all
...]
LiveInterval.cpp
715
if (MO.
isUse
() && MO.isUndef())
719
Idx = Idx.getRegSlot(MO.
isUse
());
ScheduleDAGInstrs.cpp
287
SDep::Kind Kind = MO.
isUse
() ? SDep::Anti : SDep::Output;
786
if (!MO.isReg() || !MO.
isUse
())
[
all
...]
/external/llvm/include/llvm/CodeGen/
MachineRegisterInfo.h
455
if ((!ReturnUses && op->
isUse
()) ||
487
while (Op && ((!ReturnUses && Op->
isUse
()) ||
MachineOperand.h
247
bool
isUse
() const {
301
return !isUndef() && !isInternalRead() && (
isUse
() || getSubReg());
LiveIntervalAnalysis.h
102
static float getSpillWeight(bool isDef, bool
isUse
, unsigned loopDepth);
ScheduleDAGInstrs.h
81
if (!MO.isReg() || !MO.
isUse
())
/external/llvm/lib/Target/Mips/
MipsDelaySlotFiller.cpp
206
if (MO.
isUse
()) {
237
else if (MO.
isUse
())
/external/llvm/lib/Target/ARM/
Thumb2ITBlockPass.cpp
70
if (MO.
isUse
())
Thumb2SizeReduction.cpp
230
if (!MO.isReg() || MO.isUndef() || MO.
isUse
())
813
if (!MO.isReg() || MO.isUndef() || MO.
isUse
())
[
all
...]
Completed in 526 milliseconds
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