Lines Matching refs:R2
135 // Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
136 // $r2 to adjust $sp:
137 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
140 BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
143 .addReg(SPU::R2)
147 .addReg(SPU::R2);
148 BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2)
149 .addReg(SPU::R2)
151 BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
152 .addReg(SPU::R2)
216 // Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
217 // $r2 to adjust $sp:
218 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
221 BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
225 .addReg(SPU::R2);
229 BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2).
230 addReg(SPU::R2)
232 BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
233 .addReg(SPU::R2)
246 // Also, unless R2 is really used someday, don't spill it automatically.
249 MF.getRegInfo().setPhysRegUnused(SPU::R2);
