Lines Matching defs:DAG
1 //===-- SPUISelLowering.cpp - Cell SPU DAG Lowering Implementation --------===//
48 //! Expand a library call into an actual call DAG node
56 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG,
61 SDValue InChain = DAG.getEntryNode();
67 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
74 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
79 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
86 Callee, Args, DAG, Op.getDebugLoc());
466 // We have target-specific dag combine patterns for the following nodes:
560 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
563 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
570 EVT vecVT = InVT.isVector()? InVT: EVT::getVectorVT(*DAG.getContext(), InVT,
604 rotate = DAG.getConstant(rotamt, MVT::i16);
609 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
611 DAG.getConstant((offset & ~0xf), PtrVT));
622 rotate = DAG.getConstant(rotamt, MVT::i16);
629 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
631 DAG.getConstant(rotamt, PtrVT));
636 MachineFunction &MF = DAG.getMachineFunction();
648 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
649 the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag);
650 basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT);
654 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
657 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
659 DAG.getConstant(0, PtrVT));
664 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
666 DAG.getConstant(-pso, PtrVT));
670 SDValue low = DAG.getLoad(MVT::i128, dl, the_chain, basePtr,
681 result = DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, MVT::i128,
686 EVT vecVT = EVT::getVectorVT(*DAG.getContext(),
688 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT,
689 DAG.getNode(ISD::BITCAST, dl, vecVT, result));
697 SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32,
698 basePtr, DAG.getConstant( 0xf, MVT::i32 ) );
701 SDValue ones = DAG.getConstant(-1, MVT::v4i32 );
702 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones);
704 SDValue high = DAG.getLoad(MVT::i128, dl, the_chain,
705 DAG.getNode(ISD::ADD, dl, PtrVT,
707 DAG.getConstant(16, PtrVT)),
712 the_chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(1),
718 high = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, high,
719 DAG.getNode(ISD::SUB, dl, MVT::i32,
720 DAG.getConstant( 16, MVT::i32),
726 low = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, low, offset );
729 result = DAG.getNode(ISD::BITCAST, dl, vecVT,
730 DAG.getNode(ISD::OR, dl, MVT::i128, low, high));
733 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT, result );
739 result = DAG.getNode(ISD::SIGN_EXTEND, dl, OutVT, result);
741 result = DAG.getNode(ISD::ZERO_EXTEND, dl, OutVT, result);
748 result = DAG.getNode(NewOpc, dl, OutVT, result);
751 SDVTList retvts = DAG.getVTList(OutVT, MVT::Other);
757 result = DAG.getNode(SPUISD::LDRESULT, dl, retvts,
769 LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
774 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
778 EVT vecVT = StVT.isVector()? StVT: EVT::getVectorVT(*DAG.getContext(), StVT,
810 insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
812 DAG.getConstant((offset & 0xf), PtrVT));
815 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
817 DAG.getConstant((offset & ~0xf), PtrVT));
821 insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
823 DAG.getConstant(0, PtrVT));
824 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
826 DAG.getConstant(0, PtrVT));
831 MachineFunction &MF = DAG.getMachineFunction();
843 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
844 the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag);
845 basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT);
849 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
852 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
854 DAG.getConstant(0, PtrVT));
858 insertEltOffs = DAG.getNode(ISD::ADD, dl, PtrVT,
860 DAG.getConstant(0, PtrVT));
864 SDValue low = DAG.getLoad(vecVT, dl, the_chain, basePtr,
891 basePtr.getNode()->dump(&DAG);
896 SDValue insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, vecVT,
898 SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT,
901 result = DAG.getNode(SPUISD::SHUFB, dl, vecVT,
903 DAG.getNode(ISD::BITCAST, dl,
906 result = DAG.getStore(the_chain, dl, result, basePtr,
918 SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32,
920 DAG.getConstant(0xf, MVT::i32));
922 SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32,
923 DAG.getConstant( 16, MVT::i32),
926 SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32,
927 DAG.getConstant( 16, MVT::i32),
928 DAG.getConstant( VT.getSizeInBits()/8,
931 SDValue ones = DAG.getConstant(-1, MVT::v4i32);
932 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones);
942 Value = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, Value);
943 lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, ones, surplus);
944 lowmask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask,
946 Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value);
947 Value = DAG.getNode(ISD::AND, dl, MVT::i128, Value, lowmask);
952 Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value);
955 himask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask,
957 lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, lowmask,
962 SDValue hi = DAG.getLoad(MVT::i128, dl, the_chain,
963 DAG.getNode(ISD::ADD, dl, PtrVT, basePtr,
964 DAG.getConstant( 16, PtrVT)),
968 the_chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(1),
971 low = DAG.getNode(ISD::AND, dl, MVT::i128,
972 DAG.getNode( ISD::BITCAST, dl, MVT::i128, low),
973 DAG.getNode( ISD::XOR, dl, MVT::i128, lowmask, ones));
974 hi = DAG.getNode(ISD::AND, dl, MVT::i128,
975 DAG.getNode( ISD::BITCAST, dl, MVT::i128, hi),
976 DAG.getNode( ISD::XOR, dl, MVT::i128, himask, ones));
980 SDValue rlow = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, Value, offset);
981 rlow = DAG.getNode(ISD::AND, dl, MVT::i128, rlow, lowmask);
982 SDValue rhi = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, Value,
987 rlow = DAG.getNode(ISD::OR, dl, MVT::i128,
988 DAG.getNode(ISD::BITCAST, dl, MVT::i128, low),
989 DAG.getNode(ISD::BITCAST, dl, MVT::i128, rlow));
990 rhi = DAG.getNode(ISD::OR, dl, MVT::i128,
991 DAG.getNode(ISD::BITCAST, dl, MVT::i128, hi),
992 DAG.getNode(ISD::BITCAST, dl, MVT::i128, rhi));
994 low = DAG.getStore(the_chain, dl, rlow, basePtr,
997 hi = DAG.getStore(the_chain, dl, rhi,
998 DAG.getNode(ISD::ADD, dl, PtrVT, basePtr,
999 DAG.getConstant( 16, PtrVT)),
1002 result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(0),
1011 LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1015 SDValue CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
1016 SDValue Zero = DAG.getConstant(0, PtrVT);
1017 const TargetMachine &TM = DAG.getTarget();
1024 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, CPI, Zero);
1026 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, CPI, Zero);
1027 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, CPI, Zero);
1028 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1038 SPU::LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUTargetMachine &TM) {
1039 return ::LowerConstantPool(Op, DAG, TM.getSubtargetImpl());
1043 LowerJumpTable(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1046 SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
1047 SDValue Zero = DAG.getConstant(0, PtrVT);
1048 const TargetMachine &TM = DAG.getTarget();
1054 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, JTI, Zero);
1056 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, JTI, Zero);
1057 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, JTI, Zero);
1058 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1067 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1071 SDValue GA = DAG.getTargetGlobalAddress(GV, Op.getDebugLoc(),
1073 const TargetMachine &TM = DAG.getTarget();
1074 SDValue Zero = DAG.getConstant(0, PtrVT);
1080 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, GA, Zero);
1082 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, GA, Zero);
1083 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, GA, Zero);
1084 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1095 LowerConstantFP(SDValue Op, SelectionDAG &DAG) {
1107 SDValue T = DAG.getConstant(dbits, MVT::i64);
1108 SDValue Tvec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T);
1109 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
1110 DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Tvec));
1121 DebugLoc dl, SelectionDAG &DAG,
1125 MachineFunction &MF = DAG.getMachineFunction();
1134 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1137 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1138 getTargetMachine(), ArgLocs, *DAG.getContext());
1142 // Add DAG nodes to load the arguments or copy them out of registers.
1189 ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT);
1196 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
1197 ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, MachinePointerInfo(),
1234 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
1236 SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8);
1237 SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, MachinePointerInfo(),
1246 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1255 static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) {
1264 return DAG.getConstant((int)C->getZExtValue() >> 2, MVT::i32).getNode();
1270 SelectionDAG &DAG = CLI.DAG;
1289 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1290 getTargetMachine(), ArgLocs, *DAG.getContext());
1298 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1303 SDValue StackPtr = DAG.getRegister(SPU::R1, MVT::i32);
1321 SDValue PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
1322 PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
1342 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff,
1357 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumStackBytes,
1362 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1370 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1384 SDValue Zero = DAG.getConstant(0, PtrVT);
1385 SDValue GA = DAG.getTargetGlobalAddress(GV, dl, CalleeVT);
1397 Callee = DAG.getNode(SPUISD::AFormAddr, dl, CalleeVT, GA, Zero);
1399 Callee = DAG.getNode(SPUISD::PCRelAddr, dl, CalleeVT, GA, Zero);
1404 Callee = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, GA, Zero);
1408 SDValue Zero = DAG.getConstant(0, PtrVT);
1409 SDValue ExtSym = DAG.getTargetExternalSymbol(S->getSymbol(),
1413 Callee = DAG.getNode(SPUISD::AFormAddr, dl, CalleeVT, ExtSym, Zero);
1415 Callee = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, ExtSym, Zero);
1417 } else if (SDNode *Dest = isLSAAddress(Callee, DAG)) {
1429 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1435 Chain = DAG.getNode(CallOpc, dl, DAG.getVTList(MVT::Other, MVT::Glue),
1439 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumStackBytes, true),
1440 DAG.getIntPtrConstant(0, true), InFlag);
1450 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1451 getTargetMachine(), RVLocs, *DAG.getContext());
1459 SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
1474 DebugLoc dl, SelectionDAG &DAG) const {
1477 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1478 getTargetMachine(), RVLocs, *DAG.getContext());
1483 if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
1485 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg());
1494 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
1500 return DAG.getNode(SPUISD::RET_FLAG, dl, MVT::Other, Chain, Flag);
1502 return DAG.getNode(SPUISD::RET_FLAG, dl, MVT::Other, Chain);
1535 SDValue SPU::get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
1548 return DAG.getTargetConstant(Value, ValueType);
1557 SDValue SPU::get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
1570 return DAG.getTargetConstant(Value, ValueType);
1580 SDValue SPU::get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
1593 return DAG.getTargetConstant(Value, ValueType);
1606 SDValue SPU::get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
1613 return DAG.getTargetConstant(Value & 0xff, ValueType);
1616 return DAG.getTargetConstant(Value, ValueType);
1625 SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
1632 return DAG.getTargetConstant(Value >> 16, ValueType);
1639 SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
1641 return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i32);
1648 SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
1650 return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i64);
1658 LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) {
1690 SDValue T = DAG.getConstant(Value32, MVT::i32);
1691 return DAG.getNode(ISD::BITCAST, dl, MVT::v4f32,
1692 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, T,T,T,T));
1699 SDValue T = DAG.getConstant(f64val, MVT::i64);
1700 return DAG.getNode(ISD::BITCAST, dl, MVT::v2f64,
1701 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T));
1708 Ops.assign(8, DAG.getConstant(Value16, MVT::i16));
1709 return DAG.getNode(ISD::BITCAST, dl, VT,
1710 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i16, &Ops[0], Ops.size()));
1714 SDValue T = DAG.getConstant(Value16, EltVT);
1718 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
1721 SDValue T = DAG.getConstant(unsigned(SplatBits), VT.getVectorElementType());
1722 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, T, T, T, T);
1725 return SPU::LowerV2I64Splat(VT, DAG, SplatBits, dl);
1733 SPU::LowerV2I64Splat(EVT OpVT, SelectionDAG& DAG, uint64_t SplatVal,
1740 SDValue Val = DAG.getTargetConstant(upper, MVT::i32);
1741 return DAG.getNode(ISD::BITCAST, dl, OpVT,
1742 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1757 SDValue UpperVal = DAG.getConstant(upper, MVT::i32);
1758 SDValue LowerVal = DAG.getConstant(lower, MVT::i32);
1759 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1761 return DAG.getNode(ISD::BITCAST, dl, OpVT, BV);
1771 SDValue LO32C = DAG.getConstant(lower, MVT::i32);
1772 LO32 = DAG.getNode(ISD::BITCAST, dl, OpVT,
1773 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1779 SDValue HI32C = DAG.getConstant(upper, MVT::i32);
1780 HI32 = DAG.getNode(ISD::BITCAST, dl, OpVT,
1781 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1815 ShufBytes.push_back(DAG.getConstant(val, MVT::i32));
1818 return DAG.getNode(SPUISD::SHUFB, dl, OpVT, HI32, LO32,
1819 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1837 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
1920 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1924 SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
1925 DAG.getRegister(SPU::R1, PtrVT),
1926 DAG.getConstant(V2EltOffset, MVT::i32));
1927 SDValue ShufMaskOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl,
1931 return DAG.getNode(SPUISD::SHUFB, dl, V1.getValueType(), V2, V1,
1937 return DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, V1.getValueType(),
1938 V1, DAG.getConstant(rotamt, MVT::i16));
1949 ResultMask.push_back(DAG.getConstant(SrcElt*BytesPerElement+j,MVT::i8));
1951 SDValue VPermMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8,
1953 return DAG.getNode(SPUISD::SHUFB, dl, V1.getValueType(), V1, V2, VPermMask);
1957 static SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) {
1982 SDValue CValue = DAG.getConstant(CN->getZExtValue(), VT);
1986 return DAG.getNode(ISD::BUILD_VECTOR, dl, Op.getValueType(),
1998 return DAG.getNode(SPUISD::PREFSLOT2VEC, dl, Op.getValueType(), Op0, Op0);
2003 static SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
2026 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, N);
2083 ShufMask[i] = DAG.getConstant(bits, MVT::i32);
2087 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2090 retval = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
2091 DAG.getNode(SPUISD::SHUFB, dl, N.getValueType(),
2104 Elt = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Elt);
2114 Elt = DAG.getNode(ISD::SHL, dl, MVT::i32, Elt,
2115 DAG.getConstant(scaleShift, MVT::i32));
2118 vecShift = DAG.getNode(SPUISD::SHL_BYTES, dl, VecVT, N, Elt);
2130 SDValue factor = DAG.getConstant(0x00000000, MVT::i32);
2131 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2136 SDValue factor = DAG.getConstant(0x00010001, MVT::i32);
2137 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2143 SDValue factor = DAG.getConstant(0x00010203, MVT::i32);
2144 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2150 SDValue loFactor = DAG.getConstant(0x00010203, MVT::i32);
2151 SDValue hiFactor = DAG.getConstant(0x04050607, MVT::i32);
2152 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2158 retval = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
2159 DAG.getNode(SPUISD::SHUFB, dl, VecVT,
2166 static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
2182 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
2184 SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
2185 DAG.getRegister(SPU::R1, PtrVT),
2186 DAG.getConstant(Offset, PtrVT));
2188 EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(),
2190 SDValue ShufMask = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, maskVT, Pointer);
2193 DAG.getNode(SPUISD::SHUFB, dl, VT,
2194 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp),
2196 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, ShufMask));
2201 static SDValue LowerI8Math(SDValue Op, SelectionDAG &DAG, unsigned Opc,
2216 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2217 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2218 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2219 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2227 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2228 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2229 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2230 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2237 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0);
2242 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2247 DAG.getNode(ISD::OR, dl, MVT::i16, N0,
2248 DAG.getNode(ISD::SHL, dl, MVT::i16,
2249 N0, DAG.getConstant(8, MVT::i32)));
2252 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2253 DAG.getNode(Opc, dl, MVT::i16, ExpandArg, N1));
2260 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0);
2267 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2270 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2271 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2277 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2283 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2286 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2287 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2292 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2293 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2294 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2295 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2302 LowerByteImmed(SDValue Op, SelectionDAG &DAG) {
2335 SDValue tc = DAG.getTargetConstant(SplatBits & 0xff, MVT::i8);
2339 return DAG.getNode(Op.getNode()->getOpcode(), dl, VT, Arg,
2340 DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &tcVec[0], tcVec.size()));
2355 static SDValue LowerCTPOP(SDValue Op, SelectionDAG &DAG) {
2357 EVT vecVT = EVT::getVectorVT(*DAG.getContext(),
2365 SDValue Elt0 = DAG.getConstant(0, MVT::i32);
2367 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2368 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2370 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i8, CNTB, Elt0);
2374 MachineFunction &MF = DAG.getMachineFunction();
2380 SDValue Elt0 = DAG.getConstant(0, MVT::i16);
2381 SDValue Mask0 = DAG.getConstant(0x0f, MVT::i16);
2382 SDValue Shift1 = DAG.getConstant(8, MVT::i32);
2384 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2385 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2390 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i16, CNTB, Elt0);
2393 DAG.getCopyToReg(CNTB_result, dl, CNTB_reg, CNTB_result);
2395 SDValue Tmp1 = DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i16);
2397 return DAG.getNode(ISD::AND, dl, MVT::i16,
2398 DAG.getNode(ISD::ADD, dl, MVT::i16,
2399 DAG.getNode(ISD::SRL, dl, MVT::i16,
2406 MachineFunction &MF = DAG.getMachineFunction();
2413 SDValue Elt0 = DAG.getConstant(0, MVT::i32);
2414 SDValue Mask0 = DAG.getConstant(0xff, MVT::i32);
2415 SDValue Shift1 = DAG.getConstant(16, MVT::i32);
2416 SDValue Shift2 = DAG.getConstant(8, MVT::i32);
2418 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2419 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2424 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, CNTB, Elt0);
2427 DAG.getCopyToReg(CNTB_result, dl, CNTB_reg, CNTB_result);
2430 DAG.getNode(ISD::SRL, dl, MVT::i32,
2431 DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i32),
2435 DAG.getNode(ISD::ADD, dl, MVT::i32, Comp1,
2436 DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i32));
2439 DAG.getCopyToReg(CNTB_result, dl, SUM1_reg, Sum1);
2442 DAG.getNode(ISD::SRL, dl, MVT::i32,
2443 DAG.getCopyFromReg(Sum1_rescopy, dl, SUM1_reg, MVT::i32),
2446 DAG.getNode(ISD::ADD, dl, MVT::i32, Comp2,
2447 DAG.getCopyFromReg(Sum1_rescopy, dl, SUM1_reg, MVT::i32));
2449 return DAG.getNode(ISD::AND, dl, MVT::i32, Sum2, Mask0);
2464 static SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
2479 return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
2490 static SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG,
2505 return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
2515 static SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG,
2532 SDValue i64lhs = DAG.getNode(ISD::BITCAST, dl, IntVT, lhs);
2534 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32,
2535 DAG.getNode(ISD::SRL, dl, IntVT,
2536 i64lhs, DAG.getConstant(32, MVT::i32)));
2538 DAG.getNode(ISD::AND, dl, MVT::i32,
2539 lhsHi32, DAG.getConstant(0x7fffffff, MVT::i32));
2541 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, i64lhs);
2548 return DAG.getNode(ISD::XOR, dl, ccResultVT,
2549 DAG.getSetCC(dl, ccResultVT,
2550 lhs, DAG.getConstantFP(0.0, lhsVT),
2552 DAG.getConstant(ccResultAllOnes, ccResultVT));
2555 return DAG.getNode(ISD::AND, dl, ccResultVT,
2556 DAG.getSetCC(dl, ccResultVT,
2558 DAG.getConstant(0x7ff00000, MVT::i32),
2560 DAG.getSetCC(dl, ccResultVT,
2562 DAG.getConstant(0, MVT::i32),
2566 SDValue i64rhs = DAG.getNode(ISD::BITCAST, dl, IntVT, rhs);
2568 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32,
2569 DAG.getNode(ISD::SRL, dl, IntVT,
2570 i64rhs, DAG.getConstant(32, MVT::i32)));
2573 SDValue signMag2TC = DAG.getConstant(0x8000000000000000ULL, IntVT);
2576 SDValue lhsSelectMask = DAG.getNode(ISD::SRA, dl, ccResultVT,
2577 lhsHi32, DAG.getConstant(31, MVT::i32));
2578 SDValue lhsSignMag2TC = DAG.getNode(ISD::SUB, dl, IntVT, signMag2TC, i64lhs);
2580 DAG.getNode(ISD::SELECT, dl, IntVT,
2583 SDValue rhsSelectMask = DAG.getNode(ISD::SRA, dl, ccResultVT,
2584 rhsHi32, DAG.getConstant(31, MVT::i32));
2585 SDValue rhsSignMag2TC = DAG.getNode(ISD::SUB, dl, IntVT, signMag2TC, i64rhs);
2587 DAG.getNode(ISD::SELECT, dl, IntVT,
2616 DAG.getSetCC(dl, ccResultVT, lhsSelect, rhsSelect,
2621 SDValue lhsNaN = DAG.getSetCC(dl, ccResultVT,
2622 lhs, DAG.getConstantFP(0.0, MVT::f64),
2624 SDValue rhsNaN = DAG.getSetCC(dl, ccResultVT,
2625 rhs, DAG.getConstantFP(0.0, MVT::f64),
2627 SDValue ordered = DAG.getNode(ISD::AND, dl, ccResultVT, lhsNaN, rhsNaN);
2629 result = DAG.getNode(ISD::AND, dl, ccResultVT, ordered, result);
2647 static SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG,
2668 SDValue compare = DAG.getNode(ISD::SETCC, dl,
2671 return DAG.getNode(SPUISD::SELB, dl, VT, falseval, trueval, compare);
2675 static SDValue LowerTRUNCATE(SDValue Op, SelectionDAG &DAG)
2680 EVT VecVT = EVT::getVectorVT(*DAG.getContext(),
2693 SDValue shufMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2694 DAG.getConstant(maskHigh, MVT::i32),
2695 DAG.getConstant(maskLow, MVT::i32),
2696 DAG.getConstant(maskHigh, MVT::i32),
2697 DAG.getConstant(maskLow, MVT::i32));
2699 SDValue truncShuffle = DAG.getNode(SPUISD::SHUFB, dl, VecVT,
2702 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, truncShuffle);
2715 * @param DAG The current DAG
2718 static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG)
2731 Op0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, Op0);
2745 SDValue shufMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2746 DAG.getConstant(mask1, MVT::i32),
2747 DAG.getConstant(mask1, MVT::i32),
2748 DAG.getConstant(mask2, MVT::i32),
2749 DAG.getConstant(mask3, MVT::i32));
2754 SDValue sraVal = DAG.getNode(ISD::SRA,
2757 DAG.getNode(SPUISD::PREFSLOT2VEC, dl, mvt, Op0, Op0),
2758 DAG.getConstant(31, MVT::i32));
2761 SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
2763 DAG.getTargetConstant(
2768 SDValue extShuffle = DAG.getNode(SPUISD::SHUFB, dl, mvt,
2770 return DAG.getNode(ISD::BITCAST, dl, MVT::i128, extShuffle);
2775 This is where LLVM's DAG selection process calls to do target-specific
2779 SPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
2798 return LowerLOAD(Op, DAG, SPUTM.getSubtargetImpl());
2800 return LowerSTORE(Op, DAG, SPUTM.getSubtargetImpl());
2802 return LowerConstantPool(Op, DAG, SPUTM.getSubtargetImpl());
2804 return LowerGlobalAddress(Op, DAG, SPUTM.getSubtargetImpl());
2806 return LowerJumpTable(Op, DAG, SPUTM.getSubtargetImpl());
2808 return LowerConstantFP(Op, DAG);
2819 return LowerI8Math(Op, DAG, Opc, *this);
2825 return LowerFP_TO_INT(Op, DAG, *this);
2829 return LowerINT_TO_FP(Op, DAG, *this);
2833 return LowerBUILD_VECTOR(Op, DAG);
2835 return LowerSCALAR_TO_VECTOR(Op, DAG);
2837 return LowerVECTOR_SHUFFLE(Op, DAG);
2839 return LowerEXTRACT_VECTOR_ELT(Op, DAG);
2841 return LowerINSERT_VECTOR_ELT(Op, DAG);
2847 return LowerByteImmed(Op, DAG);
2852 return LowerI8Math(Op, DAG, Opc, *this);
2855 return LowerCTPOP(Op, DAG);
2858 return LowerSELECT_CC(Op, DAG, *this);
2861 return LowerSETCC(Op, DAG, *this);
2864 return LowerTRUNCATE(Op, DAG);
2867 return LowerSIGN_EXTEND(Op, DAG);
2875 SelectionDAG &DAG) const
2907 SelectionDAG &DAG = DCI.DAG;
2951 SDValue combinedValue = DAG.getConstant(combinedConst, Op0VT);
2963 return DAG.getNode(SPUISD::IndirectAddr, dl, Op0VT,
2980 N->dump(&DAG);
2982 Op0.getNode()->dump(&DAG);
2999 DEBUG(N->dump(&DAG));
3001 DEBUG(Op0.getNode()->dump(&DAG));
3021 return DAG.getNode(SPUISD::IndirectAddr, dl, Op0VT,
3075 DEBUG(N->dump(&DAG));
3077 DEBUG(Result.getNode()->dump(&DAG));
3170 const SelectionDAG &DAG,
3220 SelectionDAG &DAG) const {
3222 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
