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      1 /* -*- mode: C; c-basic-offset: 3; -*- */
      2 
      3 /*---------------------------------------------------------------*/
      4 /*--- begin                                 guest_s390_toIR.c ---*/
      5 /*---------------------------------------------------------------*/
      6 
      7 /*
      8    This file is part of Valgrind, a dynamic binary instrumentation
      9    framework.
     10 
     11    Copyright IBM Corp. 2010-2011
     12 
     13    This program is free software; you can redistribute it and/or
     14    modify it under the terms of the GNU General Public License as
     15    published by the Free Software Foundation; either version 2 of the
     16    License, or (at your option) any later version.
     17 
     18    This program is distributed in the hope that it will be useful, but
     19    WITHOUT ANY WARRANTY; without even the implied warranty of
     20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     21    General Public License for more details.
     22 
     23    You should have received a copy of the GNU General Public License
     24    along with this program; if not, write to the Free Software
     25    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
     26    02110-1301, USA.
     27 
     28    The GNU General Public License is contained in the file COPYING.
     29 */
     30 
     31 /* Contributed by Florian Krohm and Christian Borntraeger */
     32 
     33 /* Translates s390 code to IR. */
     34 
     35 #include "libvex_basictypes.h"
     36 #include "libvex_ir.h"
     37 #include "libvex_guest_s390x.h"      /* VexGuestS390XState */
     38 #include "libvex.h"                  /* needed for bb_to_IR.h */
     39 #include "libvex_guest_offsets.h"    /* OFFSET_s390x_SYSNO */
     40 #include "libvex_s390x_common.h"
     41 #include "main_util.h"               /* vassert */
     42 #include "main_globals.h"            /* vex_traceflags */
     43 #include "guest_generic_bb_to_IR.h"  /* DisResult */
     44 #include "guest_s390_defs.h"         /* prototypes for this file's functions */
     45 #include "host_s390_disasm.h"
     46 #include "host_s390_defs.h"          /* S390_ROUND_xyzzy */
     47 
     48 
     49 /*------------------------------------------------------------*/
     50 /*--- Forward declarations                                 ---*/
     51 /*------------------------------------------------------------*/
     52 static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
     53 
     54 
     55 /*------------------------------------------------------------*/
     56 /*--- Globals                                              ---*/
     57 /*------------------------------------------------------------*/
     58 
     59 /* The IRSB* into which we're generating code. */
     60 static IRSB *irsb;
     61 
     62 /* The guest address for the instruction currently being
     63    translated. */
     64 static Addr64 guest_IA_curr_instr;
     65 
     66 /* The guest address for the instruction following the current instruction. */
     67 static Addr64 guest_IA_next_instr;
     68 
     69 /* Result of disassembly step. */
     70 static DisResult *dis_res;
     71 
     72 /* Resteer function and callback data */
     73 static Bool (*resteer_fn)(void *, Addr64);
     74 static void *resteer_data;
     75 
     76 /* The last seen execute target instruction */
     77 ULong last_execute_target;
     78 
     79 /* The possible outcomes of a decoding operation */
     80 typedef enum {
     81    S390_DECODE_OK,
     82    S390_DECODE_UNKNOWN_INSN,
     83    S390_DECODE_UNIMPLEMENTED_INSN,
     84    S390_DECODE_UNKNOWN_SPECIAL_INSN,
     85    S390_DECODE_ERROR
     86 } s390_decode_t;
     87 
     88 /*------------------------------------------------------------*/
     89 /*--- Helpers for constructing IR.                         ---*/
     90 /*------------------------------------------------------------*/
     91 
     92 /* Sign extend a value with the given number of bits. This is a
     93    macro because it allows us to overload the type of the value.
     94    Note that VALUE must have a signed type! */
     95 #undef sign_extend
     96 #define sign_extend(value,num_bits) \
     97 (((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
     98  (sizeof(__typeof__(value)) * 8 - (num_bits)))
     99 
    100 
    101 /* Add a statement to the current irsb. */
    102 static __inline__ void
    103 stmt(IRStmt *st)
    104 {
    105    addStmtToIRSB(irsb, st);
    106 }
    107 
    108 /* Allocate a new temporary of the given type. */
    109 static __inline__ IRTemp
    110 newTemp(IRType type)
    111 {
    112    vassert(isPlausibleIRType(type));
    113 
    114    return newIRTemp(irsb->tyenv, type);
    115 }
    116 
    117 /* Create an expression node for a temporary */
    118 static __inline__ IRExpr *
    119 mkexpr(IRTemp tmp)
    120 {
    121    return IRExpr_RdTmp(tmp);
    122 }
    123 
    124 /* Add a statement that assigns to a temporary */
    125 static __inline__ void
    126 assign(IRTemp dst, IRExpr *expr)
    127 {
    128    stmt(IRStmt_WrTmp(dst, expr));
    129 }
    130 
    131 /* Create a temporary of the given type and assign the expression to it */
    132 static __inline__ IRTemp
    133 mktemp(IRType type, IRExpr *expr)
    134 {
    135    IRTemp temp = newTemp(type);
    136 
    137    assign(temp, expr);
    138 
    139    return temp;
    140 }
    141 
    142 /* Create a unary expression */
    143 static __inline__ IRExpr *
    144 unop(IROp kind, IRExpr *op)
    145 {
    146    return IRExpr_Unop(kind, op);
    147 }
    148 
    149 /* Create a binary expression */
    150 static __inline__ IRExpr *
    151 binop(IROp kind, IRExpr *op1, IRExpr *op2)
    152 {
    153    return IRExpr_Binop(kind, op1, op2);
    154 }
    155 
    156 /* Create a ternary expression */
    157 static __inline__ IRExpr *
    158 triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
    159 {
    160    return IRExpr_Triop(kind, op1, op2, op3);
    161 }
    162 
    163 /* Create a quaternary expression */
    164 static __inline__  IRExpr *
    165 qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
    166 {
    167    return IRExpr_Qop(kind, op1, op2, op3, op4);
    168 }
    169 
    170 /* Create an expression node for an 8-bit integer constant */
    171 static __inline__ IRExpr *
    172 mkU8(UInt value)
    173 {
    174    vassert(value < 256);
    175 
    176    return IRExpr_Const(IRConst_U8((UChar)value));
    177 }
    178 
    179 /* Create an expression node for a 16-bit integer constant */
    180 static __inline__ IRExpr *
    181 mkU16(UInt value)
    182 {
    183    vassert(value < 65536);
    184 
    185    return IRExpr_Const(IRConst_U16((UShort)value));
    186 }
    187 
    188 /* Create an expression node for a 32-bit integer constant */
    189 static __inline__ IRExpr *
    190 mkU32(UInt value)
    191 {
    192    return IRExpr_Const(IRConst_U32(value));
    193 }
    194 
    195 /* Create an expression node for a 64-bit integer constant */
    196 static __inline__ IRExpr *
    197 mkU64(ULong value)
    198 {
    199    return IRExpr_Const(IRConst_U64(value));
    200 }
    201 
    202 /* Create an expression node for a 32-bit floating point constant
    203    whose value is given by a bit pattern. */
    204 static __inline__ IRExpr *
    205 mkF32i(UInt value)
    206 {
    207    return IRExpr_Const(IRConst_F32i(value));
    208 }
    209 
    210 /* Create an expression node for a 32-bit floating point constant
    211    whose value is given by a bit pattern. */
    212 static __inline__ IRExpr *
    213 mkF64i(ULong value)
    214 {
    215    return IRExpr_Const(IRConst_F64i(value));
    216 }
    217 
    218 /* Little helper function for my sanity. ITE = if-then-else */
    219 static IRExpr *
    220 mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
    221 {
    222    vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
    223 
    224    return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
    225 }
    226 
    227 /* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
    228 static void __inline__
    229 store(IRExpr *addr, IRExpr *data)
    230 {
    231    stmt(IRStmt_Store(Iend_BE, addr, data));
    232 }
    233 
    234 /* Create an expression that loads a TYPE sized value from ADDR.
    235    This is a big-endian machine. */
    236 static __inline__ IRExpr *
    237 load(IRType type, IRExpr *addr)
    238 {
    239    return IRExpr_Load(Iend_BE, type, addr);
    240 }
    241 
    242 /* Function call */
    243 static void
    244 call_function(IRExpr *callee_address)
    245 {
    246    irsb->next = callee_address;
    247    irsb->jumpkind = Ijk_Call;
    248 
    249    dis_res->whatNext = Dis_StopHere;
    250 }
    251 
    252 /* Function call with known target. */
    253 static void
    254 call_function_and_chase(Addr64 callee_address)
    255 {
    256    if (resteer_fn(resteer_data, callee_address)) {
    257       dis_res->whatNext   = Dis_ResteerU;
    258       dis_res->continueAt = callee_address;
    259    } else {
    260       irsb->next = mkU64(callee_address);
    261       irsb->jumpkind = Ijk_Call;
    262       dis_res->whatNext = Dis_StopHere;
    263    }
    264 }
    265 
    266 /* Function return sequence */
    267 static void
    268 return_from_function(IRExpr *return_address)
    269 {
    270    irsb->next = return_address;
    271    irsb->jumpkind = Ijk_Ret;
    272 
    273    dis_res->whatNext = Dis_StopHere;
    274 }
    275 
    276 /* A conditional branch whose target is not known at instrumentation time.
    277 
    278    if (condition) goto computed_target;
    279 
    280    Needs to be represented as:
    281 
    282    if (! condition) goto next_instruction;
    283    goto computed_target;
    284 
    285    This inversion is being handled at code generation time. So we just
    286    take the condition here as is.
    287 */
    288 static void
    289 if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
    290 {
    291    vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
    292 
    293    stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
    294 
    295    irsb->next = target;
    296    irsb->jumpkind = Ijk_Boring;
    297 
    298    dis_res->whatNext = Dis_StopHere;
    299 }
    300 
    301 /* A conditional branch whose target is known at instrumentation time. */
    302 static void
    303 if_condition_goto(IRExpr *condition, Addr64 target)
    304 {
    305    vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
    306 
    307    stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
    308    dis_res->whatNext = Dis_Continue;
    309 }
    310 
    311 /* An unconditional branch. Target may or may not be known at instrumentation
    312    time. */
    313 static void
    314 always_goto(IRExpr *target)
    315 {
    316    irsb->next = target;
    317    irsb->jumpkind = Ijk_Boring;
    318 
    319    dis_res->whatNext = Dis_StopHere;
    320 }
    321 
    322 /* An unconditional branch to a known target. */
    323 static void
    324 always_goto_and_chase(Addr64 target)
    325 {
    326    if (resteer_fn(resteer_data, target)) {
    327       dis_res->whatNext   = Dis_ResteerU;
    328       dis_res->continueAt = target;
    329    } else {
    330       irsb->next = mkU64(target);
    331       irsb->jumpkind = Ijk_Boring;
    332       dis_res->whatNext = Dis_StopHere;
    333    }
    334 }
    335 
    336 /* A system call */
    337 static void
    338 system_call(IRExpr *sysno)
    339 {
    340    /* Store the system call number in the pseudo register. */
    341    stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
    342 
    343    /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
    344    stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
    345 
    346    /* It's important that all ArchRegs carry their up-to-date value
    347       at this point.  So we declare an end-of-block here, which
    348       forces any TempRegs caching ArchRegs to be flushed. */
    349    irsb->next = mkU64(guest_IA_next_instr);
    350 
    351    irsb->jumpkind = Ijk_Sys_syscall;
    352 
    353    dis_res->whatNext = Dis_StopHere;
    354 }
    355 
    356 /* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
    357    instructions to VEX's IRRoundingMode. */
    358 static IRRoundingMode
    359 encode_rounding_mode(UChar mode)
    360 {
    361    switch (mode) {
    362    case S390_ROUND_NEAREST_EVEN:  return Irrm_NEAREST;
    363    case S390_ROUND_ZERO:          return Irrm_ZERO;
    364    case S390_ROUND_POSINF:        return Irrm_PosINF;
    365    case S390_ROUND_NEGINF:        return Irrm_NegINF;
    366    }
    367    vpanic("encode_rounding_mode");
    368 }
    369 
    370 static __inline__ IRExpr *get_fpr_dw0(UInt);
    371 static __inline__ void    put_fpr_dw0(UInt, IRExpr *);
    372 
    373 /* Read a floating point register pair and combine their contents into a
    374    128-bit value */
    375 static IRExpr *
    376 get_fpr_pair(UInt archreg)
    377 {
    378    IRExpr *high = get_fpr_dw0(archreg);
    379    IRExpr *low  = get_fpr_dw0(archreg + 2);
    380 
    381    return binop(Iop_F64HLtoF128, high, low);
    382 }
    383 
    384 /* Write a 128-bit floating point value into a register pair. */
    385 static void
    386 put_fpr_pair(UInt archreg, IRExpr *expr)
    387 {
    388    IRExpr *high = unop(Iop_F128HItoF64, expr);
    389    IRExpr *low  = unop(Iop_F128LOtoF64, expr);
    390 
    391    put_fpr_dw0(archreg,     high);
    392    put_fpr_dw0(archreg + 2, low);
    393 }
    394 
    395 
    396 /* Flags thunk offsets */
    397 #define S390X_GUEST_OFFSET_CC_OP    S390X_GUEST_OFFSET(guest_CC_OP)
    398 #define S390X_GUEST_OFFSET_CC_DEP1  S390X_GUEST_OFFSET(guest_CC_DEP1)
    399 #define S390X_GUEST_OFFSET_CC_DEP2  S390X_GUEST_OFFSET(guest_CC_DEP2)
    400 #define S390X_GUEST_OFFSET_CC_NDEP  S390X_GUEST_OFFSET(guest_CC_NDEP)
    401 
    402 /*------------------------------------------------------------*/
    403 /*--- Build the flags thunk.                               ---*/
    404 /*------------------------------------------------------------*/
    405 
    406 /* Completely fill the flags thunk. We're always filling all fields.
    407    Apparently, that is better for redundant PUT elimination. */
    408 static void
    409 s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
    410 {
    411    UInt op_off, dep1_off, dep2_off, ndep_off;
    412 
    413    op_off   = S390X_GUEST_OFFSET_CC_OP;
    414    dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
    415    dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
    416    ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
    417 
    418    stmt(IRStmt_Put(op_off,   op));
    419    stmt(IRStmt_Put(dep1_off, dep1));
    420    stmt(IRStmt_Put(dep2_off, dep2));
    421    stmt(IRStmt_Put(ndep_off, ndep));
    422 }
    423 
    424 
    425 /* Create an expression for V and widen the result to 64 bit. */
    426 static IRExpr *
    427 s390_cc_widen(IRTemp v, Bool sign_extend)
    428 {
    429    IRExpr *expr;
    430 
    431    expr = mkexpr(v);
    432 
    433    switch (typeOfIRTemp(irsb->tyenv, v)) {
    434    case Ity_I64:
    435       break;
    436    case Ity_I32:
    437       expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
    438       break;
    439    case Ity_I16:
    440       expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
    441       break;
    442    case Ity_I8:
    443       expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
    444       break;
    445    default:
    446       vpanic("s390_cc_widen");
    447    }
    448 
    449    return expr;
    450 }
    451 
    452 static void
    453 s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
    454 {
    455    IRExpr *op, *dep1, *dep2, *ndep;
    456 
    457    op   = mkU64(opc);
    458    dep1 = s390_cc_widen(d1, sign_extend);
    459    dep2 = mkU64(0);
    460    ndep = mkU64(0);
    461 
    462    s390_cc_thunk_fill(op, dep1, dep2, ndep);
    463 }
    464 
    465 
    466 static void
    467 s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
    468 {
    469    IRExpr *op, *dep1, *dep2, *ndep;
    470 
    471    op   = mkU64(opc);
    472    dep1 = s390_cc_widen(d1, sign_extend);
    473    dep2 = s390_cc_widen(d2, sign_extend);
    474    ndep = mkU64(0);
    475 
    476    s390_cc_thunk_fill(op, dep1, dep2, ndep);
    477 }
    478 
    479 
    480 /* memcheck believes that the NDEP field in the flags thunk is always
    481    defined. But for some flag computations (e.g. add with carry) that is
    482    just not true. We therefore need to convey to memcheck that the value
    483    of the ndep field does matter and therefore we make the DEP2 field
    484    depend on it:
    485 
    486    DEP2 = original_DEP2 ^ NDEP
    487 
    488    In s390_calculate_cc we exploit that  (a^b)^b == a
    489    I.e. we xor the DEP2 value with the NDEP value to recover the
    490    original_DEP2 value. */
    491 static void
    492 s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
    493 {
    494    IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
    495 
    496    op   = mkU64(opc);
    497    dep1 = s390_cc_widen(d1, sign_extend);
    498    dep2 = s390_cc_widen(d2, sign_extend);
    499    ndep = s390_cc_widen(nd, sign_extend);
    500 
    501    dep2x = binop(Iop_Xor64, dep2, ndep);
    502 
    503    s390_cc_thunk_fill(op, dep1, dep2x, ndep);
    504 }
    505 
    506 
    507 /* Write one floating point value into the flags thunk */
    508 static void
    509 s390_cc_thunk_put1f(UInt opc, IRTemp d1)
    510 {
    511    IRExpr *op, *dep1, *dep2, *ndep;
    512 
    513    op   = mkU64(opc);
    514    dep1 = mkexpr(d1);
    515    dep2 = mkU64(0);
    516    ndep = mkU64(0);
    517 
    518    s390_cc_thunk_fill(op, dep1, dep2, ndep);
    519 }
    520 
    521 
    522 /* Write a floating point value and an integer into the flags thunk. The
    523    integer value is zero-extended first. */
    524 static void
    525 s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
    526 {
    527    IRExpr *op, *dep1, *dep2, *ndep;
    528 
    529    op   = mkU64(opc);
    530    dep1 = mkexpr(d1);
    531    dep2 = s390_cc_widen(d2, False);
    532    ndep = mkU64(0);
    533 
    534    s390_cc_thunk_fill(op, dep1, dep2, ndep);
    535 }
    536 
    537 
    538 /* Write a 128-bit floating point value into the flags thunk. This is
    539    done by splitting the value into two 64-bits values. */
    540 static void
    541 s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
    542 {
    543    IRExpr *op, *hi, *lo, *ndep;
    544 
    545    op   = mkU64(opc);
    546    hi   = unop(Iop_F128HItoF64, mkexpr(d1));
    547    lo   = unop(Iop_F128LOtoF64, mkexpr(d1));
    548    ndep = mkU64(0);
    549 
    550    s390_cc_thunk_fill(op, hi, lo, ndep);
    551 }
    552 
    553 
    554 /* Write a 128-bit floating point value and an integer into the flags thunk.
    555    The integer value is zero-extended first. */
    556 static void
    557 s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
    558 {
    559    IRExpr *op, *hi, *lo, *lox, *ndep;
    560 
    561    op   = mkU64(opc);
    562    hi   = unop(Iop_F128HItoF64, mkexpr(d1));
    563    lo   = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
    564    ndep = s390_cc_widen(nd, False);
    565 
    566    lox = binop(Iop_Xor64, lo, ndep);  /* convey dependency */
    567 
    568    s390_cc_thunk_fill(op, hi, lox, ndep);
    569 }
    570 
    571 
    572 static void
    573 s390_cc_set(UInt val)
    574 {
    575    s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
    576                       mkU64(val), mkU64(0), mkU64(0));
    577 }
    578 
    579 /* Build IR to calculate the condition code from flags thunk.
    580    Returns an expression of type Ity_I32 */
    581 static IRExpr *
    582 s390_call_calculate_cc(void)
    583 {
    584    IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
    585 
    586    op   = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP,   Ity_I64);
    587    dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
    588    dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
    589    ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
    590 
    591    args = mkIRExprVec_4(op, dep1, dep2, ndep);
    592    call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
    593                         "s390_calculate_cc", &s390_calculate_cc, args);
    594 
    595    /* Exclude OP and NDEP from definedness checking.  We're only
    596       interested in DEP1 and DEP2. */
    597    call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
    598 
    599    return call;
    600 }
    601 
    602 /* Build IR to calculate the internal condition code for a "compare and branch"
    603    insn. Returns an expression of type Ity_I32 */
    604 static IRExpr *
    605 s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
    606 {
    607    IRExpr **args, *call, *op, *dep1, *dep2;
    608 
    609    op   = mkU64(opc);
    610    dep1 = s390_cc_widen(op1, sign_extend);
    611    dep2 = s390_cc_widen(op2, sign_extend);
    612 
    613    args = mkIRExprVec_3(op, dep1, dep2);
    614    call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
    615                         "s390_calculate_icc", &s390_calculate_icc, args);
    616 
    617    /* Exclude OP from definedness checking.  We're only
    618       interested in DEP1 and DEP2. */
    619    call->Iex.CCall.cee->mcx_mask = (1<<0);
    620 
    621    return call;
    622 }
    623 
    624 /* Build IR to calculate the condition code from flags thunk.
    625    Returns an expression of type Ity_I32 */
    626 static IRExpr *
    627 s390_call_calculate_cond(UInt m)
    628 {
    629    IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
    630 
    631    mask = mkU64(m);
    632    op   = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP,   Ity_I64);
    633    dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
    634    dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
    635    ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
    636 
    637    args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
    638    call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
    639                         "s390_calculate_cond", &s390_calculate_cond, args);
    640 
    641    /* Exclude the requested condition, OP and NDEP from definedness
    642       checking.  We're only interested in DEP1 and DEP2. */
    643    call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
    644 
    645    return call;
    646 }
    647 
    648 #define s390_cc_thunk_putZ(op,dep1)  s390_cc_thunk_put1(op,dep1,False)
    649 #define s390_cc_thunk_putS(op,dep1)  s390_cc_thunk_put1(op,dep1,True)
    650 #define s390_cc_thunk_putF(op,dep1)  s390_cc_thunk_put1f(op,dep1)
    651 #define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
    652 #define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
    653 #define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
    654 #define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
    655         s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
    656 #define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
    657         s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
    658 #define s390_call_calculate_iccZZ(op,dep1,dep2) \
    659         s390_call_calculate_icc(op,dep1,dep2,False)
    660 #define s390_call_calculate_iccSS(op,dep1,dep2) \
    661         s390_call_calculate_icc(op,dep1,dep2,True)
    662 
    663 
    664 #define OFFB_TISTART   S390X_GUEST_OFFSET(guest_TISTART)
    665 #define OFFB_TILEN     S390X_GUEST_OFFSET(guest_TILEN)
    666 
    667 
    668 /*------------------------------------------------------------*/
    669 /*--- Guest register access                                ---*/
    670 /*------------------------------------------------------------*/
    671 
    672 
    673 /*------------------------------------------------------------*/
    674 /*--- ar registers                                         ---*/
    675 /*------------------------------------------------------------*/
    676 
    677 /* Return the guest state offset of a ar register. */
    678 static UInt
    679 ar_offset(UInt archreg)
    680 {
    681    static const UInt offset[16] = {
    682       S390X_GUEST_OFFSET(guest_a0),
    683       S390X_GUEST_OFFSET(guest_a1),
    684       S390X_GUEST_OFFSET(guest_a2),
    685       S390X_GUEST_OFFSET(guest_a3),
    686       S390X_GUEST_OFFSET(guest_a4),
    687       S390X_GUEST_OFFSET(guest_a5),
    688       S390X_GUEST_OFFSET(guest_a6),
    689       S390X_GUEST_OFFSET(guest_a7),
    690       S390X_GUEST_OFFSET(guest_a8),
    691       S390X_GUEST_OFFSET(guest_a9),
    692       S390X_GUEST_OFFSET(guest_a10),
    693       S390X_GUEST_OFFSET(guest_a11),
    694       S390X_GUEST_OFFSET(guest_a12),
    695       S390X_GUEST_OFFSET(guest_a13),
    696       S390X_GUEST_OFFSET(guest_a14),
    697       S390X_GUEST_OFFSET(guest_a15),
    698    };
    699 
    700    vassert(archreg < 16);
    701 
    702    return offset[archreg];
    703 }
    704 
    705 
    706 /* Return the guest state offset of word #0 of a ar register. */
    707 static __inline__ UInt
    708 ar_w0_offset(UInt archreg)
    709 {
    710    return ar_offset(archreg) + 0;
    711 }
    712 
    713 /* Write word #0 of a ar to the guest state. */
    714 static __inline__ void
    715 put_ar_w0(UInt archreg, IRExpr *expr)
    716 {
    717    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
    718 
    719    stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
    720 }
    721 
    722 /* Read word #0 of a ar register. */
    723 static __inline__ IRExpr *
    724 get_ar_w0(UInt archreg)
    725 {
    726    return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
    727 }
    728 
    729 
    730 /*------------------------------------------------------------*/
    731 /*--- fpr registers                                        ---*/
    732 /*------------------------------------------------------------*/
    733 
    734 /* Return the guest state offset of a fpr register. */
    735 static UInt
    736 fpr_offset(UInt archreg)
    737 {
    738    static const UInt offset[16] = {
    739       S390X_GUEST_OFFSET(guest_f0),
    740       S390X_GUEST_OFFSET(guest_f1),
    741       S390X_GUEST_OFFSET(guest_f2),
    742       S390X_GUEST_OFFSET(guest_f3),
    743       S390X_GUEST_OFFSET(guest_f4),
    744       S390X_GUEST_OFFSET(guest_f5),
    745       S390X_GUEST_OFFSET(guest_f6),
    746       S390X_GUEST_OFFSET(guest_f7),
    747       S390X_GUEST_OFFSET(guest_f8),
    748       S390X_GUEST_OFFSET(guest_f9),
    749       S390X_GUEST_OFFSET(guest_f10),
    750       S390X_GUEST_OFFSET(guest_f11),
    751       S390X_GUEST_OFFSET(guest_f12),
    752       S390X_GUEST_OFFSET(guest_f13),
    753       S390X_GUEST_OFFSET(guest_f14),
    754       S390X_GUEST_OFFSET(guest_f15),
    755    };
    756 
    757    vassert(archreg < 16);
    758 
    759    return offset[archreg];
    760 }
    761 
    762 
    763 /* Return the guest state offset of word #0 of a fpr register. */
    764 static __inline__ UInt
    765 fpr_w0_offset(UInt archreg)
    766 {
    767    return fpr_offset(archreg) + 0;
    768 }
    769 
    770 /* Write word #0 of a fpr to the guest state. */
    771 static __inline__ void
    772 put_fpr_w0(UInt archreg, IRExpr *expr)
    773 {
    774    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
    775 
    776    stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
    777 }
    778 
    779 /* Read word #0 of a fpr register. */
    780 static __inline__ IRExpr *
    781 get_fpr_w0(UInt archreg)
    782 {
    783    return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
    784 }
    785 
    786 /* Return the guest state offset of double word #0 of a fpr register. */
    787 static __inline__ UInt
    788 fpr_dw0_offset(UInt archreg)
    789 {
    790    return fpr_offset(archreg) + 0;
    791 }
    792 
    793 /* Write double word #0 of a fpr to the guest state. */
    794 static __inline__ void
    795 put_fpr_dw0(UInt archreg, IRExpr *expr)
    796 {
    797    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
    798 
    799    stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
    800 }
    801 
    802 /* Read double word #0 of a fpr register. */
    803 static __inline__ IRExpr *
    804 get_fpr_dw0(UInt archreg)
    805 {
    806    return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
    807 }
    808 
    809 
    810 /*------------------------------------------------------------*/
    811 /*--- gpr registers                                        ---*/
    812 /*------------------------------------------------------------*/
    813 
    814 /* Return the guest state offset of a gpr register. */
    815 static UInt
    816 gpr_offset(UInt archreg)
    817 {
    818    static const UInt offset[16] = {
    819       S390X_GUEST_OFFSET(guest_r0),
    820       S390X_GUEST_OFFSET(guest_r1),
    821       S390X_GUEST_OFFSET(guest_r2),
    822       S390X_GUEST_OFFSET(guest_r3),
    823       S390X_GUEST_OFFSET(guest_r4),
    824       S390X_GUEST_OFFSET(guest_r5),
    825       S390X_GUEST_OFFSET(guest_r6),
    826       S390X_GUEST_OFFSET(guest_r7),
    827       S390X_GUEST_OFFSET(guest_r8),
    828       S390X_GUEST_OFFSET(guest_r9),
    829       S390X_GUEST_OFFSET(guest_r10),
    830       S390X_GUEST_OFFSET(guest_r11),
    831       S390X_GUEST_OFFSET(guest_r12),
    832       S390X_GUEST_OFFSET(guest_r13),
    833       S390X_GUEST_OFFSET(guest_r14),
    834       S390X_GUEST_OFFSET(guest_r15),
    835    };
    836 
    837    vassert(archreg < 16);
    838 
    839    return offset[archreg];
    840 }
    841 
    842 
    843 /* Return the guest state offset of word #0 of a gpr register. */
    844 static __inline__ UInt
    845 gpr_w0_offset(UInt archreg)
    846 {
    847    return gpr_offset(archreg) + 0;
    848 }
    849 
    850 /* Write word #0 of a gpr to the guest state. */
    851 static __inline__ void
    852 put_gpr_w0(UInt archreg, IRExpr *expr)
    853 {
    854    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
    855 
    856    stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
    857 }
    858 
    859 /* Read word #0 of a gpr register. */
    860 static __inline__ IRExpr *
    861 get_gpr_w0(UInt archreg)
    862 {
    863    return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
    864 }
    865 
    866 /* Return the guest state offset of double word #0 of a gpr register. */
    867 static __inline__ UInt
    868 gpr_dw0_offset(UInt archreg)
    869 {
    870    return gpr_offset(archreg) + 0;
    871 }
    872 
    873 /* Write double word #0 of a gpr to the guest state. */
    874 static __inline__ void
    875 put_gpr_dw0(UInt archreg, IRExpr *expr)
    876 {
    877    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
    878 
    879    stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
    880 }
    881 
    882 /* Read double word #0 of a gpr register. */
    883 static __inline__ IRExpr *
    884 get_gpr_dw0(UInt archreg)
    885 {
    886    return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
    887 }
    888 
    889 /* Return the guest state offset of half word #1 of a gpr register. */
    890 static __inline__ UInt
    891 gpr_hw1_offset(UInt archreg)
    892 {
    893    return gpr_offset(archreg) + 2;
    894 }
    895 
    896 /* Write half word #1 of a gpr to the guest state. */
    897 static __inline__ void
    898 put_gpr_hw1(UInt archreg, IRExpr *expr)
    899 {
    900    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
    901 
    902    stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
    903 }
    904 
    905 /* Read half word #1 of a gpr register. */
    906 static __inline__ IRExpr *
    907 get_gpr_hw1(UInt archreg)
    908 {
    909    return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
    910 }
    911 
    912 /* Return the guest state offset of byte #6 of a gpr register. */
    913 static __inline__ UInt
    914 gpr_b6_offset(UInt archreg)
    915 {
    916    return gpr_offset(archreg) + 6;
    917 }
    918 
    919 /* Write byte #6 of a gpr to the guest state. */
    920 static __inline__ void
    921 put_gpr_b6(UInt archreg, IRExpr *expr)
    922 {
    923    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
    924 
    925    stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
    926 }
    927 
    928 /* Read byte #6 of a gpr register. */
    929 static __inline__ IRExpr *
    930 get_gpr_b6(UInt archreg)
    931 {
    932    return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
    933 }
    934 
    935 /* Return the guest state offset of byte #3 of a gpr register. */
    936 static __inline__ UInt
    937 gpr_b3_offset(UInt archreg)
    938 {
    939    return gpr_offset(archreg) + 3;
    940 }
    941 
    942 /* Write byte #3 of a gpr to the guest state. */
    943 static __inline__ void
    944 put_gpr_b3(UInt archreg, IRExpr *expr)
    945 {
    946    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
    947 
    948    stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
    949 }
    950 
    951 /* Read byte #3 of a gpr register. */
    952 static __inline__ IRExpr *
    953 get_gpr_b3(UInt archreg)
    954 {
    955    return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
    956 }
    957 
    958 /* Return the guest state offset of byte #0 of a gpr register. */
    959 static __inline__ UInt
    960 gpr_b0_offset(UInt archreg)
    961 {
    962    return gpr_offset(archreg) + 0;
    963 }
    964 
    965 /* Write byte #0 of a gpr to the guest state. */
    966 static __inline__ void
    967 put_gpr_b0(UInt archreg, IRExpr *expr)
    968 {
    969    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
    970 
    971    stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
    972 }
    973 
    974 /* Read byte #0 of a gpr register. */
    975 static __inline__ IRExpr *
    976 get_gpr_b0(UInt archreg)
    977 {
    978    return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
    979 }
    980 
    981 /* Return the guest state offset of word #1 of a gpr register. */
    982 static __inline__ UInt
    983 gpr_w1_offset(UInt archreg)
    984 {
    985    return gpr_offset(archreg) + 4;
    986 }
    987 
    988 /* Write word #1 of a gpr to the guest state. */
    989 static __inline__ void
    990 put_gpr_w1(UInt archreg, IRExpr *expr)
    991 {
    992    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
    993 
    994    stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
    995 }
    996 
    997 /* Read word #1 of a gpr register. */
    998 static __inline__ IRExpr *
    999 get_gpr_w1(UInt archreg)
   1000 {
   1001    return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
   1002 }
   1003 
   1004 /* Return the guest state offset of half word #3 of a gpr register. */
   1005 static __inline__ UInt
   1006 gpr_hw3_offset(UInt archreg)
   1007 {
   1008    return gpr_offset(archreg) + 6;
   1009 }
   1010 
   1011 /* Write half word #3 of a gpr to the guest state. */
   1012 static __inline__ void
   1013 put_gpr_hw3(UInt archreg, IRExpr *expr)
   1014 {
   1015    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
   1016 
   1017    stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
   1018 }
   1019 
   1020 /* Read half word #3 of a gpr register. */
   1021 static __inline__ IRExpr *
   1022 get_gpr_hw3(UInt archreg)
   1023 {
   1024    return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
   1025 }
   1026 
   1027 /* Return the guest state offset of byte #7 of a gpr register. */
   1028 static __inline__ UInt
   1029 gpr_b7_offset(UInt archreg)
   1030 {
   1031    return gpr_offset(archreg) + 7;
   1032 }
   1033 
   1034 /* Write byte #7 of a gpr to the guest state. */
   1035 static __inline__ void
   1036 put_gpr_b7(UInt archreg, IRExpr *expr)
   1037 {
   1038    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
   1039 
   1040    stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
   1041 }
   1042 
   1043 /* Read byte #7 of a gpr register. */
   1044 static __inline__ IRExpr *
   1045 get_gpr_b7(UInt archreg)
   1046 {
   1047    return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
   1048 }
   1049 
   1050 /* Return the guest state offset of half word #0 of a gpr register. */
   1051 static __inline__ UInt
   1052 gpr_hw0_offset(UInt archreg)
   1053 {
   1054    return gpr_offset(archreg) + 0;
   1055 }
   1056 
   1057 /* Write half word #0 of a gpr to the guest state. */
   1058 static __inline__ void
   1059 put_gpr_hw0(UInt archreg, IRExpr *expr)
   1060 {
   1061    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
   1062 
   1063    stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
   1064 }
   1065 
   1066 /* Read half word #0 of a gpr register. */
   1067 static __inline__ IRExpr *
   1068 get_gpr_hw0(UInt archreg)
   1069 {
   1070    return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
   1071 }
   1072 
   1073 /* Return the guest state offset of byte #4 of a gpr register. */
   1074 static __inline__ UInt
   1075 gpr_b4_offset(UInt archreg)
   1076 {
   1077    return gpr_offset(archreg) + 4;
   1078 }
   1079 
   1080 /* Write byte #4 of a gpr to the guest state. */
   1081 static __inline__ void
   1082 put_gpr_b4(UInt archreg, IRExpr *expr)
   1083 {
   1084    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
   1085 
   1086    stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
   1087 }
   1088 
   1089 /* Read byte #4 of a gpr register. */
   1090 static __inline__ IRExpr *
   1091 get_gpr_b4(UInt archreg)
   1092 {
   1093    return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
   1094 }
   1095 
   1096 /* Return the guest state offset of byte #1 of a gpr register. */
   1097 static __inline__ UInt
   1098 gpr_b1_offset(UInt archreg)
   1099 {
   1100    return gpr_offset(archreg) + 1;
   1101 }
   1102 
   1103 /* Write byte #1 of a gpr to the guest state. */
   1104 static __inline__ void
   1105 put_gpr_b1(UInt archreg, IRExpr *expr)
   1106 {
   1107    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
   1108 
   1109    stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
   1110 }
   1111 
   1112 /* Read byte #1 of a gpr register. */
   1113 static __inline__ IRExpr *
   1114 get_gpr_b1(UInt archreg)
   1115 {
   1116    return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
   1117 }
   1118 
   1119 /* Return the guest state offset of half word #2 of a gpr register. */
   1120 static __inline__ UInt
   1121 gpr_hw2_offset(UInt archreg)
   1122 {
   1123    return gpr_offset(archreg) + 4;
   1124 }
   1125 
   1126 /* Write half word #2 of a gpr to the guest state. */
   1127 static __inline__ void
   1128 put_gpr_hw2(UInt archreg, IRExpr *expr)
   1129 {
   1130    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
   1131 
   1132    stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
   1133 }
   1134 
   1135 /* Read half word #2 of a gpr register. */
   1136 static __inline__ IRExpr *
   1137 get_gpr_hw2(UInt archreg)
   1138 {
   1139    return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
   1140 }
   1141 
   1142 /* Return the guest state offset of byte #5 of a gpr register. */
   1143 static __inline__ UInt
   1144 gpr_b5_offset(UInt archreg)
   1145 {
   1146    return gpr_offset(archreg) + 5;
   1147 }
   1148 
   1149 /* Write byte #5 of a gpr to the guest state. */
   1150 static __inline__ void
   1151 put_gpr_b5(UInt archreg, IRExpr *expr)
   1152 {
   1153    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
   1154 
   1155    stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
   1156 }
   1157 
   1158 /* Read byte #5 of a gpr register. */
   1159 static __inline__ IRExpr *
   1160 get_gpr_b5(UInt archreg)
   1161 {
   1162    return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
   1163 }
   1164 
   1165 /* Return the guest state offset of byte #2 of a gpr register. */
   1166 static __inline__ UInt
   1167 gpr_b2_offset(UInt archreg)
   1168 {
   1169    return gpr_offset(archreg) + 2;
   1170 }
   1171 
   1172 /* Write byte #2 of a gpr to the guest state. */
   1173 static __inline__ void
   1174 put_gpr_b2(UInt archreg, IRExpr *expr)
   1175 {
   1176    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
   1177 
   1178    stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
   1179 }
   1180 
   1181 /* Read byte #2 of a gpr register. */
   1182 static __inline__ IRExpr *
   1183 get_gpr_b2(UInt archreg)
   1184 {
   1185    return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
   1186 }
   1187 
   1188 /* Return the guest state offset of the counter register. */
   1189 static UInt
   1190 counter_offset(void)
   1191 {
   1192    return S390X_GUEST_OFFSET(guest_counter);
   1193 }
   1194 
   1195 /* Return the guest state offset of double word #0 of the counter register. */
   1196 static __inline__ UInt
   1197 counter_dw0_offset(void)
   1198 {
   1199    return counter_offset() + 0;
   1200 }
   1201 
   1202 /* Write double word #0 of the counter to the guest state. */
   1203 static __inline__ void
   1204 put_counter_dw0(IRExpr *expr)
   1205 {
   1206    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
   1207 
   1208    stmt(IRStmt_Put(counter_dw0_offset(), expr));
   1209 }
   1210 
   1211 /* Read double word #0 of the counter register. */
   1212 static __inline__ IRExpr *
   1213 get_counter_dw0(void)
   1214 {
   1215    return IRExpr_Get(counter_dw0_offset(), Ity_I64);
   1216 }
   1217 
   1218 /* Return the guest state offset of word #0 of the counter register. */
   1219 static __inline__ UInt
   1220 counter_w0_offset(void)
   1221 {
   1222    return counter_offset() + 0;
   1223 }
   1224 
   1225 /* Return the guest state offset of word #1 of the counter register. */
   1226 static __inline__ UInt
   1227 counter_w1_offset(void)
   1228 {
   1229    return counter_offset() + 4;
   1230 }
   1231 
   1232 /* Write word #0 of the counter to the guest state. */
   1233 static __inline__ void
   1234 put_counter_w0(IRExpr *expr)
   1235 {
   1236    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
   1237 
   1238    stmt(IRStmt_Put(counter_w0_offset(), expr));
   1239 }
   1240 
   1241 /* Read word #0 of the counter register. */
   1242 static __inline__ IRExpr *
   1243 get_counter_w0(void)
   1244 {
   1245    return IRExpr_Get(counter_w0_offset(), Ity_I32);
   1246 }
   1247 
   1248 /* Write word #1 of the counter to the guest state. */
   1249 static __inline__ void
   1250 put_counter_w1(IRExpr *expr)
   1251 {
   1252    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
   1253 
   1254    stmt(IRStmt_Put(counter_w1_offset(), expr));
   1255 }
   1256 
   1257 /* Read word #1 of the counter register. */
   1258 static __inline__ IRExpr *
   1259 get_counter_w1(void)
   1260 {
   1261    return IRExpr_Get(counter_w1_offset(), Ity_I32);
   1262 }
   1263 
   1264 /* Return the guest state offset of the fpc register. */
   1265 static UInt
   1266 fpc_offset(void)
   1267 {
   1268    return S390X_GUEST_OFFSET(guest_fpc);
   1269 }
   1270 
   1271 /* Return the guest state offset of word #0 of the fpc register. */
   1272 static __inline__ UInt
   1273 fpc_w0_offset(void)
   1274 {
   1275    return fpc_offset() + 0;
   1276 }
   1277 
   1278 /* Write word #0 of the fpc to the guest state. */
   1279 static __inline__ void
   1280 put_fpc_w0(IRExpr *expr)
   1281 {
   1282    vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
   1283 
   1284    stmt(IRStmt_Put(fpc_w0_offset(), expr));
   1285 }
   1286 
   1287 /* Read word #0 of the fpc register. */
   1288 static __inline__ IRExpr *
   1289 get_fpc_w0(void)
   1290 {
   1291    return IRExpr_Get(fpc_w0_offset(), Ity_I32);
   1292 }
   1293 
   1294 
   1295 /*------------------------------------------------------------*/
   1296 /*--- Build IR for formats                                 ---*/
   1297 /*------------------------------------------------------------*/
   1298 static void
   1299 s390_format_I(HChar *(*irgen)(UChar i),
   1300               UChar i)
   1301 {
   1302    HChar *mnm = irgen(i);
   1303 
   1304    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1305       s390_disasm(ENC2(MNM, UINT), mnm, i);
   1306 }
   1307 
   1308 static void
   1309 s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
   1310                UChar r1, UShort i2)
   1311 {
   1312    irgen(r1, i2);
   1313 }
   1314 
   1315 static void
   1316 s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
   1317                   UChar r1, UShort i2)
   1318 {
   1319    HChar *mnm = irgen(r1, i2);
   1320 
   1321    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1322       s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
   1323 }
   1324 
   1325 static void
   1326 s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
   1327                   UChar r1, UShort i2)
   1328 {
   1329    HChar *mnm = irgen(r1, i2);
   1330 
   1331    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1332       s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
   1333 }
   1334 
   1335 static void
   1336 s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
   1337                   UChar r1, UShort i2)
   1338 {
   1339    HChar *mnm = irgen(r1, i2);
   1340 
   1341    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1342       s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
   1343 }
   1344 
   1345 static void
   1346 s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
   1347                     UChar r1, UChar r3, UShort i2)
   1348 {
   1349    HChar *mnm = irgen(r1, r3, i2);
   1350 
   1351    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1352       s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
   1353 }
   1354 
   1355 static void
   1356 s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
   1357                      UChar r1, UChar r3, UShort i2)
   1358 {
   1359    HChar *mnm = irgen(r1, r3, i2);
   1360 
   1361    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1362       s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
   1363 }
   1364 
   1365 static void
   1366 s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
   1367                       UChar i5),
   1368                       UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
   1369 {
   1370    HChar *mnm = irgen(r1, r2, i3, i4, i5);
   1371 
   1372    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1373       s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
   1374                   i5);
   1375 }
   1376 
   1377 static void
   1378 s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
   1379                      UChar r1, UChar r2, UShort i4, UChar m3)
   1380 {
   1381    HChar *mnm = irgen(r1, r2, i4, m3);
   1382 
   1383    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1384       s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
   1385                   r2, m3, (Int)(Short)i4);
   1386 }
   1387 
   1388 static void
   1389 s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
   1390                      UChar r1, UChar m3, UShort i4, UChar i2)
   1391 {
   1392    HChar *mnm = irgen(r1, m3, i4, i2);
   1393 
   1394    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1395       s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
   1396                   r1, i2, m3, (Int)(Short)i4);
   1397 }
   1398 
   1399 static void
   1400 s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
   1401                      UChar r1, UChar m3, UShort i4, UChar i2)
   1402 {
   1403    HChar *mnm = irgen(r1, m3, i4, i2);
   1404 
   1405    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1406       s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
   1407                   (Int)(Char)i2, m3, (Int)(Short)i4);
   1408 }
   1409 
   1410 static void
   1411 s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
   1412                 UChar r1, UInt i2)
   1413 {
   1414    irgen(r1, i2);
   1415 }
   1416 
   1417 static void
   1418 s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
   1419                    UChar r1, UInt i2)
   1420 {
   1421    HChar *mnm = irgen(r1, i2);
   1422 
   1423    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1424       s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
   1425 }
   1426 
   1427 static void
   1428 s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
   1429                    UChar r1, UInt i2)
   1430 {
   1431    HChar *mnm = irgen(r1, i2);
   1432 
   1433    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1434       s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
   1435 }
   1436 
   1437 static void
   1438 s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
   1439                    UChar r1, UInt i2)
   1440 {
   1441    HChar *mnm = irgen(r1, i2);
   1442 
   1443    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1444       s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
   1445 }
   1446 
   1447 static void
   1448 s390_format_RIL_UP(HChar *(*irgen)(void),
   1449                    UChar r1, UInt i2)
   1450 {
   1451    HChar *mnm = irgen();
   1452 
   1453    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1454       s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
   1455 }
   1456 
   1457 static void
   1458 s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
   1459                       IRTemp op4addr),
   1460                       UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
   1461 {
   1462    HChar *mnm;
   1463    IRTemp op4addr = newTemp(Ity_I64);
   1464 
   1465    assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
   1466           mkU64(0)));
   1467 
   1468    mnm = irgen(r1, m3, i2, op4addr);
   1469 
   1470    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1471       s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
   1472                   (Int)(Char)i2, m3, d4, 0, b4);
   1473 }
   1474 
   1475 static void
   1476 s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
   1477                       IRTemp op4addr),
   1478                       UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
   1479 {
   1480    HChar *mnm;
   1481    IRTemp op4addr = newTemp(Ity_I64);
   1482 
   1483    assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
   1484           mkU64(0)));
   1485 
   1486    mnm = irgen(r1, m3, i2, op4addr);
   1487 
   1488    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1489       s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
   1490                   i2, m3, d4, 0, b4);
   1491 }
   1492 
   1493 static void
   1494 s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
   1495                UChar r1, UChar r2)
   1496 {
   1497    irgen(r1, r2);
   1498 }
   1499 
   1500 static void
   1501 s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
   1502                   UChar r1, UChar r2)
   1503 {
   1504    HChar *mnm = irgen(r1, r2);
   1505 
   1506    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1507       s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
   1508 }
   1509 
   1510 static void
   1511 s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
   1512                   UChar r1, UChar r2)
   1513 {
   1514    HChar *mnm = irgen(r1, r2);
   1515 
   1516    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1517       s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
   1518 }
   1519 
   1520 static void
   1521 s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
   1522                 UChar r1, UChar r2)
   1523 {
   1524    irgen(r1, r2);
   1525 }
   1526 
   1527 static void
   1528 s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
   1529                    UChar r1, UChar r2)
   1530 {
   1531    HChar *mnm = irgen(r1, r2);
   1532 
   1533    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1534       s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
   1535 }
   1536 
   1537 static void
   1538 s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
   1539                    UChar r1, UChar r2)
   1540 {
   1541    HChar *mnm = irgen(r1, r2);
   1542 
   1543    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1544       s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
   1545 }
   1546 
   1547 static void
   1548 s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
   1549                    UChar r1, UChar r2)
   1550 {
   1551    HChar *mnm = irgen(r1, r2);
   1552 
   1553    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1554       s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
   1555 }
   1556 
   1557 static void
   1558 s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
   1559                    UChar r1, UChar r2)
   1560 {
   1561    HChar *mnm = irgen(r1, r2);
   1562 
   1563    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1564       s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
   1565 }
   1566 
   1567 static void
   1568 s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
   1569                    UChar r1)
   1570 {
   1571    HChar *mnm = irgen(r1);
   1572 
   1573    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1574       s390_disasm(ENC2(MNM, GPR), mnm, r1);
   1575 }
   1576 
   1577 static void
   1578 s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
   1579                    UChar r1)
   1580 {
   1581    HChar *mnm = irgen(r1);
   1582 
   1583    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1584       s390_disasm(ENC2(MNM, FPR), mnm, r1);
   1585 }
   1586 
   1587 static void
   1588 s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
   1589                      UChar r1, UChar r3, UChar r2)
   1590 {
   1591    HChar *mnm = irgen(r1, r3, r2);
   1592 
   1593    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1594       s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
   1595 }
   1596 
   1597 static void
   1598 s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
   1599                      UChar m3, UChar r1, UChar r2, Int xmnm_kind)
   1600 {
   1601    irgen(m3, r1, r2);
   1602 
   1603    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1604       s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
   1605 }
   1606 
   1607 static void
   1608 s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
   1609                      UChar r3, UChar r1, UChar r2)
   1610 {
   1611    HChar *mnm = irgen(r3, r1, r2);
   1612 
   1613    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1614       s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
   1615 }
   1616 
   1617 static void
   1618 s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
   1619                       UChar r3, UChar r1, UChar r2)
   1620 {
   1621    HChar *mnm = irgen(r3, r1, r2);
   1622 
   1623    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1624       s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
   1625 }
   1626 
   1627 static void
   1628 s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
   1629                       UChar r3, UChar r1, UChar r2)
   1630 {
   1631    HChar *mnm = irgen(r3, r1, r2);
   1632 
   1633    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1634       s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
   1635 }
   1636 
   1637 static void
   1638 s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
   1639                 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
   1640 {
   1641    HChar *mnm;
   1642    IRTemp op4addr = newTemp(Ity_I64);
   1643 
   1644    assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
   1645           mkU64(0)));
   1646 
   1647    mnm = irgen(r1, r2, m3, op4addr);
   1648 
   1649    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1650       s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
   1651                   r2, m3, d4, 0, b4);
   1652 }
   1653 
   1654 static void
   1655 s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1656                     UChar r1, UChar b2, UShort d2)
   1657 {
   1658    HChar *mnm;
   1659    IRTemp op2addr = newTemp(Ity_I64);
   1660 
   1661    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1662           mkU64(0)));
   1663 
   1664    mnm = irgen(r1, op2addr);
   1665 
   1666    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1667       s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
   1668 }
   1669 
   1670 static void
   1671 s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
   1672                     UChar r1, UChar r3, UChar b2, UShort d2)
   1673 {
   1674    HChar *mnm;
   1675    IRTemp op2addr = newTemp(Ity_I64);
   1676 
   1677    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1678           mkU64(0)));
   1679 
   1680    mnm = irgen(r1, r3, op2addr);
   1681 
   1682    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1683       s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
   1684 }
   1685 
   1686 static void
   1687 s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
   1688                     UChar r1, UChar r3, UChar b2, UShort d2)
   1689 {
   1690    HChar *mnm;
   1691    IRTemp op2addr = newTemp(Ity_I64);
   1692 
   1693    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1694           mkU64(0)));
   1695 
   1696    mnm = irgen(r1, r3, op2addr);
   1697 
   1698    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1699       s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
   1700 }
   1701 
   1702 static void
   1703 s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
   1704                     UChar r1, UChar r3, UChar b2, UShort d2)
   1705 {
   1706    HChar *mnm;
   1707    IRTemp op2addr = newTemp(Ity_I64);
   1708 
   1709    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1710           mkU64(0)));
   1711 
   1712    mnm = irgen(r1, r3, op2addr);
   1713 
   1714    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1715       s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
   1716 }
   1717 
   1718 static void
   1719 s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
   1720                     UChar r1, UChar r3, UShort i2)
   1721 {
   1722    HChar *mnm = irgen(r1, r3, i2);
   1723 
   1724    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1725       s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
   1726 }
   1727 
   1728 static void
   1729 s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
   1730                      UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
   1731 {
   1732    HChar *mnm;
   1733    IRTemp op2addr = newTemp(Ity_I64);
   1734    IRTemp d2 = newTemp(Ity_I64);
   1735 
   1736    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1737    assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1738           mkU64(0)));
   1739 
   1740    mnm = irgen(r1, r3, op2addr);
   1741 
   1742    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1743       s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
   1744 }
   1745 
   1746 static void
   1747 s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
   1748                      UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
   1749 {
   1750    HChar *mnm;
   1751    IRTemp op2addr = newTemp(Ity_I64);
   1752    IRTemp d2 = newTemp(Ity_I64);
   1753 
   1754    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1755    assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1756           mkU64(0)));
   1757 
   1758    mnm = irgen(r1, r3, op2addr);
   1759 
   1760    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1761       s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
   1762 }
   1763 
   1764 static void
   1765 s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
   1766                      UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
   1767 {
   1768    HChar *mnm;
   1769    IRTemp op2addr = newTemp(Ity_I64);
   1770    IRTemp d2 = newTemp(Ity_I64);
   1771 
   1772    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1773    assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1774           mkU64(0)));
   1775 
   1776    mnm = irgen(r1, r3, op2addr);
   1777 
   1778    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1779       s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
   1780 }
   1781 
   1782 static void
   1783 s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1784                      UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
   1785                      Int xmnm_kind)
   1786 {
   1787    IRTemp op2addr = newTemp(Ity_I64);
   1788    IRTemp d2 = newTemp(Ity_I64);
   1789 
   1790    if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
   1791                      guest_IA_next_instr);
   1792    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1793    assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1794           mkU64(0)));
   1795 
   1796    irgen(r1, op2addr);
   1797 
   1798    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1799       s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
   1800 }
   1801 
   1802 static void
   1803 s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
   1804                IRTemp op2addr),
   1805                UChar r1, UChar x2, UChar b2, UShort d2)
   1806 {
   1807    IRTemp op2addr = newTemp(Ity_I64);
   1808 
   1809    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
   1810           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1811           mkU64(0)));
   1812 
   1813    irgen(r1, x2, b2, d2, op2addr);
   1814 }
   1815 
   1816 static void
   1817 s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1818                     UChar r1, UChar x2, UChar b2, UShort d2)
   1819 {
   1820    HChar *mnm;
   1821    IRTemp op2addr = newTemp(Ity_I64);
   1822 
   1823    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
   1824           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1825           mkU64(0)));
   1826 
   1827    mnm = irgen(r1, op2addr);
   1828 
   1829    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1830       s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
   1831 }
   1832 
   1833 static void
   1834 s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1835                     UChar r1, UChar x2, UChar b2, UShort d2)
   1836 {
   1837    HChar *mnm;
   1838    IRTemp op2addr = newTemp(Ity_I64);
   1839 
   1840    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
   1841           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1842           mkU64(0)));
   1843 
   1844    mnm = irgen(r1, op2addr);
   1845 
   1846    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1847       s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
   1848 }
   1849 
   1850 static void
   1851 s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1852                      UChar r1, UChar x2, UChar b2, UShort d2)
   1853 {
   1854    HChar *mnm;
   1855    IRTemp op2addr = newTemp(Ity_I64);
   1856 
   1857    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
   1858           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1859           mkU64(0)));
   1860 
   1861    mnm = irgen(r1, op2addr);
   1862 
   1863    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1864       s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
   1865 }
   1866 
   1867 static void
   1868 s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
   1869                       UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
   1870 {
   1871    HChar *mnm;
   1872    IRTemp op2addr = newTemp(Ity_I64);
   1873 
   1874    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
   1875           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1876           mkU64(0)));
   1877 
   1878    mnm = irgen(r3, op2addr, r1);
   1879 
   1880    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1881       s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
   1882 }
   1883 
   1884 static void
   1885 s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1886                      UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
   1887 {
   1888    HChar *mnm;
   1889    IRTemp op2addr = newTemp(Ity_I64);
   1890    IRTemp d2 = newTemp(Ity_I64);
   1891 
   1892    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1893    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
   1894           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1895           mkU64(0)));
   1896 
   1897    mnm = irgen(r1, op2addr);
   1898 
   1899    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1900       s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
   1901 }
   1902 
   1903 static void
   1904 s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
   1905                      UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
   1906 {
   1907    HChar *mnm;
   1908    IRTemp op2addr = newTemp(Ity_I64);
   1909    IRTemp d2 = newTemp(Ity_I64);
   1910 
   1911    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1912    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
   1913           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1914           mkU64(0)));
   1915 
   1916    mnm = irgen(r1, op2addr);
   1917 
   1918    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1919       s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
   1920 }
   1921 
   1922 static void
   1923 s390_format_RXY_URRD(HChar *(*irgen)(void),
   1924                      UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
   1925 {
   1926    HChar *mnm;
   1927    IRTemp op2addr = newTemp(Ity_I64);
   1928    IRTemp d2 = newTemp(Ity_I64);
   1929 
   1930    assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
   1931    assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
   1932           b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
   1933           mkU64(0)));
   1934 
   1935    mnm = irgen();
   1936 
   1937    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1938       s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
   1939 }
   1940 
   1941 static void
   1942 s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
   1943                  UChar b2, UShort d2)
   1944 {
   1945    HChar *mnm;
   1946    IRTemp op2addr = newTemp(Ity_I64);
   1947 
   1948    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   1949           mkU64(0)));
   1950 
   1951    mnm = irgen(op2addr);
   1952 
   1953    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1954       s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
   1955 }
   1956 
   1957 static void
   1958 s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
   1959                    UChar i2, UChar b1, UShort d1)
   1960 {
   1961    HChar *mnm;
   1962    IRTemp op1addr = newTemp(Ity_I64);
   1963 
   1964    assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
   1965           mkU64(0)));
   1966 
   1967    mnm = irgen(i2, op1addr);
   1968 
   1969    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1970       s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
   1971 }
   1972 
   1973 static void
   1974 s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
   1975                     UChar i2, UChar b1, UShort dl1, UChar dh1)
   1976 {
   1977    HChar *mnm;
   1978    IRTemp op1addr = newTemp(Ity_I64);
   1979    IRTemp d1 = newTemp(Ity_I64);
   1980 
   1981    assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
   1982    assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
   1983           mkU64(0)));
   1984 
   1985    mnm = irgen(i2, op1addr);
   1986 
   1987    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   1988       s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
   1989 }
   1990 
   1991 static void
   1992 s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
   1993                     UChar i2, UChar b1, UShort dl1, UChar dh1)
   1994 {
   1995    HChar *mnm;
   1996    IRTemp op1addr = newTemp(Ity_I64);
   1997    IRTemp d1 = newTemp(Ity_I64);
   1998 
   1999    assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
   2000    assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
   2001           mkU64(0)));
   2002 
   2003    mnm = irgen(i2, op1addr);
   2004 
   2005    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   2006       s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
   2007 }
   2008 
   2009 static void
   2010 s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
   2011                       UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
   2012 {
   2013    HChar *mnm;
   2014    IRTemp op1addr = newTemp(Ity_I64);
   2015    IRTemp op2addr = newTemp(Ity_I64);
   2016 
   2017    assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
   2018           mkU64(0)));
   2019    assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
   2020           mkU64(0)));
   2021 
   2022    mnm = irgen(l, op1addr, op2addr);
   2023 
   2024    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   2025       s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
   2026 }
   2027 
   2028 static void
   2029 s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
   2030                     UChar b1, UShort d1, UShort i2)
   2031 {
   2032    HChar *mnm;
   2033    IRTemp op1addr = newTemp(Ity_I64);
   2034 
   2035    assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
   2036           mkU64(0)));
   2037 
   2038    mnm = irgen(i2, op1addr);
   2039 
   2040    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   2041       s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
   2042 }
   2043 
   2044 static void
   2045 s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
   2046                     UChar b1, UShort d1, UShort i2)
   2047 {
   2048    HChar *mnm;
   2049    IRTemp op1addr = newTemp(Ity_I64);
   2050 
   2051    assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
   2052           mkU64(0)));
   2053 
   2054    mnm = irgen(i2, op1addr);
   2055 
   2056    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   2057       s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
   2058 }
   2059 
   2060 
   2061 
   2062 /*------------------------------------------------------------*/
   2063 /*--- Build IR for opcodes                                 ---*/
   2064 /*------------------------------------------------------------*/
   2065 
   2066 static HChar *
   2067 s390_irgen_00(UChar r1 __attribute__((unused)),
   2068               UChar r2 __attribute__((unused)))
   2069 {
   2070    IRDirty *d;
   2071 
   2072    d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
   2073                           mkIRExprVec_0());
   2074    d->needsBBP = 1;  /* Need to pass pointer to guest state to helper */
   2075 
   2076    d->fxState[0].fx     = Ifx_Modify;  /* read then write */
   2077    d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
   2078    d->fxState[0].size   = sizeof(ULong);
   2079    d->nFxState = 1;
   2080 
   2081    stmt(IRStmt_Dirty(d));
   2082 
   2083    return "00";
   2084 }
   2085 
   2086 static HChar *
   2087 s390_irgen_AR(UChar r1, UChar r2)
   2088 {
   2089    IRTemp op1 = newTemp(Ity_I32);
   2090    IRTemp op2 = newTemp(Ity_I32);
   2091    IRTemp result = newTemp(Ity_I32);
   2092 
   2093    assign(op1, get_gpr_w1(r1));
   2094    assign(op2, get_gpr_w1(r2));
   2095    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2096    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
   2097    put_gpr_w1(r1, mkexpr(result));
   2098 
   2099    return "ar";
   2100 }
   2101 
   2102 static HChar *
   2103 s390_irgen_AGR(UChar r1, UChar r2)
   2104 {
   2105    IRTemp op1 = newTemp(Ity_I64);
   2106    IRTemp op2 = newTemp(Ity_I64);
   2107    IRTemp result = newTemp(Ity_I64);
   2108 
   2109    assign(op1, get_gpr_dw0(r1));
   2110    assign(op2, get_gpr_dw0(r2));
   2111    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2112    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
   2113    put_gpr_dw0(r1, mkexpr(result));
   2114 
   2115    return "agr";
   2116 }
   2117 
   2118 static HChar *
   2119 s390_irgen_AGFR(UChar r1, UChar r2)
   2120 {
   2121    IRTemp op1 = newTemp(Ity_I64);
   2122    IRTemp op2 = newTemp(Ity_I64);
   2123    IRTemp result = newTemp(Ity_I64);
   2124 
   2125    assign(op1, get_gpr_dw0(r1));
   2126    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   2127    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2128    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
   2129    put_gpr_dw0(r1, mkexpr(result));
   2130 
   2131    return "agfr";
   2132 }
   2133 
   2134 static HChar *
   2135 s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
   2136 {
   2137    IRTemp op2 = newTemp(Ity_I32);
   2138    IRTemp op3 = newTemp(Ity_I32);
   2139    IRTemp result = newTemp(Ity_I32);
   2140 
   2141    assign(op2, get_gpr_w1(r2));
   2142    assign(op3, get_gpr_w1(r3));
   2143    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2144    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
   2145    put_gpr_w1(r1, mkexpr(result));
   2146 
   2147    return "ark";
   2148 }
   2149 
   2150 static HChar *
   2151 s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
   2152 {
   2153    IRTemp op2 = newTemp(Ity_I64);
   2154    IRTemp op3 = newTemp(Ity_I64);
   2155    IRTemp result = newTemp(Ity_I64);
   2156 
   2157    assign(op2, get_gpr_dw0(r2));
   2158    assign(op3, get_gpr_dw0(r3));
   2159    assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
   2160    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
   2161    put_gpr_dw0(r1, mkexpr(result));
   2162 
   2163    return "agrk";
   2164 }
   2165 
   2166 static HChar *
   2167 s390_irgen_A(UChar r1, IRTemp op2addr)
   2168 {
   2169    IRTemp op1 = newTemp(Ity_I32);
   2170    IRTemp op2 = newTemp(Ity_I32);
   2171    IRTemp result = newTemp(Ity_I32);
   2172 
   2173    assign(op1, get_gpr_w1(r1));
   2174    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2175    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2176    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
   2177    put_gpr_w1(r1, mkexpr(result));
   2178 
   2179    return "a";
   2180 }
   2181 
   2182 static HChar *
   2183 s390_irgen_AY(UChar r1, IRTemp op2addr)
   2184 {
   2185    IRTemp op1 = newTemp(Ity_I32);
   2186    IRTemp op2 = newTemp(Ity_I32);
   2187    IRTemp result = newTemp(Ity_I32);
   2188 
   2189    assign(op1, get_gpr_w1(r1));
   2190    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2191    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2192    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
   2193    put_gpr_w1(r1, mkexpr(result));
   2194 
   2195    return "ay";
   2196 }
   2197 
   2198 static HChar *
   2199 s390_irgen_AG(UChar r1, IRTemp op2addr)
   2200 {
   2201    IRTemp op1 = newTemp(Ity_I64);
   2202    IRTemp op2 = newTemp(Ity_I64);
   2203    IRTemp result = newTemp(Ity_I64);
   2204 
   2205    assign(op1, get_gpr_dw0(r1));
   2206    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   2207    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2208    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
   2209    put_gpr_dw0(r1, mkexpr(result));
   2210 
   2211    return "ag";
   2212 }
   2213 
   2214 static HChar *
   2215 s390_irgen_AGF(UChar r1, IRTemp op2addr)
   2216 {
   2217    IRTemp op1 = newTemp(Ity_I64);
   2218    IRTemp op2 = newTemp(Ity_I64);
   2219    IRTemp result = newTemp(Ity_I64);
   2220 
   2221    assign(op1, get_gpr_dw0(r1));
   2222    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   2223    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2224    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
   2225    put_gpr_dw0(r1, mkexpr(result));
   2226 
   2227    return "agf";
   2228 }
   2229 
   2230 static HChar *
   2231 s390_irgen_AFI(UChar r1, UInt i2)
   2232 {
   2233    IRTemp op1 = newTemp(Ity_I32);
   2234    Int op2;
   2235    IRTemp result = newTemp(Ity_I32);
   2236 
   2237    assign(op1, get_gpr_w1(r1));
   2238    op2 = (Int)i2;
   2239    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
   2240    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
   2241                        mkU32((UInt)op2)));
   2242    put_gpr_w1(r1, mkexpr(result));
   2243 
   2244    return "afi";
   2245 }
   2246 
   2247 static HChar *
   2248 s390_irgen_AGFI(UChar r1, UInt i2)
   2249 {
   2250    IRTemp op1 = newTemp(Ity_I64);
   2251    Long op2;
   2252    IRTemp result = newTemp(Ity_I64);
   2253 
   2254    assign(op1, get_gpr_dw0(r1));
   2255    op2 = (Long)(Int)i2;
   2256    assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
   2257    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
   2258                        mkU64((ULong)op2)));
   2259    put_gpr_dw0(r1, mkexpr(result));
   2260 
   2261    return "agfi";
   2262 }
   2263 
   2264 static HChar *
   2265 s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
   2266 {
   2267    Int op2;
   2268    IRTemp op3 = newTemp(Ity_I32);
   2269    IRTemp result = newTemp(Ity_I32);
   2270 
   2271    op2 = (Int)(Short)i2;
   2272    assign(op3, get_gpr_w1(r3));
   2273    assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
   2274    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
   2275                        op2)), op3);
   2276    put_gpr_w1(r1, mkexpr(result));
   2277 
   2278    return "ahik";
   2279 }
   2280 
   2281 static HChar *
   2282 s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
   2283 {
   2284    Long op2;
   2285    IRTemp op3 = newTemp(Ity_I64);
   2286    IRTemp result = newTemp(Ity_I64);
   2287 
   2288    op2 = (Long)(Short)i2;
   2289    assign(op3, get_gpr_dw0(r3));
   2290    assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
   2291    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
   2292                        op2)), op3);
   2293    put_gpr_dw0(r1, mkexpr(result));
   2294 
   2295    return "aghik";
   2296 }
   2297 
   2298 static HChar *
   2299 s390_irgen_ASI(UChar i2, IRTemp op1addr)
   2300 {
   2301    IRTemp op1 = newTemp(Ity_I32);
   2302    Int op2;
   2303    IRTemp result = newTemp(Ity_I32);
   2304 
   2305    assign(op1, load(Ity_I32, mkexpr(op1addr)));
   2306    op2 = (Int)(Char)i2;
   2307    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
   2308    store(mkexpr(op1addr), mkexpr(result));
   2309    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
   2310                        mkU32((UInt)op2)));
   2311 
   2312    return "asi";
   2313 }
   2314 
   2315 static HChar *
   2316 s390_irgen_AGSI(UChar i2, IRTemp op1addr)
   2317 {
   2318    IRTemp op1 = newTemp(Ity_I64);
   2319    Long op2;
   2320    IRTemp result = newTemp(Ity_I64);
   2321 
   2322    assign(op1, load(Ity_I64, mkexpr(op1addr)));
   2323    op2 = (Long)(Char)i2;
   2324    assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
   2325    store(mkexpr(op1addr), mkexpr(result));
   2326    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
   2327                        mkU64((ULong)op2)));
   2328 
   2329    return "agsi";
   2330 }
   2331 
   2332 static HChar *
   2333 s390_irgen_AH(UChar r1, IRTemp op2addr)
   2334 {
   2335    IRTemp op1 = newTemp(Ity_I32);
   2336    IRTemp op2 = newTemp(Ity_I32);
   2337    IRTemp result = newTemp(Ity_I32);
   2338 
   2339    assign(op1, get_gpr_w1(r1));
   2340    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   2341    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2342    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
   2343    put_gpr_w1(r1, mkexpr(result));
   2344 
   2345    return "ah";
   2346 }
   2347 
   2348 static HChar *
   2349 s390_irgen_AHY(UChar r1, IRTemp op2addr)
   2350 {
   2351    IRTemp op1 = newTemp(Ity_I32);
   2352    IRTemp op2 = newTemp(Ity_I32);
   2353    IRTemp result = newTemp(Ity_I32);
   2354 
   2355    assign(op1, get_gpr_w1(r1));
   2356    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   2357    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2358    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
   2359    put_gpr_w1(r1, mkexpr(result));
   2360 
   2361    return "ahy";
   2362 }
   2363 
   2364 static HChar *
   2365 s390_irgen_AHI(UChar r1, UShort i2)
   2366 {
   2367    IRTemp op1 = newTemp(Ity_I32);
   2368    Int op2;
   2369    IRTemp result = newTemp(Ity_I32);
   2370 
   2371    assign(op1, get_gpr_w1(r1));
   2372    op2 = (Int)(Short)i2;
   2373    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
   2374    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
   2375                        mkU32((UInt)op2)));
   2376    put_gpr_w1(r1, mkexpr(result));
   2377 
   2378    return "ahi";
   2379 }
   2380 
   2381 static HChar *
   2382 s390_irgen_AGHI(UChar r1, UShort i2)
   2383 {
   2384    IRTemp op1 = newTemp(Ity_I64);
   2385    Long op2;
   2386    IRTemp result = newTemp(Ity_I64);
   2387 
   2388    assign(op1, get_gpr_dw0(r1));
   2389    op2 = (Long)(Short)i2;
   2390    assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
   2391    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
   2392                        mkU64((ULong)op2)));
   2393    put_gpr_dw0(r1, mkexpr(result));
   2394 
   2395    return "aghi";
   2396 }
   2397 
   2398 static HChar *
   2399 s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
   2400 {
   2401    IRTemp op2 = newTemp(Ity_I32);
   2402    IRTemp op3 = newTemp(Ity_I32);
   2403    IRTemp result = newTemp(Ity_I32);
   2404 
   2405    assign(op2, get_gpr_w0(r2));
   2406    assign(op3, get_gpr_w0(r3));
   2407    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2408    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
   2409    put_gpr_w0(r1, mkexpr(result));
   2410 
   2411    return "ahhhr";
   2412 }
   2413 
   2414 static HChar *
   2415 s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
   2416 {
   2417    IRTemp op2 = newTemp(Ity_I32);
   2418    IRTemp op3 = newTemp(Ity_I32);
   2419    IRTemp result = newTemp(Ity_I32);
   2420 
   2421    assign(op2, get_gpr_w0(r2));
   2422    assign(op3, get_gpr_w1(r3));
   2423    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2424    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
   2425    put_gpr_w0(r1, mkexpr(result));
   2426 
   2427    return "ahhlr";
   2428 }
   2429 
   2430 static HChar *
   2431 s390_irgen_AIH(UChar r1, UInt i2)
   2432 {
   2433    IRTemp op1 = newTemp(Ity_I32);
   2434    Int op2;
   2435    IRTemp result = newTemp(Ity_I32);
   2436 
   2437    assign(op1, get_gpr_w0(r1));
   2438    op2 = (Int)i2;
   2439    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
   2440    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
   2441                        mkU32((UInt)op2)));
   2442    put_gpr_w0(r1, mkexpr(result));
   2443 
   2444    return "aih";
   2445 }
   2446 
   2447 static HChar *
   2448 s390_irgen_ALR(UChar r1, UChar r2)
   2449 {
   2450    IRTemp op1 = newTemp(Ity_I32);
   2451    IRTemp op2 = newTemp(Ity_I32);
   2452    IRTemp result = newTemp(Ity_I32);
   2453 
   2454    assign(op1, get_gpr_w1(r1));
   2455    assign(op2, get_gpr_w1(r2));
   2456    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2457    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
   2458    put_gpr_w1(r1, mkexpr(result));
   2459 
   2460    return "alr";
   2461 }
   2462 
   2463 static HChar *
   2464 s390_irgen_ALGR(UChar r1, UChar r2)
   2465 {
   2466    IRTemp op1 = newTemp(Ity_I64);
   2467    IRTemp op2 = newTemp(Ity_I64);
   2468    IRTemp result = newTemp(Ity_I64);
   2469 
   2470    assign(op1, get_gpr_dw0(r1));
   2471    assign(op2, get_gpr_dw0(r2));
   2472    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2473    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
   2474    put_gpr_dw0(r1, mkexpr(result));
   2475 
   2476    return "algr";
   2477 }
   2478 
   2479 static HChar *
   2480 s390_irgen_ALGFR(UChar r1, UChar r2)
   2481 {
   2482    IRTemp op1 = newTemp(Ity_I64);
   2483    IRTemp op2 = newTemp(Ity_I64);
   2484    IRTemp result = newTemp(Ity_I64);
   2485 
   2486    assign(op1, get_gpr_dw0(r1));
   2487    assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
   2488    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2489    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
   2490    put_gpr_dw0(r1, mkexpr(result));
   2491 
   2492    return "algfr";
   2493 }
   2494 
   2495 static HChar *
   2496 s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
   2497 {
   2498    IRTemp op2 = newTemp(Ity_I32);
   2499    IRTemp op3 = newTemp(Ity_I32);
   2500    IRTemp result = newTemp(Ity_I32);
   2501 
   2502    assign(op2, get_gpr_w1(r2));
   2503    assign(op3, get_gpr_w1(r3));
   2504    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2505    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
   2506    put_gpr_w1(r1, mkexpr(result));
   2507 
   2508    return "alrk";
   2509 }
   2510 
   2511 static HChar *
   2512 s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
   2513 {
   2514    IRTemp op2 = newTemp(Ity_I64);
   2515    IRTemp op3 = newTemp(Ity_I64);
   2516    IRTemp result = newTemp(Ity_I64);
   2517 
   2518    assign(op2, get_gpr_dw0(r2));
   2519    assign(op3, get_gpr_dw0(r3));
   2520    assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
   2521    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
   2522    put_gpr_dw0(r1, mkexpr(result));
   2523 
   2524    return "algrk";
   2525 }
   2526 
   2527 static HChar *
   2528 s390_irgen_AL(UChar r1, IRTemp op2addr)
   2529 {
   2530    IRTemp op1 = newTemp(Ity_I32);
   2531    IRTemp op2 = newTemp(Ity_I32);
   2532    IRTemp result = newTemp(Ity_I32);
   2533 
   2534    assign(op1, get_gpr_w1(r1));
   2535    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2536    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2537    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
   2538    put_gpr_w1(r1, mkexpr(result));
   2539 
   2540    return "al";
   2541 }
   2542 
   2543 static HChar *
   2544 s390_irgen_ALY(UChar r1, IRTemp op2addr)
   2545 {
   2546    IRTemp op1 = newTemp(Ity_I32);
   2547    IRTemp op2 = newTemp(Ity_I32);
   2548    IRTemp result = newTemp(Ity_I32);
   2549 
   2550    assign(op1, get_gpr_w1(r1));
   2551    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2552    assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
   2553    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
   2554    put_gpr_w1(r1, mkexpr(result));
   2555 
   2556    return "aly";
   2557 }
   2558 
   2559 static HChar *
   2560 s390_irgen_ALG(UChar r1, IRTemp op2addr)
   2561 {
   2562    IRTemp op1 = newTemp(Ity_I64);
   2563    IRTemp op2 = newTemp(Ity_I64);
   2564    IRTemp result = newTemp(Ity_I64);
   2565 
   2566    assign(op1, get_gpr_dw0(r1));
   2567    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   2568    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2569    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
   2570    put_gpr_dw0(r1, mkexpr(result));
   2571 
   2572    return "alg";
   2573 }
   2574 
   2575 static HChar *
   2576 s390_irgen_ALGF(UChar r1, IRTemp op2addr)
   2577 {
   2578    IRTemp op1 = newTemp(Ity_I64);
   2579    IRTemp op2 = newTemp(Ity_I64);
   2580    IRTemp result = newTemp(Ity_I64);
   2581 
   2582    assign(op1, get_gpr_dw0(r1));
   2583    assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
   2584    assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
   2585    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
   2586    put_gpr_dw0(r1, mkexpr(result));
   2587 
   2588    return "algf";
   2589 }
   2590 
   2591 static HChar *
   2592 s390_irgen_ALFI(UChar r1, UInt i2)
   2593 {
   2594    IRTemp op1 = newTemp(Ity_I32);
   2595    UInt op2;
   2596    IRTemp result = newTemp(Ity_I32);
   2597 
   2598    assign(op1, get_gpr_w1(r1));
   2599    op2 = i2;
   2600    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
   2601    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
   2602                        mkU32(op2)));
   2603    put_gpr_w1(r1, mkexpr(result));
   2604 
   2605    return "alfi";
   2606 }
   2607 
   2608 static HChar *
   2609 s390_irgen_ALGFI(UChar r1, UInt i2)
   2610 {
   2611    IRTemp op1 = newTemp(Ity_I64);
   2612    ULong op2;
   2613    IRTemp result = newTemp(Ity_I64);
   2614 
   2615    assign(op1, get_gpr_dw0(r1));
   2616    op2 = (ULong)i2;
   2617    assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
   2618    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
   2619                        mkU64(op2)));
   2620    put_gpr_dw0(r1, mkexpr(result));
   2621 
   2622    return "algfi";
   2623 }
   2624 
   2625 static HChar *
   2626 s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
   2627 {
   2628    IRTemp op2 = newTemp(Ity_I32);
   2629    IRTemp op3 = newTemp(Ity_I32);
   2630    IRTemp result = newTemp(Ity_I32);
   2631 
   2632    assign(op2, get_gpr_w0(r2));
   2633    assign(op3, get_gpr_w0(r3));
   2634    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2635    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
   2636    put_gpr_w0(r1, mkexpr(result));
   2637 
   2638    return "alhhhr";
   2639 }
   2640 
   2641 static HChar *
   2642 s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
   2643 {
   2644    IRTemp op2 = newTemp(Ity_I32);
   2645    IRTemp op3 = newTemp(Ity_I32);
   2646    IRTemp result = newTemp(Ity_I32);
   2647 
   2648    assign(op2, get_gpr_w0(r2));
   2649    assign(op3, get_gpr_w1(r3));
   2650    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   2651    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
   2652    put_gpr_w0(r1, mkexpr(result));
   2653 
   2654    return "alhhlr";
   2655 }
   2656 
   2657 static HChar *
   2658 s390_irgen_ALCR(UChar r1, UChar r2)
   2659 {
   2660    IRTemp op1 = newTemp(Ity_I32);
   2661    IRTemp op2 = newTemp(Ity_I32);
   2662    IRTemp result = newTemp(Ity_I32);
   2663    IRTemp carry_in = newTemp(Ity_I32);
   2664 
   2665    assign(op1, get_gpr_w1(r1));
   2666    assign(op2, get_gpr_w1(r2));
   2667    assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
   2668    assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
   2669           mkexpr(carry_in)));
   2670    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
   2671    put_gpr_w1(r1, mkexpr(result));
   2672 
   2673    return "alcr";
   2674 }
   2675 
   2676 static HChar *
   2677 s390_irgen_ALCGR(UChar r1, UChar r2)
   2678 {
   2679    IRTemp op1 = newTemp(Ity_I64);
   2680    IRTemp op2 = newTemp(Ity_I64);
   2681    IRTemp result = newTemp(Ity_I64);
   2682    IRTemp carry_in = newTemp(Ity_I64);
   2683 
   2684    assign(op1, get_gpr_dw0(r1));
   2685    assign(op2, get_gpr_dw0(r2));
   2686    assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
   2687           mkU8(1))));
   2688    assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
   2689           mkexpr(carry_in)));
   2690    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
   2691    put_gpr_dw0(r1, mkexpr(result));
   2692 
   2693    return "alcgr";
   2694 }
   2695 
   2696 static HChar *
   2697 s390_irgen_ALC(UChar r1, IRTemp op2addr)
   2698 {
   2699    IRTemp op1 = newTemp(Ity_I32);
   2700    IRTemp op2 = newTemp(Ity_I32);
   2701    IRTemp result = newTemp(Ity_I32);
   2702    IRTemp carry_in = newTemp(Ity_I32);
   2703 
   2704    assign(op1, get_gpr_w1(r1));
   2705    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2706    assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
   2707    assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
   2708           mkexpr(carry_in)));
   2709    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
   2710    put_gpr_w1(r1, mkexpr(result));
   2711 
   2712    return "alc";
   2713 }
   2714 
   2715 static HChar *
   2716 s390_irgen_ALCG(UChar r1, IRTemp op2addr)
   2717 {
   2718    IRTemp op1 = newTemp(Ity_I64);
   2719    IRTemp op2 = newTemp(Ity_I64);
   2720    IRTemp result = newTemp(Ity_I64);
   2721    IRTemp carry_in = newTemp(Ity_I64);
   2722 
   2723    assign(op1, get_gpr_dw0(r1));
   2724    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   2725    assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
   2726           mkU8(1))));
   2727    assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
   2728           mkexpr(carry_in)));
   2729    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
   2730    put_gpr_dw0(r1, mkexpr(result));
   2731 
   2732    return "alcg";
   2733 }
   2734 
   2735 static HChar *
   2736 s390_irgen_ALSI(UChar i2, IRTemp op1addr)
   2737 {
   2738    IRTemp op1 = newTemp(Ity_I32);
   2739    UInt op2;
   2740    IRTemp result = newTemp(Ity_I32);
   2741 
   2742    assign(op1, load(Ity_I32, mkexpr(op1addr)));
   2743    op2 = (UInt)(Int)(Char)i2;
   2744    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
   2745    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
   2746                        mkU32(op2)));
   2747    store(mkexpr(op1addr), mkexpr(result));
   2748 
   2749    return "alsi";
   2750 }
   2751 
   2752 static HChar *
   2753 s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
   2754 {
   2755    IRTemp op1 = newTemp(Ity_I64);
   2756    ULong op2;
   2757    IRTemp result = newTemp(Ity_I64);
   2758 
   2759    assign(op1, load(Ity_I64, mkexpr(op1addr)));
   2760    op2 = (ULong)(Long)(Char)i2;
   2761    assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
   2762    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
   2763                        mkU64(op2)));
   2764    store(mkexpr(op1addr), mkexpr(result));
   2765 
   2766    return "algsi";
   2767 }
   2768 
   2769 static HChar *
   2770 s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
   2771 {
   2772    UInt op2;
   2773    IRTemp op3 = newTemp(Ity_I32);
   2774    IRTemp result = newTemp(Ity_I32);
   2775 
   2776    op2 = (UInt)(Int)(Short)i2;
   2777    assign(op3, get_gpr_w1(r3));
   2778    assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
   2779    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
   2780                        op3);
   2781    put_gpr_w1(r1, mkexpr(result));
   2782 
   2783    return "alhsik";
   2784 }
   2785 
   2786 static HChar *
   2787 s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
   2788 {
   2789    ULong op2;
   2790    IRTemp op3 = newTemp(Ity_I64);
   2791    IRTemp result = newTemp(Ity_I64);
   2792 
   2793    op2 = (ULong)(Long)(Short)i2;
   2794    assign(op3, get_gpr_dw0(r3));
   2795    assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
   2796    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
   2797                        op3);
   2798    put_gpr_dw0(r1, mkexpr(result));
   2799 
   2800    return "alghsik";
   2801 }
   2802 
   2803 static HChar *
   2804 s390_irgen_ALSIH(UChar r1, UInt i2)
   2805 {
   2806    IRTemp op1 = newTemp(Ity_I32);
   2807    UInt op2;
   2808    IRTemp result = newTemp(Ity_I32);
   2809 
   2810    assign(op1, get_gpr_w0(r1));
   2811    op2 = i2;
   2812    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
   2813    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
   2814                        mkU32(op2)));
   2815    put_gpr_w0(r1, mkexpr(result));
   2816 
   2817    return "alsih";
   2818 }
   2819 
   2820 static HChar *
   2821 s390_irgen_ALSIHN(UChar r1, UInt i2)
   2822 {
   2823    IRTemp op1 = newTemp(Ity_I32);
   2824    UInt op2;
   2825    IRTemp result = newTemp(Ity_I32);
   2826 
   2827    assign(op1, get_gpr_w0(r1));
   2828    op2 = i2;
   2829    assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
   2830    put_gpr_w0(r1, mkexpr(result));
   2831 
   2832    return "alsihn";
   2833 }
   2834 
   2835 static HChar *
   2836 s390_irgen_NR(UChar r1, UChar r2)
   2837 {
   2838    IRTemp op1 = newTemp(Ity_I32);
   2839    IRTemp op2 = newTemp(Ity_I32);
   2840    IRTemp result = newTemp(Ity_I32);
   2841 
   2842    assign(op1, get_gpr_w1(r1));
   2843    assign(op2, get_gpr_w1(r2));
   2844    assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
   2845    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2846    put_gpr_w1(r1, mkexpr(result));
   2847 
   2848    return "nr";
   2849 }
   2850 
   2851 static HChar *
   2852 s390_irgen_NGR(UChar r1, UChar r2)
   2853 {
   2854    IRTemp op1 = newTemp(Ity_I64);
   2855    IRTemp op2 = newTemp(Ity_I64);
   2856    IRTemp result = newTemp(Ity_I64);
   2857 
   2858    assign(op1, get_gpr_dw0(r1));
   2859    assign(op2, get_gpr_dw0(r2));
   2860    assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
   2861    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2862    put_gpr_dw0(r1, mkexpr(result));
   2863 
   2864    return "ngr";
   2865 }
   2866 
   2867 static HChar *
   2868 s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
   2869 {
   2870    IRTemp op2 = newTemp(Ity_I32);
   2871    IRTemp op3 = newTemp(Ity_I32);
   2872    IRTemp result = newTemp(Ity_I32);
   2873 
   2874    assign(op2, get_gpr_w1(r2));
   2875    assign(op3, get_gpr_w1(r3));
   2876    assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
   2877    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2878    put_gpr_w1(r1, mkexpr(result));
   2879 
   2880    return "nrk";
   2881 }
   2882 
   2883 static HChar *
   2884 s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
   2885 {
   2886    IRTemp op2 = newTemp(Ity_I64);
   2887    IRTemp op3 = newTemp(Ity_I64);
   2888    IRTemp result = newTemp(Ity_I64);
   2889 
   2890    assign(op2, get_gpr_dw0(r2));
   2891    assign(op3, get_gpr_dw0(r3));
   2892    assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
   2893    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2894    put_gpr_dw0(r1, mkexpr(result));
   2895 
   2896    return "ngrk";
   2897 }
   2898 
   2899 static HChar *
   2900 s390_irgen_N(UChar r1, IRTemp op2addr)
   2901 {
   2902    IRTemp op1 = newTemp(Ity_I32);
   2903    IRTemp op2 = newTemp(Ity_I32);
   2904    IRTemp result = newTemp(Ity_I32);
   2905 
   2906    assign(op1, get_gpr_w1(r1));
   2907    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2908    assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
   2909    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2910    put_gpr_w1(r1, mkexpr(result));
   2911 
   2912    return "n";
   2913 }
   2914 
   2915 static HChar *
   2916 s390_irgen_NY(UChar r1, IRTemp op2addr)
   2917 {
   2918    IRTemp op1 = newTemp(Ity_I32);
   2919    IRTemp op2 = newTemp(Ity_I32);
   2920    IRTemp result = newTemp(Ity_I32);
   2921 
   2922    assign(op1, get_gpr_w1(r1));
   2923    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   2924    assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
   2925    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2926    put_gpr_w1(r1, mkexpr(result));
   2927 
   2928    return "ny";
   2929 }
   2930 
   2931 static HChar *
   2932 s390_irgen_NG(UChar r1, IRTemp op2addr)
   2933 {
   2934    IRTemp op1 = newTemp(Ity_I64);
   2935    IRTemp op2 = newTemp(Ity_I64);
   2936    IRTemp result = newTemp(Ity_I64);
   2937 
   2938    assign(op1, get_gpr_dw0(r1));
   2939    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   2940    assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
   2941    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2942    put_gpr_dw0(r1, mkexpr(result));
   2943 
   2944    return "ng";
   2945 }
   2946 
   2947 static HChar *
   2948 s390_irgen_NI(UChar i2, IRTemp op1addr)
   2949 {
   2950    IRTemp op1 = newTemp(Ity_I8);
   2951    UChar op2;
   2952    IRTemp result = newTemp(Ity_I8);
   2953 
   2954    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   2955    op2 = i2;
   2956    assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
   2957    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2958    store(mkexpr(op1addr), mkexpr(result));
   2959 
   2960    return "ni";
   2961 }
   2962 
   2963 static HChar *
   2964 s390_irgen_NIY(UChar i2, IRTemp op1addr)
   2965 {
   2966    IRTemp op1 = newTemp(Ity_I8);
   2967    UChar op2;
   2968    IRTemp result = newTemp(Ity_I8);
   2969 
   2970    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   2971    op2 = i2;
   2972    assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
   2973    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2974    store(mkexpr(op1addr), mkexpr(result));
   2975 
   2976    return "niy";
   2977 }
   2978 
   2979 static HChar *
   2980 s390_irgen_NIHF(UChar r1, UInt i2)
   2981 {
   2982    IRTemp op1 = newTemp(Ity_I32);
   2983    UInt op2;
   2984    IRTemp result = newTemp(Ity_I32);
   2985 
   2986    assign(op1, get_gpr_w0(r1));
   2987    op2 = i2;
   2988    assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
   2989    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   2990    put_gpr_w0(r1, mkexpr(result));
   2991 
   2992    return "nihf";
   2993 }
   2994 
   2995 static HChar *
   2996 s390_irgen_NIHH(UChar r1, UShort i2)
   2997 {
   2998    IRTemp op1 = newTemp(Ity_I16);
   2999    UShort op2;
   3000    IRTemp result = newTemp(Ity_I16);
   3001 
   3002    assign(op1, get_gpr_hw0(r1));
   3003    op2 = i2;
   3004    assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
   3005    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   3006    put_gpr_hw0(r1, mkexpr(result));
   3007 
   3008    return "nihh";
   3009 }
   3010 
   3011 static HChar *
   3012 s390_irgen_NIHL(UChar r1, UShort i2)
   3013 {
   3014    IRTemp op1 = newTemp(Ity_I16);
   3015    UShort op2;
   3016    IRTemp result = newTemp(Ity_I16);
   3017 
   3018    assign(op1, get_gpr_hw1(r1));
   3019    op2 = i2;
   3020    assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
   3021    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   3022    put_gpr_hw1(r1, mkexpr(result));
   3023 
   3024    return "nihl";
   3025 }
   3026 
   3027 static HChar *
   3028 s390_irgen_NILF(UChar r1, UInt i2)
   3029 {
   3030    IRTemp op1 = newTemp(Ity_I32);
   3031    UInt op2;
   3032    IRTemp result = newTemp(Ity_I32);
   3033 
   3034    assign(op1, get_gpr_w1(r1));
   3035    op2 = i2;
   3036    assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
   3037    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   3038    put_gpr_w1(r1, mkexpr(result));
   3039 
   3040    return "nilf";
   3041 }
   3042 
   3043 static HChar *
   3044 s390_irgen_NILH(UChar r1, UShort i2)
   3045 {
   3046    IRTemp op1 = newTemp(Ity_I16);
   3047    UShort op2;
   3048    IRTemp result = newTemp(Ity_I16);
   3049 
   3050    assign(op1, get_gpr_hw2(r1));
   3051    op2 = i2;
   3052    assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
   3053    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   3054    put_gpr_hw2(r1, mkexpr(result));
   3055 
   3056    return "nilh";
   3057 }
   3058 
   3059 static HChar *
   3060 s390_irgen_NILL(UChar r1, UShort i2)
   3061 {
   3062    IRTemp op1 = newTemp(Ity_I16);
   3063    UShort op2;
   3064    IRTemp result = newTemp(Ity_I16);
   3065 
   3066    assign(op1, get_gpr_hw3(r1));
   3067    op2 = i2;
   3068    assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
   3069    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   3070    put_gpr_hw3(r1, mkexpr(result));
   3071 
   3072    return "nill";
   3073 }
   3074 
   3075 static HChar *
   3076 s390_irgen_BASR(UChar r1, UChar r2)
   3077 {
   3078    IRTemp target = newTemp(Ity_I64);
   3079 
   3080    if (r2 == 0) {
   3081       put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
   3082    } else {
   3083       if (r1 != r2) {
   3084          put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
   3085          call_function(get_gpr_dw0(r2));
   3086       } else {
   3087          assign(target, get_gpr_dw0(r2));
   3088          put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
   3089          call_function(mkexpr(target));
   3090       }
   3091    }
   3092 
   3093    return "basr";
   3094 }
   3095 
   3096 static HChar *
   3097 s390_irgen_BAS(UChar r1, IRTemp op2addr)
   3098 {
   3099    IRTemp target = newTemp(Ity_I64);
   3100 
   3101    put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
   3102    assign(target, mkexpr(op2addr));
   3103    call_function(mkexpr(target));
   3104 
   3105    return "bas";
   3106 }
   3107 
   3108 static HChar *
   3109 s390_irgen_BCR(UChar r1, UChar r2)
   3110 {
   3111    IRTemp cond = newTemp(Ity_I32);
   3112 
   3113    if (r2 == 0 && (r1 >= 14)) {    /* serialization */
   3114       stmt(IRStmt_MBE(Imbe_Fence));
   3115    }
   3116 
   3117    if ((r2 == 0) || (r1 == 0)) {
   3118    } else {
   3119       if (r1 == 15) {
   3120          return_from_function(get_gpr_dw0(r2));
   3121       } else {
   3122          assign(cond, s390_call_calculate_cond(r1));
   3123          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3124                                         mkU32(0)), get_gpr_dw0(r2));
   3125       }
   3126    }
   3127    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   3128       s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
   3129 
   3130    return "bcr";
   3131 }
   3132 
   3133 static HChar *
   3134 s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
   3135 {
   3136    IRTemp cond = newTemp(Ity_I32);
   3137 
   3138    if (r1 == 0) {
   3139    } else {
   3140       if (r1 == 15) {
   3141          always_goto(mkexpr(op2addr));
   3142       } else {
   3143          assign(cond, s390_call_calculate_cond(r1));
   3144          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3145                                         mkU32(0)), mkexpr(op2addr));
   3146       }
   3147    }
   3148    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   3149       s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
   3150 
   3151    return "bc";
   3152 }
   3153 
   3154 static HChar *
   3155 s390_irgen_BCTR(UChar r1, UChar r2)
   3156 {
   3157    put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
   3158    if (r2 != 0) {
   3159       if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
   3160                                      ), get_gpr_dw0(r2));
   3161    }
   3162 
   3163    return "bctr";
   3164 }
   3165 
   3166 static HChar *
   3167 s390_irgen_BCTGR(UChar r1, UChar r2)
   3168 {
   3169    put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
   3170    if (r2 != 0) {
   3171       if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
   3172                                      mkU64(0)), get_gpr_dw0(r2));
   3173    }
   3174 
   3175    return "bctgr";
   3176 }
   3177 
   3178 static HChar *
   3179 s390_irgen_BCT(UChar r1, IRTemp op2addr)
   3180 {
   3181    put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
   3182    if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
   3183                                   mkexpr(op2addr));
   3184 
   3185    return "bct";
   3186 }
   3187 
   3188 static HChar *
   3189 s390_irgen_BCTG(UChar r1, IRTemp op2addr)
   3190 {
   3191    put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
   3192    if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
   3193                                   mkexpr(op2addr));
   3194 
   3195    return "bctg";
   3196 }
   3197 
   3198 static HChar *
   3199 s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
   3200 {
   3201    IRTemp value = newTemp(Ity_I32);
   3202 
   3203    assign(value, get_gpr_w1(r3 | 1));
   3204    put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
   3205    if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
   3206                                   mkexpr(value)), mkexpr(op2addr));
   3207 
   3208    return "bxh";
   3209 }
   3210 
   3211 static HChar *
   3212 s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
   3213 {
   3214    IRTemp value = newTemp(Ity_I64);
   3215 
   3216    assign(value, get_gpr_dw0(r3 | 1));
   3217    put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
   3218    if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
   3219                                   mkexpr(value)), mkexpr(op2addr));
   3220 
   3221    return "bxhg";
   3222 }
   3223 
   3224 static HChar *
   3225 s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
   3226 {
   3227    IRTemp value = newTemp(Ity_I32);
   3228 
   3229    assign(value, get_gpr_w1(r3 | 1));
   3230    put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
   3231    if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
   3232                                   get_gpr_w1(r1)), mkexpr(op2addr));
   3233 
   3234    return "bxle";
   3235 }
   3236 
   3237 static HChar *
   3238 s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
   3239 {
   3240    IRTemp value = newTemp(Ity_I64);
   3241 
   3242    assign(value, get_gpr_dw0(r3 | 1));
   3243    put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
   3244    if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
   3245                                   get_gpr_dw0(r1)), mkexpr(op2addr));
   3246 
   3247    return "bxleg";
   3248 }
   3249 
   3250 static HChar *
   3251 s390_irgen_BRAS(UChar r1, UShort i2)
   3252 {
   3253    put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
   3254    call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3255 
   3256    return "bras";
   3257 }
   3258 
   3259 static HChar *
   3260 s390_irgen_BRASL(UChar r1, UInt i2)
   3261 {
   3262    put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
   3263    call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
   3264 
   3265    return "brasl";
   3266 }
   3267 
   3268 static HChar *
   3269 s390_irgen_BRC(UChar r1, UShort i2)
   3270 {
   3271    IRTemp cond = newTemp(Ity_I32);
   3272 
   3273    if (r1 == 0) {
   3274    } else {
   3275       if (r1 == 15) {
   3276          always_goto_and_chase(
   3277                guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3278       } else {
   3279          assign(cond, s390_call_calculate_cond(r1));
   3280          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3281                            guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3282 
   3283       }
   3284    }
   3285    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   3286       s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
   3287 
   3288    return "brc";
   3289 }
   3290 
   3291 static HChar *
   3292 s390_irgen_BRCL(UChar r1, UInt i2)
   3293 {
   3294    IRTemp cond = newTemp(Ity_I32);
   3295 
   3296    if (r1 == 0) {
   3297    } else {
   3298       if (r1 == 15) {
   3299          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
   3300       } else {
   3301          assign(cond, s390_call_calculate_cond(r1));
   3302          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3303                            guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
   3304       }
   3305    }
   3306    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   3307       s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
   3308 
   3309    return "brcl";
   3310 }
   3311 
   3312 static HChar *
   3313 s390_irgen_BRCT(UChar r1, UShort i2)
   3314 {
   3315    put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
   3316    if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
   3317                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3318 
   3319    return "brct";
   3320 }
   3321 
   3322 static HChar *
   3323 s390_irgen_BRCTG(UChar r1, UShort i2)
   3324 {
   3325    put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
   3326    if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
   3327                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3328 
   3329    return "brctg";
   3330 }
   3331 
   3332 static HChar *
   3333 s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
   3334 {
   3335    IRTemp value = newTemp(Ity_I32);
   3336 
   3337    assign(value, get_gpr_w1(r3 | 1));
   3338    put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
   3339    if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
   3340                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3341 
   3342    return "brxh";
   3343 }
   3344 
   3345 static HChar *
   3346 s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
   3347 {
   3348    IRTemp value = newTemp(Ity_I64);
   3349 
   3350    assign(value, get_gpr_dw0(r3 | 1));
   3351    put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
   3352    if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
   3353                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3354 
   3355    return "brxhg";
   3356 }
   3357 
   3358 static HChar *
   3359 s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
   3360 {
   3361    IRTemp value = newTemp(Ity_I32);
   3362 
   3363    assign(value, get_gpr_w1(r3 | 1));
   3364    put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
   3365    if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
   3366                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3367 
   3368    return "brxle";
   3369 }
   3370 
   3371 static HChar *
   3372 s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
   3373 {
   3374    IRTemp value = newTemp(Ity_I64);
   3375 
   3376    assign(value, get_gpr_dw0(r3 | 1));
   3377    put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
   3378    if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
   3379                      guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
   3380 
   3381    return "brxlg";
   3382 }
   3383 
   3384 static HChar *
   3385 s390_irgen_CR(UChar r1, UChar r2)
   3386 {
   3387    IRTemp op1 = newTemp(Ity_I32);
   3388    IRTemp op2 = newTemp(Ity_I32);
   3389 
   3390    assign(op1, get_gpr_w1(r1));
   3391    assign(op2, get_gpr_w1(r2));
   3392    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3393 
   3394    return "cr";
   3395 }
   3396 
   3397 static HChar *
   3398 s390_irgen_CGR(UChar r1, UChar r2)
   3399 {
   3400    IRTemp op1 = newTemp(Ity_I64);
   3401    IRTemp op2 = newTemp(Ity_I64);
   3402 
   3403    assign(op1, get_gpr_dw0(r1));
   3404    assign(op2, get_gpr_dw0(r2));
   3405    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3406 
   3407    return "cgr";
   3408 }
   3409 
   3410 static HChar *
   3411 s390_irgen_CGFR(UChar r1, UChar r2)
   3412 {
   3413    IRTemp op1 = newTemp(Ity_I64);
   3414    IRTemp op2 = newTemp(Ity_I64);
   3415 
   3416    assign(op1, get_gpr_dw0(r1));
   3417    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   3418    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3419 
   3420    return "cgfr";
   3421 }
   3422 
   3423 static HChar *
   3424 s390_irgen_C(UChar r1, IRTemp op2addr)
   3425 {
   3426    IRTemp op1 = newTemp(Ity_I32);
   3427    IRTemp op2 = newTemp(Ity_I32);
   3428 
   3429    assign(op1, get_gpr_w1(r1));
   3430    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   3431    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3432 
   3433    return "c";
   3434 }
   3435 
   3436 static HChar *
   3437 s390_irgen_CY(UChar r1, IRTemp op2addr)
   3438 {
   3439    IRTemp op1 = newTemp(Ity_I32);
   3440    IRTemp op2 = newTemp(Ity_I32);
   3441 
   3442    assign(op1, get_gpr_w1(r1));
   3443    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   3444    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3445 
   3446    return "cy";
   3447 }
   3448 
   3449 static HChar *
   3450 s390_irgen_CG(UChar r1, IRTemp op2addr)
   3451 {
   3452    IRTemp op1 = newTemp(Ity_I64);
   3453    IRTemp op2 = newTemp(Ity_I64);
   3454 
   3455    assign(op1, get_gpr_dw0(r1));
   3456    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   3457    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3458 
   3459    return "cg";
   3460 }
   3461 
   3462 static HChar *
   3463 s390_irgen_CGF(UChar r1, IRTemp op2addr)
   3464 {
   3465    IRTemp op1 = newTemp(Ity_I64);
   3466    IRTemp op2 = newTemp(Ity_I64);
   3467 
   3468    assign(op1, get_gpr_dw0(r1));
   3469    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   3470    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3471 
   3472    return "cgf";
   3473 }
   3474 
   3475 static HChar *
   3476 s390_irgen_CFI(UChar r1, UInt i2)
   3477 {
   3478    IRTemp op1 = newTemp(Ity_I32);
   3479    Int op2;
   3480 
   3481    assign(op1, get_gpr_w1(r1));
   3482    op2 = (Int)i2;
   3483    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
   3484                        mkU32((UInt)op2)));
   3485 
   3486    return "cfi";
   3487 }
   3488 
   3489 static HChar *
   3490 s390_irgen_CGFI(UChar r1, UInt i2)
   3491 {
   3492    IRTemp op1 = newTemp(Ity_I64);
   3493    Long op2;
   3494 
   3495    assign(op1, get_gpr_dw0(r1));
   3496    op2 = (Long)(Int)i2;
   3497    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
   3498                        mkU64((ULong)op2)));
   3499 
   3500    return "cgfi";
   3501 }
   3502 
   3503 static HChar *
   3504 s390_irgen_CRL(UChar r1, UInt i2)
   3505 {
   3506    IRTemp op1 = newTemp(Ity_I32);
   3507    IRTemp op2 = newTemp(Ity_I32);
   3508 
   3509    assign(op1, get_gpr_w1(r1));
   3510    assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   3511           i2 << 1))));
   3512    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3513 
   3514    return "crl";
   3515 }
   3516 
   3517 static HChar *
   3518 s390_irgen_CGRL(UChar r1, UInt i2)
   3519 {
   3520    IRTemp op1 = newTemp(Ity_I64);
   3521    IRTemp op2 = newTemp(Ity_I64);
   3522 
   3523    assign(op1, get_gpr_dw0(r1));
   3524    assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   3525           i2 << 1))));
   3526    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3527 
   3528    return "cgrl";
   3529 }
   3530 
   3531 static HChar *
   3532 s390_irgen_CGFRL(UChar r1, UInt i2)
   3533 {
   3534    IRTemp op1 = newTemp(Ity_I64);
   3535    IRTemp op2 = newTemp(Ity_I64);
   3536 
   3537    assign(op1, get_gpr_dw0(r1));
   3538    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
   3539           ((ULong)(Long)(Int)i2 << 1)))));
   3540    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3541 
   3542    return "cgfrl";
   3543 }
   3544 
   3545 static HChar *
   3546 s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
   3547 {
   3548    IRTemp op1 = newTemp(Ity_I32);
   3549    IRTemp op2 = newTemp(Ity_I32);
   3550    IRTemp icc = newTemp(Ity_I32);
   3551    IRTemp cond = newTemp(Ity_I32);
   3552 
   3553    if (m3 == 0) {
   3554    } else {
   3555       if (m3 == 14) {
   3556          always_goto(mkexpr(op4addr));
   3557       } else {
   3558          assign(op1, get_gpr_w1(r1));
   3559          assign(op2, get_gpr_w1(r2));
   3560          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3561                 op2));
   3562          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3563                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3564          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3565                                         mkU32(0)), mkexpr(op4addr));
   3566       }
   3567    }
   3568 
   3569    return "crb";
   3570 }
   3571 
   3572 static HChar *
   3573 s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
   3574 {
   3575    IRTemp op1 = newTemp(Ity_I64);
   3576    IRTemp op2 = newTemp(Ity_I64);
   3577    IRTemp icc = newTemp(Ity_I32);
   3578    IRTemp cond = newTemp(Ity_I32);
   3579 
   3580    if (m3 == 0) {
   3581    } else {
   3582       if (m3 == 14) {
   3583          always_goto(mkexpr(op4addr));
   3584       } else {
   3585          assign(op1, get_gpr_dw0(r1));
   3586          assign(op2, get_gpr_dw0(r2));
   3587          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3588                 op2));
   3589          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3590                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3591          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3592                                         mkU32(0)), mkexpr(op4addr));
   3593       }
   3594    }
   3595 
   3596    return "cgrb";
   3597 }
   3598 
   3599 static HChar *
   3600 s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
   3601 {
   3602    IRTemp op1 = newTemp(Ity_I32);
   3603    IRTemp op2 = newTemp(Ity_I32);
   3604    IRTemp icc = newTemp(Ity_I32);
   3605    IRTemp cond = newTemp(Ity_I32);
   3606 
   3607    if (m3 == 0) {
   3608    } else {
   3609       if (m3 == 14) {
   3610          always_goto_and_chase(
   3611                 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3612       } else {
   3613          assign(op1, get_gpr_w1(r1));
   3614          assign(op2, get_gpr_w1(r2));
   3615          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3616                 op2));
   3617          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3618                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3619          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3620                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3621 
   3622       }
   3623    }
   3624 
   3625    return "crj";
   3626 }
   3627 
   3628 static HChar *
   3629 s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
   3630 {
   3631    IRTemp op1 = newTemp(Ity_I64);
   3632    IRTemp op2 = newTemp(Ity_I64);
   3633    IRTemp icc = newTemp(Ity_I32);
   3634    IRTemp cond = newTemp(Ity_I32);
   3635 
   3636    if (m3 == 0) {
   3637    } else {
   3638       if (m3 == 14) {
   3639          always_goto_and_chase(
   3640                 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3641       } else {
   3642          assign(op1, get_gpr_dw0(r1));
   3643          assign(op2, get_gpr_dw0(r2));
   3644          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3645                 op2));
   3646          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3647                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3648          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3649                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3650 
   3651       }
   3652    }
   3653 
   3654    return "cgrj";
   3655 }
   3656 
   3657 static HChar *
   3658 s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
   3659 {
   3660    IRTemp op1 = newTemp(Ity_I32);
   3661    Int op2;
   3662    IRTemp icc = newTemp(Ity_I32);
   3663    IRTemp cond = newTemp(Ity_I32);
   3664 
   3665    if (m3 == 0) {
   3666    } else {
   3667       if (m3 == 14) {
   3668          always_goto(mkexpr(op4addr));
   3669       } else {
   3670          assign(op1, get_gpr_w1(r1));
   3671          op2 = (Int)(Char)i2;
   3672          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3673                 mktemp(Ity_I32, mkU32((UInt)op2))));
   3674          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3675                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3676          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3677                                         mkU32(0)), mkexpr(op4addr));
   3678       }
   3679    }
   3680 
   3681    return "cib";
   3682 }
   3683 
   3684 static HChar *
   3685 s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
   3686 {
   3687    IRTemp op1 = newTemp(Ity_I64);
   3688    Long op2;
   3689    IRTemp icc = newTemp(Ity_I32);
   3690    IRTemp cond = newTemp(Ity_I32);
   3691 
   3692    if (m3 == 0) {
   3693    } else {
   3694       if (m3 == 14) {
   3695          always_goto(mkexpr(op4addr));
   3696       } else {
   3697          assign(op1, get_gpr_dw0(r1));
   3698          op2 = (Long)(Char)i2;
   3699          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3700                 mktemp(Ity_I64, mkU64((ULong)op2))));
   3701          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3702                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3703          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   3704                                         mkU32(0)), mkexpr(op4addr));
   3705       }
   3706    }
   3707 
   3708    return "cgib";
   3709 }
   3710 
   3711 static HChar *
   3712 s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
   3713 {
   3714    IRTemp op1 = newTemp(Ity_I32);
   3715    Int op2;
   3716    IRTemp icc = newTemp(Ity_I32);
   3717    IRTemp cond = newTemp(Ity_I32);
   3718 
   3719    if (m3 == 0) {
   3720    } else {
   3721       if (m3 == 14) {
   3722          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3723       } else {
   3724          assign(op1, get_gpr_w1(r1));
   3725          op2 = (Int)(Char)i2;
   3726          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3727                 mktemp(Ity_I32, mkU32((UInt)op2))));
   3728          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3729                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3730          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3731                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3732 
   3733       }
   3734    }
   3735 
   3736    return "cij";
   3737 }
   3738 
   3739 static HChar *
   3740 s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
   3741 {
   3742    IRTemp op1 = newTemp(Ity_I64);
   3743    Long op2;
   3744    IRTemp icc = newTemp(Ity_I32);
   3745    IRTemp cond = newTemp(Ity_I32);
   3746 
   3747    if (m3 == 0) {
   3748    } else {
   3749       if (m3 == 14) {
   3750          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3751       } else {
   3752          assign(op1, get_gpr_dw0(r1));
   3753          op2 = (Long)(Char)i2;
   3754          assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
   3755                 mktemp(Ity_I64, mkU64((ULong)op2))));
   3756          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   3757                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   3758          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   3759                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   3760 
   3761       }
   3762    }
   3763 
   3764    return "cgij";
   3765 }
   3766 
   3767 static HChar *
   3768 s390_irgen_CH(UChar r1, IRTemp op2addr)
   3769 {
   3770    IRTemp op1 = newTemp(Ity_I32);
   3771    IRTemp op2 = newTemp(Ity_I32);
   3772 
   3773    assign(op1, get_gpr_w1(r1));
   3774    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   3775    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3776 
   3777    return "ch";
   3778 }
   3779 
   3780 static HChar *
   3781 s390_irgen_CHY(UChar r1, IRTemp op2addr)
   3782 {
   3783    IRTemp op1 = newTemp(Ity_I32);
   3784    IRTemp op2 = newTemp(Ity_I32);
   3785 
   3786    assign(op1, get_gpr_w1(r1));
   3787    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   3788    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3789 
   3790    return "chy";
   3791 }
   3792 
   3793 static HChar *
   3794 s390_irgen_CGH(UChar r1, IRTemp op2addr)
   3795 {
   3796    IRTemp op1 = newTemp(Ity_I64);
   3797    IRTemp op2 = newTemp(Ity_I64);
   3798 
   3799    assign(op1, get_gpr_dw0(r1));
   3800    assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
   3801    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3802 
   3803    return "cgh";
   3804 }
   3805 
   3806 static HChar *
   3807 s390_irgen_CHI(UChar r1, UShort i2)
   3808 {
   3809    IRTemp op1 = newTemp(Ity_I32);
   3810    Int op2;
   3811 
   3812    assign(op1, get_gpr_w1(r1));
   3813    op2 = (Int)(Short)i2;
   3814    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
   3815                        mkU32((UInt)op2)));
   3816 
   3817    return "chi";
   3818 }
   3819 
   3820 static HChar *
   3821 s390_irgen_CGHI(UChar r1, UShort i2)
   3822 {
   3823    IRTemp op1 = newTemp(Ity_I64);
   3824    Long op2;
   3825 
   3826    assign(op1, get_gpr_dw0(r1));
   3827    op2 = (Long)(Short)i2;
   3828    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
   3829                        mkU64((ULong)op2)));
   3830 
   3831    return "cghi";
   3832 }
   3833 
   3834 static HChar *
   3835 s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
   3836 {
   3837    IRTemp op1 = newTemp(Ity_I16);
   3838    Short op2;
   3839 
   3840    assign(op1, load(Ity_I16, mkexpr(op1addr)));
   3841    op2 = (Short)i2;
   3842    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
   3843                        mkU16((UShort)op2)));
   3844 
   3845    return "chhsi";
   3846 }
   3847 
   3848 static HChar *
   3849 s390_irgen_CHSI(UShort i2, IRTemp op1addr)
   3850 {
   3851    IRTemp op1 = newTemp(Ity_I32);
   3852    Int op2;
   3853 
   3854    assign(op1, load(Ity_I32, mkexpr(op1addr)));
   3855    op2 = (Int)(Short)i2;
   3856    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
   3857                        mkU32((UInt)op2)));
   3858 
   3859    return "chsi";
   3860 }
   3861 
   3862 static HChar *
   3863 s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
   3864 {
   3865    IRTemp op1 = newTemp(Ity_I64);
   3866    Long op2;
   3867 
   3868    assign(op1, load(Ity_I64, mkexpr(op1addr)));
   3869    op2 = (Long)(Short)i2;
   3870    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
   3871                        mkU64((ULong)op2)));
   3872 
   3873    return "cghsi";
   3874 }
   3875 
   3876 static HChar *
   3877 s390_irgen_CHRL(UChar r1, UInt i2)
   3878 {
   3879    IRTemp op1 = newTemp(Ity_I32);
   3880    IRTemp op2 = newTemp(Ity_I32);
   3881 
   3882    assign(op1, get_gpr_w1(r1));
   3883    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
   3884           ((ULong)(Long)(Int)i2 << 1)))));
   3885    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3886 
   3887    return "chrl";
   3888 }
   3889 
   3890 static HChar *
   3891 s390_irgen_CGHRL(UChar r1, UInt i2)
   3892 {
   3893    IRTemp op1 = newTemp(Ity_I64);
   3894    IRTemp op2 = newTemp(Ity_I64);
   3895 
   3896    assign(op1, get_gpr_dw0(r1));
   3897    assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
   3898           ((ULong)(Long)(Int)i2 << 1)))));
   3899    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3900 
   3901    return "cghrl";
   3902 }
   3903 
   3904 static HChar *
   3905 s390_irgen_CHHR(UChar r1, UChar r2)
   3906 {
   3907    IRTemp op1 = newTemp(Ity_I32);
   3908    IRTemp op2 = newTemp(Ity_I32);
   3909 
   3910    assign(op1, get_gpr_w0(r1));
   3911    assign(op2, get_gpr_w0(r2));
   3912    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3913 
   3914    return "chhr";
   3915 }
   3916 
   3917 static HChar *
   3918 s390_irgen_CHLR(UChar r1, UChar r2)
   3919 {
   3920    IRTemp op1 = newTemp(Ity_I32);
   3921    IRTemp op2 = newTemp(Ity_I32);
   3922 
   3923    assign(op1, get_gpr_w0(r1));
   3924    assign(op2, get_gpr_w1(r2));
   3925    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3926 
   3927    return "chlr";
   3928 }
   3929 
   3930 static HChar *
   3931 s390_irgen_CHF(UChar r1, IRTemp op2addr)
   3932 {
   3933    IRTemp op1 = newTemp(Ity_I32);
   3934    IRTemp op2 = newTemp(Ity_I32);
   3935 
   3936    assign(op1, get_gpr_w0(r1));
   3937    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   3938    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
   3939 
   3940    return "chf";
   3941 }
   3942 
   3943 static HChar *
   3944 s390_irgen_CIH(UChar r1, UInt i2)
   3945 {
   3946    IRTemp op1 = newTemp(Ity_I32);
   3947    Int op2;
   3948 
   3949    assign(op1, get_gpr_w0(r1));
   3950    op2 = (Int)i2;
   3951    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
   3952                        mkU32((UInt)op2)));
   3953 
   3954    return "cih";
   3955 }
   3956 
   3957 static HChar *
   3958 s390_irgen_CLR(UChar r1, UChar r2)
   3959 {
   3960    IRTemp op1 = newTemp(Ity_I32);
   3961    IRTemp op2 = newTemp(Ity_I32);
   3962 
   3963    assign(op1, get_gpr_w1(r1));
   3964    assign(op2, get_gpr_w1(r2));
   3965    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   3966 
   3967    return "clr";
   3968 }
   3969 
   3970 static HChar *
   3971 s390_irgen_CLGR(UChar r1, UChar r2)
   3972 {
   3973    IRTemp op1 = newTemp(Ity_I64);
   3974    IRTemp op2 = newTemp(Ity_I64);
   3975 
   3976    assign(op1, get_gpr_dw0(r1));
   3977    assign(op2, get_gpr_dw0(r2));
   3978    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   3979 
   3980    return "clgr";
   3981 }
   3982 
   3983 static HChar *
   3984 s390_irgen_CLGFR(UChar r1, UChar r2)
   3985 {
   3986    IRTemp op1 = newTemp(Ity_I64);
   3987    IRTemp op2 = newTemp(Ity_I64);
   3988 
   3989    assign(op1, get_gpr_dw0(r1));
   3990    assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
   3991    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   3992 
   3993    return "clgfr";
   3994 }
   3995 
   3996 static HChar *
   3997 s390_irgen_CL(UChar r1, IRTemp op2addr)
   3998 {
   3999    IRTemp op1 = newTemp(Ity_I32);
   4000    IRTemp op2 = newTemp(Ity_I32);
   4001 
   4002    assign(op1, get_gpr_w1(r1));
   4003    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   4004    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4005 
   4006    return "cl";
   4007 }
   4008 
   4009 static HChar *
   4010 s390_irgen_CLY(UChar r1, IRTemp op2addr)
   4011 {
   4012    IRTemp op1 = newTemp(Ity_I32);
   4013    IRTemp op2 = newTemp(Ity_I32);
   4014 
   4015    assign(op1, get_gpr_w1(r1));
   4016    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   4017    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4018 
   4019    return "cly";
   4020 }
   4021 
   4022 static HChar *
   4023 s390_irgen_CLG(UChar r1, IRTemp op2addr)
   4024 {
   4025    IRTemp op1 = newTemp(Ity_I64);
   4026    IRTemp op2 = newTemp(Ity_I64);
   4027 
   4028    assign(op1, get_gpr_dw0(r1));
   4029    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   4030    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4031 
   4032    return "clg";
   4033 }
   4034 
   4035 static HChar *
   4036 s390_irgen_CLGF(UChar r1, IRTemp op2addr)
   4037 {
   4038    IRTemp op1 = newTemp(Ity_I64);
   4039    IRTemp op2 = newTemp(Ity_I64);
   4040 
   4041    assign(op1, get_gpr_dw0(r1));
   4042    assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
   4043    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4044 
   4045    return "clgf";
   4046 }
   4047 
   4048 static HChar *
   4049 s390_irgen_CLFI(UChar r1, UInt i2)
   4050 {
   4051    IRTemp op1 = newTemp(Ity_I32);
   4052    UInt op2;
   4053 
   4054    assign(op1, get_gpr_w1(r1));
   4055    op2 = i2;
   4056    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
   4057                        mkU32(op2)));
   4058 
   4059    return "clfi";
   4060 }
   4061 
   4062 static HChar *
   4063 s390_irgen_CLGFI(UChar r1, UInt i2)
   4064 {
   4065    IRTemp op1 = newTemp(Ity_I64);
   4066    ULong op2;
   4067 
   4068    assign(op1, get_gpr_dw0(r1));
   4069    op2 = (ULong)i2;
   4070    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
   4071                        mkU64(op2)));
   4072 
   4073    return "clgfi";
   4074 }
   4075 
   4076 static HChar *
   4077 s390_irgen_CLI(UChar i2, IRTemp op1addr)
   4078 {
   4079    IRTemp op1 = newTemp(Ity_I8);
   4080    UChar op2;
   4081 
   4082    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   4083    op2 = i2;
   4084    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
   4085                        mkU8(op2)));
   4086 
   4087    return "cli";
   4088 }
   4089 
   4090 static HChar *
   4091 s390_irgen_CLIY(UChar i2, IRTemp op1addr)
   4092 {
   4093    IRTemp op1 = newTemp(Ity_I8);
   4094    UChar op2;
   4095 
   4096    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   4097    op2 = i2;
   4098    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
   4099                        mkU8(op2)));
   4100 
   4101    return "cliy";
   4102 }
   4103 
   4104 static HChar *
   4105 s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
   4106 {
   4107    IRTemp op1 = newTemp(Ity_I32);
   4108    UInt op2;
   4109 
   4110    assign(op1, load(Ity_I32, mkexpr(op1addr)));
   4111    op2 = (UInt)i2;
   4112    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
   4113                        mkU32(op2)));
   4114 
   4115    return "clfhsi";
   4116 }
   4117 
   4118 static HChar *
   4119 s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
   4120 {
   4121    IRTemp op1 = newTemp(Ity_I64);
   4122    ULong op2;
   4123 
   4124    assign(op1, load(Ity_I64, mkexpr(op1addr)));
   4125    op2 = (ULong)i2;
   4126    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
   4127                        mkU64(op2)));
   4128 
   4129    return "clghsi";
   4130 }
   4131 
   4132 static HChar *
   4133 s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
   4134 {
   4135    IRTemp op1 = newTemp(Ity_I16);
   4136    UShort op2;
   4137 
   4138    assign(op1, load(Ity_I16, mkexpr(op1addr)));
   4139    op2 = i2;
   4140    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
   4141                        mkU16(op2)));
   4142 
   4143    return "clhhsi";
   4144 }
   4145 
   4146 static HChar *
   4147 s390_irgen_CLRL(UChar r1, UInt i2)
   4148 {
   4149    IRTemp op1 = newTemp(Ity_I32);
   4150    IRTemp op2 = newTemp(Ity_I32);
   4151 
   4152    assign(op1, get_gpr_w1(r1));
   4153    assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   4154           i2 << 1))));
   4155    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4156 
   4157    return "clrl";
   4158 }
   4159 
   4160 static HChar *
   4161 s390_irgen_CLGRL(UChar r1, UInt i2)
   4162 {
   4163    IRTemp op1 = newTemp(Ity_I64);
   4164    IRTemp op2 = newTemp(Ity_I64);
   4165 
   4166    assign(op1, get_gpr_dw0(r1));
   4167    assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   4168           i2 << 1))));
   4169    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4170 
   4171    return "clgrl";
   4172 }
   4173 
   4174 static HChar *
   4175 s390_irgen_CLGFRL(UChar r1, UInt i2)
   4176 {
   4177    IRTemp op1 = newTemp(Ity_I64);
   4178    IRTemp op2 = newTemp(Ity_I64);
   4179 
   4180    assign(op1, get_gpr_dw0(r1));
   4181    assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
   4182           ((ULong)(Long)(Int)i2 << 1)))));
   4183    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4184 
   4185    return "clgfrl";
   4186 }
   4187 
   4188 static HChar *
   4189 s390_irgen_CLHRL(UChar r1, UInt i2)
   4190 {
   4191    IRTemp op1 = newTemp(Ity_I32);
   4192    IRTemp op2 = newTemp(Ity_I32);
   4193 
   4194    assign(op1, get_gpr_w1(r1));
   4195    assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
   4196           ((ULong)(Long)(Int)i2 << 1)))));
   4197    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4198 
   4199    return "clhrl";
   4200 }
   4201 
   4202 static HChar *
   4203 s390_irgen_CLGHRL(UChar r1, UInt i2)
   4204 {
   4205    IRTemp op1 = newTemp(Ity_I64);
   4206    IRTemp op2 = newTemp(Ity_I64);
   4207 
   4208    assign(op1, get_gpr_dw0(r1));
   4209    assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
   4210           ((ULong)(Long)(Int)i2 << 1)))));
   4211    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4212 
   4213    return "clghrl";
   4214 }
   4215 
   4216 static HChar *
   4217 s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
   4218 {
   4219    IRTemp op1 = newTemp(Ity_I32);
   4220    IRTemp op2 = newTemp(Ity_I32);
   4221    IRTemp icc = newTemp(Ity_I32);
   4222    IRTemp cond = newTemp(Ity_I32);
   4223 
   4224    if (m3 == 0) {
   4225    } else {
   4226       if (m3 == 14) {
   4227          always_goto(mkexpr(op4addr));
   4228       } else {
   4229          assign(op1, get_gpr_w1(r1));
   4230          assign(op2, get_gpr_w1(r2));
   4231          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4232                 op2));
   4233          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4234                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4235          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   4236                                         mkU32(0)), mkexpr(op4addr));
   4237       }
   4238    }
   4239 
   4240    return "clrb";
   4241 }
   4242 
   4243 static HChar *
   4244 s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
   4245 {
   4246    IRTemp op1 = newTemp(Ity_I64);
   4247    IRTemp op2 = newTemp(Ity_I64);
   4248    IRTemp icc = newTemp(Ity_I32);
   4249    IRTemp cond = newTemp(Ity_I32);
   4250 
   4251    if (m3 == 0) {
   4252    } else {
   4253       if (m3 == 14) {
   4254          always_goto(mkexpr(op4addr));
   4255       } else {
   4256          assign(op1, get_gpr_dw0(r1));
   4257          assign(op2, get_gpr_dw0(r2));
   4258          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4259                 op2));
   4260          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4261                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4262          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   4263                                         mkU32(0)), mkexpr(op4addr));
   4264       }
   4265    }
   4266 
   4267    return "clgrb";
   4268 }
   4269 
   4270 static HChar *
   4271 s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
   4272 {
   4273    IRTemp op1 = newTemp(Ity_I32);
   4274    IRTemp op2 = newTemp(Ity_I32);
   4275    IRTemp icc = newTemp(Ity_I32);
   4276    IRTemp cond = newTemp(Ity_I32);
   4277 
   4278    if (m3 == 0) {
   4279    } else {
   4280       if (m3 == 14) {
   4281          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4282       } else {
   4283          assign(op1, get_gpr_w1(r1));
   4284          assign(op2, get_gpr_w1(r2));
   4285          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4286                 op2));
   4287          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4288                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4289          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   4290                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4291 
   4292       }
   4293    }
   4294 
   4295    return "clrj";
   4296 }
   4297 
   4298 static HChar *
   4299 s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
   4300 {
   4301    IRTemp op1 = newTemp(Ity_I64);
   4302    IRTemp op2 = newTemp(Ity_I64);
   4303    IRTemp icc = newTemp(Ity_I32);
   4304    IRTemp cond = newTemp(Ity_I32);
   4305 
   4306    if (m3 == 0) {
   4307    } else {
   4308       if (m3 == 14) {
   4309          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4310       } else {
   4311          assign(op1, get_gpr_dw0(r1));
   4312          assign(op2, get_gpr_dw0(r2));
   4313          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4314                 op2));
   4315          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4316                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4317          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   4318                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4319 
   4320       }
   4321    }
   4322 
   4323    return "clgrj";
   4324 }
   4325 
   4326 static HChar *
   4327 s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
   4328 {
   4329    IRTemp op1 = newTemp(Ity_I32);
   4330    UInt op2;
   4331    IRTemp icc = newTemp(Ity_I32);
   4332    IRTemp cond = newTemp(Ity_I32);
   4333 
   4334    if (m3 == 0) {
   4335    } else {
   4336       if (m3 == 14) {
   4337          always_goto(mkexpr(op4addr));
   4338       } else {
   4339          assign(op1, get_gpr_w1(r1));
   4340          op2 = (UInt)i2;
   4341          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4342                 mktemp(Ity_I32, mkU32(op2))));
   4343          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4344                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4345          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   4346                                         mkU32(0)), mkexpr(op4addr));
   4347       }
   4348    }
   4349 
   4350    return "clib";
   4351 }
   4352 
   4353 static HChar *
   4354 s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
   4355 {
   4356    IRTemp op1 = newTemp(Ity_I64);
   4357    ULong op2;
   4358    IRTemp icc = newTemp(Ity_I32);
   4359    IRTemp cond = newTemp(Ity_I32);
   4360 
   4361    if (m3 == 0) {
   4362    } else {
   4363       if (m3 == 14) {
   4364          always_goto(mkexpr(op4addr));
   4365       } else {
   4366          assign(op1, get_gpr_dw0(r1));
   4367          op2 = (ULong)i2;
   4368          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4369                 mktemp(Ity_I64, mkU64(op2))));
   4370          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4371                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4372          if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
   4373                                         mkU32(0)), mkexpr(op4addr));
   4374       }
   4375    }
   4376 
   4377    return "clgib";
   4378 }
   4379 
   4380 static HChar *
   4381 s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
   4382 {
   4383    IRTemp op1 = newTemp(Ity_I32);
   4384    UInt op2;
   4385    IRTemp icc = newTemp(Ity_I32);
   4386    IRTemp cond = newTemp(Ity_I32);
   4387 
   4388    if (m3 == 0) {
   4389    } else {
   4390       if (m3 == 14) {
   4391          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4392       } else {
   4393          assign(op1, get_gpr_w1(r1));
   4394          op2 = (UInt)i2;
   4395          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4396                 mktemp(Ity_I32, mkU32(op2))));
   4397          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4398                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4399          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   4400                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4401 
   4402       }
   4403    }
   4404 
   4405    return "clij";
   4406 }
   4407 
   4408 static HChar *
   4409 s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
   4410 {
   4411    IRTemp op1 = newTemp(Ity_I64);
   4412    ULong op2;
   4413    IRTemp icc = newTemp(Ity_I32);
   4414    IRTemp cond = newTemp(Ity_I32);
   4415 
   4416    if (m3 == 0) {
   4417    } else {
   4418       if (m3 == 14) {
   4419          always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4420       } else {
   4421          assign(op1, get_gpr_dw0(r1));
   4422          op2 = (ULong)i2;
   4423          assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
   4424                 mktemp(Ity_I64, mkU64(op2))));
   4425          assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
   4426                 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
   4427          if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
   4428                            guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
   4429 
   4430       }
   4431    }
   4432 
   4433    return "clgij";
   4434 }
   4435 
   4436 static HChar *
   4437 s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
   4438 {
   4439    IRTemp op1 = newTemp(Ity_I32);
   4440    IRTemp op2 = newTemp(Ity_I32);
   4441    IRTemp b0 = newTemp(Ity_I32);
   4442    IRTemp b1 = newTemp(Ity_I32);
   4443    IRTemp b2 = newTemp(Ity_I32);
   4444    IRTemp b3 = newTemp(Ity_I32);
   4445    IRTemp c0 = newTemp(Ity_I32);
   4446    IRTemp c1 = newTemp(Ity_I32);
   4447    IRTemp c2 = newTemp(Ity_I32);
   4448    IRTemp c3 = newTemp(Ity_I32);
   4449    UChar n;
   4450 
   4451    n = 0;
   4452    if ((r3 & 8) != 0) {
   4453       assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
   4454       assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
   4455       n = n + 1;
   4456    } else {
   4457       assign(b0, mkU32(0));
   4458       assign(c0, mkU32(0));
   4459    }
   4460    if ((r3 & 4) != 0) {
   4461       assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
   4462       assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4463              mkU64(n)))));
   4464       n = n + 1;
   4465    } else {
   4466       assign(b1, mkU32(0));
   4467       assign(c1, mkU32(0));
   4468    }
   4469    if ((r3 & 2) != 0) {
   4470       assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
   4471       assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4472              mkU64(n)))));
   4473       n = n + 1;
   4474    } else {
   4475       assign(b2, mkU32(0));
   4476       assign(c2, mkU32(0));
   4477    }
   4478    if ((r3 & 1) != 0) {
   4479       assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
   4480       assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4481              mkU64(n)))));
   4482       n = n + 1;
   4483    } else {
   4484       assign(b3, mkU32(0));
   4485       assign(c3, mkU32(0));
   4486    }
   4487    assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4488           mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
   4489           binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
   4490    assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4491           mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
   4492           binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
   4493    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4494 
   4495    return "clm";
   4496 }
   4497 
   4498 static HChar *
   4499 s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
   4500 {
   4501    IRTemp op1 = newTemp(Ity_I32);
   4502    IRTemp op2 = newTemp(Ity_I32);
   4503    IRTemp b0 = newTemp(Ity_I32);
   4504    IRTemp b1 = newTemp(Ity_I32);
   4505    IRTemp b2 = newTemp(Ity_I32);
   4506    IRTemp b3 = newTemp(Ity_I32);
   4507    IRTemp c0 = newTemp(Ity_I32);
   4508    IRTemp c1 = newTemp(Ity_I32);
   4509    IRTemp c2 = newTemp(Ity_I32);
   4510    IRTemp c3 = newTemp(Ity_I32);
   4511    UChar n;
   4512 
   4513    n = 0;
   4514    if ((r3 & 8) != 0) {
   4515       assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
   4516       assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
   4517       n = n + 1;
   4518    } else {
   4519       assign(b0, mkU32(0));
   4520       assign(c0, mkU32(0));
   4521    }
   4522    if ((r3 & 4) != 0) {
   4523       assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
   4524       assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4525              mkU64(n)))));
   4526       n = n + 1;
   4527    } else {
   4528       assign(b1, mkU32(0));
   4529       assign(c1, mkU32(0));
   4530    }
   4531    if ((r3 & 2) != 0) {
   4532       assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
   4533       assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4534              mkU64(n)))));
   4535       n = n + 1;
   4536    } else {
   4537       assign(b2, mkU32(0));
   4538       assign(c2, mkU32(0));
   4539    }
   4540    if ((r3 & 1) != 0) {
   4541       assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
   4542       assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4543              mkU64(n)))));
   4544       n = n + 1;
   4545    } else {
   4546       assign(b3, mkU32(0));
   4547       assign(c3, mkU32(0));
   4548    }
   4549    assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4550           mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
   4551           binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
   4552    assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4553           mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
   4554           binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
   4555    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4556 
   4557    return "clmy";
   4558 }
   4559 
   4560 static HChar *
   4561 s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
   4562 {
   4563    IRTemp op1 = newTemp(Ity_I32);
   4564    IRTemp op2 = newTemp(Ity_I32);
   4565    IRTemp b0 = newTemp(Ity_I32);
   4566    IRTemp b1 = newTemp(Ity_I32);
   4567    IRTemp b2 = newTemp(Ity_I32);
   4568    IRTemp b3 = newTemp(Ity_I32);
   4569    IRTemp c0 = newTemp(Ity_I32);
   4570    IRTemp c1 = newTemp(Ity_I32);
   4571    IRTemp c2 = newTemp(Ity_I32);
   4572    IRTemp c3 = newTemp(Ity_I32);
   4573    UChar n;
   4574 
   4575    n = 0;
   4576    if ((r3 & 8) != 0) {
   4577       assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
   4578       assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
   4579       n = n + 1;
   4580    } else {
   4581       assign(b0, mkU32(0));
   4582       assign(c0, mkU32(0));
   4583    }
   4584    if ((r3 & 4) != 0) {
   4585       assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
   4586       assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4587              mkU64(n)))));
   4588       n = n + 1;
   4589    } else {
   4590       assign(b1, mkU32(0));
   4591       assign(c1, mkU32(0));
   4592    }
   4593    if ((r3 & 2) != 0) {
   4594       assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
   4595       assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4596              mkU64(n)))));
   4597       n = n + 1;
   4598    } else {
   4599       assign(b2, mkU32(0));
   4600       assign(c2, mkU32(0));
   4601    }
   4602    if ((r3 & 1) != 0) {
   4603       assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
   4604       assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
   4605              mkU64(n)))));
   4606       n = n + 1;
   4607    } else {
   4608       assign(b3, mkU32(0));
   4609       assign(c3, mkU32(0));
   4610    }
   4611    assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4612           mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
   4613           binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
   4614    assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
   4615           mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
   4616           binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
   4617    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4618 
   4619    return "clmh";
   4620 }
   4621 
   4622 static HChar *
   4623 s390_irgen_CLHHR(UChar r1, UChar r2)
   4624 {
   4625    IRTemp op1 = newTemp(Ity_I32);
   4626    IRTemp op2 = newTemp(Ity_I32);
   4627 
   4628    assign(op1, get_gpr_w0(r1));
   4629    assign(op2, get_gpr_w0(r2));
   4630    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4631 
   4632    return "clhhr";
   4633 }
   4634 
   4635 static HChar *
   4636 s390_irgen_CLHLR(UChar r1, UChar r2)
   4637 {
   4638    IRTemp op1 = newTemp(Ity_I32);
   4639    IRTemp op2 = newTemp(Ity_I32);
   4640 
   4641    assign(op1, get_gpr_w0(r1));
   4642    assign(op2, get_gpr_w1(r2));
   4643    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4644 
   4645    return "clhlr";
   4646 }
   4647 
   4648 static HChar *
   4649 s390_irgen_CLHF(UChar r1, IRTemp op2addr)
   4650 {
   4651    IRTemp op1 = newTemp(Ity_I32);
   4652    IRTemp op2 = newTemp(Ity_I32);
   4653 
   4654    assign(op1, get_gpr_w0(r1));
   4655    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   4656    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
   4657 
   4658    return "clhf";
   4659 }
   4660 
   4661 static HChar *
   4662 s390_irgen_CLIH(UChar r1, UInt i2)
   4663 {
   4664    IRTemp op1 = newTemp(Ity_I32);
   4665    UInt op2;
   4666 
   4667    assign(op1, get_gpr_w0(r1));
   4668    op2 = i2;
   4669    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
   4670                        mkU32(op2)));
   4671 
   4672    return "clih";
   4673 }
   4674 
   4675 static HChar *
   4676 s390_irgen_CPYA(UChar r1, UChar r2)
   4677 {
   4678    put_ar_w0(r1, get_ar_w0(r2));
   4679    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   4680       s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
   4681 
   4682    return "cpya";
   4683 }
   4684 
   4685 static HChar *
   4686 s390_irgen_XR(UChar r1, UChar r2)
   4687 {
   4688    IRTemp op1 = newTemp(Ity_I32);
   4689    IRTemp op2 = newTemp(Ity_I32);
   4690    IRTemp result = newTemp(Ity_I32);
   4691 
   4692    if (r1 == r2) {
   4693       assign(result, mkU32(0));
   4694    } else {
   4695       assign(op1, get_gpr_w1(r1));
   4696       assign(op2, get_gpr_w1(r2));
   4697       assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
   4698    }
   4699    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4700    put_gpr_w1(r1, mkexpr(result));
   4701 
   4702    return "xr";
   4703 }
   4704 
   4705 static HChar *
   4706 s390_irgen_XGR(UChar r1, UChar r2)
   4707 {
   4708    IRTemp op1 = newTemp(Ity_I64);
   4709    IRTemp op2 = newTemp(Ity_I64);
   4710    IRTemp result = newTemp(Ity_I64);
   4711 
   4712    if (r1 == r2) {
   4713       assign(result, mkU64(0));
   4714    } else {
   4715       assign(op1, get_gpr_dw0(r1));
   4716       assign(op2, get_gpr_dw0(r2));
   4717       assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
   4718    }
   4719    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4720    put_gpr_dw0(r1, mkexpr(result));
   4721 
   4722    return "xgr";
   4723 }
   4724 
   4725 static HChar *
   4726 s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
   4727 {
   4728    IRTemp op2 = newTemp(Ity_I32);
   4729    IRTemp op3 = newTemp(Ity_I32);
   4730    IRTemp result = newTemp(Ity_I32);
   4731 
   4732    assign(op2, get_gpr_w1(r2));
   4733    assign(op3, get_gpr_w1(r3));
   4734    assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
   4735    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4736    put_gpr_w1(r1, mkexpr(result));
   4737 
   4738    return "xrk";
   4739 }
   4740 
   4741 static HChar *
   4742 s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
   4743 {
   4744    IRTemp op2 = newTemp(Ity_I64);
   4745    IRTemp op3 = newTemp(Ity_I64);
   4746    IRTemp result = newTemp(Ity_I64);
   4747 
   4748    assign(op2, get_gpr_dw0(r2));
   4749    assign(op3, get_gpr_dw0(r3));
   4750    assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
   4751    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4752    put_gpr_dw0(r1, mkexpr(result));
   4753 
   4754    return "xgrk";
   4755 }
   4756 
   4757 static HChar *
   4758 s390_irgen_X(UChar r1, IRTemp op2addr)
   4759 {
   4760    IRTemp op1 = newTemp(Ity_I32);
   4761    IRTemp op2 = newTemp(Ity_I32);
   4762    IRTemp result = newTemp(Ity_I32);
   4763 
   4764    assign(op1, get_gpr_w1(r1));
   4765    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   4766    assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
   4767    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4768    put_gpr_w1(r1, mkexpr(result));
   4769 
   4770    return "x";
   4771 }
   4772 
   4773 static HChar *
   4774 s390_irgen_XY(UChar r1, IRTemp op2addr)
   4775 {
   4776    IRTemp op1 = newTemp(Ity_I32);
   4777    IRTemp op2 = newTemp(Ity_I32);
   4778    IRTemp result = newTemp(Ity_I32);
   4779 
   4780    assign(op1, get_gpr_w1(r1));
   4781    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   4782    assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
   4783    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4784    put_gpr_w1(r1, mkexpr(result));
   4785 
   4786    return "xy";
   4787 }
   4788 
   4789 static HChar *
   4790 s390_irgen_XG(UChar r1, IRTemp op2addr)
   4791 {
   4792    IRTemp op1 = newTemp(Ity_I64);
   4793    IRTemp op2 = newTemp(Ity_I64);
   4794    IRTemp result = newTemp(Ity_I64);
   4795 
   4796    assign(op1, get_gpr_dw0(r1));
   4797    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   4798    assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
   4799    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4800    put_gpr_dw0(r1, mkexpr(result));
   4801 
   4802    return "xg";
   4803 }
   4804 
   4805 static HChar *
   4806 s390_irgen_XI(UChar i2, IRTemp op1addr)
   4807 {
   4808    IRTemp op1 = newTemp(Ity_I8);
   4809    UChar op2;
   4810    IRTemp result = newTemp(Ity_I8);
   4811 
   4812    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   4813    op2 = i2;
   4814    assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
   4815    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4816    store(mkexpr(op1addr), mkexpr(result));
   4817 
   4818    return "xi";
   4819 }
   4820 
   4821 static HChar *
   4822 s390_irgen_XIY(UChar i2, IRTemp op1addr)
   4823 {
   4824    IRTemp op1 = newTemp(Ity_I8);
   4825    UChar op2;
   4826    IRTemp result = newTemp(Ity_I8);
   4827 
   4828    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   4829    op2 = i2;
   4830    assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
   4831    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4832    store(mkexpr(op1addr), mkexpr(result));
   4833 
   4834    return "xiy";
   4835 }
   4836 
   4837 static HChar *
   4838 s390_irgen_XIHF(UChar r1, UInt i2)
   4839 {
   4840    IRTemp op1 = newTemp(Ity_I32);
   4841    UInt op2;
   4842    IRTemp result = newTemp(Ity_I32);
   4843 
   4844    assign(op1, get_gpr_w0(r1));
   4845    op2 = i2;
   4846    assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
   4847    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4848    put_gpr_w0(r1, mkexpr(result));
   4849 
   4850    return "xihf";
   4851 }
   4852 
   4853 static HChar *
   4854 s390_irgen_XILF(UChar r1, UInt i2)
   4855 {
   4856    IRTemp op1 = newTemp(Ity_I32);
   4857    UInt op2;
   4858    IRTemp result = newTemp(Ity_I32);
   4859 
   4860    assign(op1, get_gpr_w1(r1));
   4861    op2 = i2;
   4862    assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
   4863    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   4864    put_gpr_w1(r1, mkexpr(result));
   4865 
   4866    return "xilf";
   4867 }
   4868 
   4869 static HChar *
   4870 s390_irgen_EAR(UChar r1, UChar r2)
   4871 {
   4872    put_gpr_w1(r1, get_ar_w0(r2));
   4873    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   4874       s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
   4875 
   4876    return "ear";
   4877 }
   4878 
   4879 static HChar *
   4880 s390_irgen_IC(UChar r1, IRTemp op2addr)
   4881 {
   4882    put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
   4883 
   4884    return "ic";
   4885 }
   4886 
   4887 static HChar *
   4888 s390_irgen_ICY(UChar r1, IRTemp op2addr)
   4889 {
   4890    put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
   4891 
   4892    return "icy";
   4893 }
   4894 
   4895 static HChar *
   4896 s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
   4897 {
   4898    UChar n;
   4899    IRTemp result = newTemp(Ity_I32);
   4900    UInt mask;
   4901 
   4902    n = 0;
   4903    mask = (UInt)r3;
   4904    if ((mask & 8) != 0) {
   4905       put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
   4906       n = n + 1;
   4907    }
   4908    if ((mask & 4) != 0) {
   4909       put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4910 
   4911       n = n + 1;
   4912    }
   4913    if ((mask & 2) != 0) {
   4914       put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4915 
   4916       n = n + 1;
   4917    }
   4918    if ((mask & 1) != 0) {
   4919       put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4920 
   4921       n = n + 1;
   4922    }
   4923    assign(result, get_gpr_w1(r1));
   4924    s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
   4925                        mkU32(mask)));
   4926 
   4927    return "icm";
   4928 }
   4929 
   4930 static HChar *
   4931 s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
   4932 {
   4933    UChar n;
   4934    IRTemp result = newTemp(Ity_I32);
   4935    UInt mask;
   4936 
   4937    n = 0;
   4938    mask = (UInt)r3;
   4939    if ((mask & 8) != 0) {
   4940       put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
   4941       n = n + 1;
   4942    }
   4943    if ((mask & 4) != 0) {
   4944       put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4945 
   4946       n = n + 1;
   4947    }
   4948    if ((mask & 2) != 0) {
   4949       put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4950 
   4951       n = n + 1;
   4952    }
   4953    if ((mask & 1) != 0) {
   4954       put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4955 
   4956       n = n + 1;
   4957    }
   4958    assign(result, get_gpr_w1(r1));
   4959    s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
   4960                        mkU32(mask)));
   4961 
   4962    return "icmy";
   4963 }
   4964 
   4965 static HChar *
   4966 s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
   4967 {
   4968    UChar n;
   4969    IRTemp result = newTemp(Ity_I32);
   4970    UInt mask;
   4971 
   4972    n = 0;
   4973    mask = (UInt)r3;
   4974    if ((mask & 8) != 0) {
   4975       put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
   4976       n = n + 1;
   4977    }
   4978    if ((mask & 4) != 0) {
   4979       put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4980 
   4981       n = n + 1;
   4982    }
   4983    if ((mask & 2) != 0) {
   4984       put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4985 
   4986       n = n + 1;
   4987    }
   4988    if ((mask & 1) != 0) {
   4989       put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
   4990 
   4991       n = n + 1;
   4992    }
   4993    assign(result, get_gpr_w0(r1));
   4994    s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
   4995                        mkU32(mask)));
   4996 
   4997    return "icmh";
   4998 }
   4999 
   5000 static HChar *
   5001 s390_irgen_IIHF(UChar r1, UInt i2)
   5002 {
   5003    put_gpr_w0(r1, mkU32(i2));
   5004 
   5005    return "iihf";
   5006 }
   5007 
   5008 static HChar *
   5009 s390_irgen_IIHH(UChar r1, UShort i2)
   5010 {
   5011    put_gpr_hw0(r1, mkU16(i2));
   5012 
   5013    return "iihh";
   5014 }
   5015 
   5016 static HChar *
   5017 s390_irgen_IIHL(UChar r1, UShort i2)
   5018 {
   5019    put_gpr_hw1(r1, mkU16(i2));
   5020 
   5021    return "iihl";
   5022 }
   5023 
   5024 static HChar *
   5025 s390_irgen_IILF(UChar r1, UInt i2)
   5026 {
   5027    put_gpr_w1(r1, mkU32(i2));
   5028 
   5029    return "iilf";
   5030 }
   5031 
   5032 static HChar *
   5033 s390_irgen_IILH(UChar r1, UShort i2)
   5034 {
   5035    put_gpr_hw2(r1, mkU16(i2));
   5036 
   5037    return "iilh";
   5038 }
   5039 
   5040 static HChar *
   5041 s390_irgen_IILL(UChar r1, UShort i2)
   5042 {
   5043    put_gpr_hw3(r1, mkU16(i2));
   5044 
   5045    return "iill";
   5046 }
   5047 
   5048 static HChar *
   5049 s390_irgen_LR(UChar r1, UChar r2)
   5050 {
   5051    put_gpr_w1(r1, get_gpr_w1(r2));
   5052 
   5053    return "lr";
   5054 }
   5055 
   5056 static HChar *
   5057 s390_irgen_LGR(UChar r1, UChar r2)
   5058 {
   5059    put_gpr_dw0(r1, get_gpr_dw0(r2));
   5060 
   5061    return "lgr";
   5062 }
   5063 
   5064 static HChar *
   5065 s390_irgen_LGFR(UChar r1, UChar r2)
   5066 {
   5067    put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
   5068 
   5069    return "lgfr";
   5070 }
   5071 
   5072 static HChar *
   5073 s390_irgen_L(UChar r1, IRTemp op2addr)
   5074 {
   5075    put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
   5076 
   5077    return "l";
   5078 }
   5079 
   5080 static HChar *
   5081 s390_irgen_LY(UChar r1, IRTemp op2addr)
   5082 {
   5083    put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
   5084 
   5085    return "ly";
   5086 }
   5087 
   5088 static HChar *
   5089 s390_irgen_LG(UChar r1, IRTemp op2addr)
   5090 {
   5091    put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
   5092 
   5093    return "lg";
   5094 }
   5095 
   5096 static HChar *
   5097 s390_irgen_LGF(UChar r1, IRTemp op2addr)
   5098 {
   5099    put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   5100 
   5101    return "lgf";
   5102 }
   5103 
   5104 static HChar *
   5105 s390_irgen_LGFI(UChar r1, UInt i2)
   5106 {
   5107    put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
   5108 
   5109    return "lgfi";
   5110 }
   5111 
   5112 static HChar *
   5113 s390_irgen_LRL(UChar r1, UInt i2)
   5114 {
   5115    put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   5116               i2 << 1))));
   5117 
   5118    return "lrl";
   5119 }
   5120 
   5121 static HChar *
   5122 s390_irgen_LGRL(UChar r1, UInt i2)
   5123 {
   5124    put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
   5125                i2 << 1))));
   5126 
   5127    return "lgrl";
   5128 }
   5129 
   5130 static HChar *
   5131 s390_irgen_LGFRL(UChar r1, UInt i2)
   5132 {
   5133    put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
   5134                ((ULong)(Long)(Int)i2 << 1)))));
   5135 
   5136    return "lgfrl";
   5137 }
   5138 
   5139 static HChar *
   5140 s390_irgen_LA(UChar r1, IRTemp op2addr)
   5141 {
   5142    put_gpr_dw0(r1, mkexpr(op2addr));
   5143 
   5144    return "la";
   5145 }
   5146 
   5147 static HChar *
   5148 s390_irgen_LAY(UChar r1, IRTemp op2addr)
   5149 {
   5150    put_gpr_dw0(r1, mkexpr(op2addr));
   5151 
   5152    return "lay";
   5153 }
   5154 
   5155 static HChar *
   5156 s390_irgen_LAE(UChar r1, IRTemp op2addr)
   5157 {
   5158    put_gpr_dw0(r1, mkexpr(op2addr));
   5159 
   5160    return "lae";
   5161 }
   5162 
   5163 static HChar *
   5164 s390_irgen_LAEY(UChar r1, IRTemp op2addr)
   5165 {
   5166    put_gpr_dw0(r1, mkexpr(op2addr));
   5167 
   5168    return "laey";
   5169 }
   5170 
   5171 static HChar *
   5172 s390_irgen_LARL(UChar r1, UInt i2)
   5173 {
   5174    put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
   5175 
   5176    return "larl";
   5177 }
   5178 
   5179 static HChar *
   5180 s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
   5181 {
   5182    IRTemp op2 = newTemp(Ity_I32);
   5183    IRTemp op3 = newTemp(Ity_I32);
   5184    IRTemp result = newTemp(Ity_I32);
   5185 
   5186    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5187    assign(op3, get_gpr_w1(r3));
   5188    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   5189    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
   5190    store(mkexpr(op2addr), mkexpr(result));
   5191    put_gpr_w1(r1, mkexpr(op2));
   5192 
   5193    return "laa";
   5194 }
   5195 
   5196 static HChar *
   5197 s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
   5198 {
   5199    IRTemp op2 = newTemp(Ity_I64);
   5200    IRTemp op3 = newTemp(Ity_I64);
   5201    IRTemp result = newTemp(Ity_I64);
   5202 
   5203    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5204    assign(op3, get_gpr_dw0(r3));
   5205    assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
   5206    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
   5207    store(mkexpr(op2addr), mkexpr(result));
   5208    put_gpr_dw0(r1, mkexpr(op2));
   5209 
   5210    return "laag";
   5211 }
   5212 
   5213 static HChar *
   5214 s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
   5215 {
   5216    IRTemp op2 = newTemp(Ity_I32);
   5217    IRTemp op3 = newTemp(Ity_I32);
   5218    IRTemp result = newTemp(Ity_I32);
   5219 
   5220    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5221    assign(op3, get_gpr_w1(r3));
   5222    assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
   5223    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
   5224    store(mkexpr(op2addr), mkexpr(result));
   5225    put_gpr_w1(r1, mkexpr(op2));
   5226 
   5227    return "laal";
   5228 }
   5229 
   5230 static HChar *
   5231 s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
   5232 {
   5233    IRTemp op2 = newTemp(Ity_I64);
   5234    IRTemp op3 = newTemp(Ity_I64);
   5235    IRTemp result = newTemp(Ity_I64);
   5236 
   5237    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5238    assign(op3, get_gpr_dw0(r3));
   5239    assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
   5240    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
   5241    store(mkexpr(op2addr), mkexpr(result));
   5242    put_gpr_dw0(r1, mkexpr(op2));
   5243 
   5244    return "laalg";
   5245 }
   5246 
   5247 static HChar *
   5248 s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
   5249 {
   5250    IRTemp op2 = newTemp(Ity_I32);
   5251    IRTemp op3 = newTemp(Ity_I32);
   5252    IRTemp result = newTemp(Ity_I32);
   5253 
   5254    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5255    assign(op3, get_gpr_w1(r3));
   5256    assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
   5257    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5258    store(mkexpr(op2addr), mkexpr(result));
   5259    put_gpr_w1(r1, mkexpr(op2));
   5260 
   5261    return "lan";
   5262 }
   5263 
   5264 static HChar *
   5265 s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
   5266 {
   5267    IRTemp op2 = newTemp(Ity_I64);
   5268    IRTemp op3 = newTemp(Ity_I64);
   5269    IRTemp result = newTemp(Ity_I64);
   5270 
   5271    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5272    assign(op3, get_gpr_dw0(r3));
   5273    assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
   5274    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5275    store(mkexpr(op2addr), mkexpr(result));
   5276    put_gpr_dw0(r1, mkexpr(op2));
   5277 
   5278    return "lang";
   5279 }
   5280 
   5281 static HChar *
   5282 s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
   5283 {
   5284    IRTemp op2 = newTemp(Ity_I32);
   5285    IRTemp op3 = newTemp(Ity_I32);
   5286    IRTemp result = newTemp(Ity_I32);
   5287 
   5288    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5289    assign(op3, get_gpr_w1(r3));
   5290    assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
   5291    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5292    store(mkexpr(op2addr), mkexpr(result));
   5293    put_gpr_w1(r1, mkexpr(op2));
   5294 
   5295    return "lax";
   5296 }
   5297 
   5298 static HChar *
   5299 s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
   5300 {
   5301    IRTemp op2 = newTemp(Ity_I64);
   5302    IRTemp op3 = newTemp(Ity_I64);
   5303    IRTemp result = newTemp(Ity_I64);
   5304 
   5305    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5306    assign(op3, get_gpr_dw0(r3));
   5307    assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
   5308    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5309    store(mkexpr(op2addr), mkexpr(result));
   5310    put_gpr_dw0(r1, mkexpr(op2));
   5311 
   5312    return "laxg";
   5313 }
   5314 
   5315 static HChar *
   5316 s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
   5317 {
   5318    IRTemp op2 = newTemp(Ity_I32);
   5319    IRTemp op3 = newTemp(Ity_I32);
   5320    IRTemp result = newTemp(Ity_I32);
   5321 
   5322    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5323    assign(op3, get_gpr_w1(r3));
   5324    assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
   5325    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5326    store(mkexpr(op2addr), mkexpr(result));
   5327    put_gpr_w1(r1, mkexpr(op2));
   5328 
   5329    return "lao";
   5330 }
   5331 
   5332 static HChar *
   5333 s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
   5334 {
   5335    IRTemp op2 = newTemp(Ity_I64);
   5336    IRTemp op3 = newTemp(Ity_I64);
   5337    IRTemp result = newTemp(Ity_I64);
   5338 
   5339    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5340    assign(op3, get_gpr_dw0(r3));
   5341    assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
   5342    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   5343    store(mkexpr(op2addr), mkexpr(result));
   5344    put_gpr_dw0(r1, mkexpr(op2));
   5345 
   5346    return "laog";
   5347 }
   5348 
   5349 static HChar *
   5350 s390_irgen_LTR(UChar r1, UChar r2)
   5351 {
   5352    IRTemp op2 = newTemp(Ity_I32);
   5353 
   5354    assign(op2, get_gpr_w1(r2));
   5355    put_gpr_w1(r1, mkexpr(op2));
   5356    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5357 
   5358    return "ltr";
   5359 }
   5360 
   5361 static HChar *
   5362 s390_irgen_LTGR(UChar r1, UChar r2)
   5363 {
   5364    IRTemp op2 = newTemp(Ity_I64);
   5365 
   5366    assign(op2, get_gpr_dw0(r2));
   5367    put_gpr_dw0(r1, mkexpr(op2));
   5368    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5369 
   5370    return "ltgr";
   5371 }
   5372 
   5373 static HChar *
   5374 s390_irgen_LTGFR(UChar r1, UChar r2)
   5375 {
   5376    IRTemp op2 = newTemp(Ity_I64);
   5377 
   5378    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   5379    put_gpr_dw0(r1, mkexpr(op2));
   5380    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5381 
   5382    return "ltgfr";
   5383 }
   5384 
   5385 static HChar *
   5386 s390_irgen_LT(UChar r1, IRTemp op2addr)
   5387 {
   5388    IRTemp op2 = newTemp(Ity_I32);
   5389 
   5390    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5391    put_gpr_w1(r1, mkexpr(op2));
   5392    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5393 
   5394    return "lt";
   5395 }
   5396 
   5397 static HChar *
   5398 s390_irgen_LTG(UChar r1, IRTemp op2addr)
   5399 {
   5400    IRTemp op2 = newTemp(Ity_I64);
   5401 
   5402    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   5403    put_gpr_dw0(r1, mkexpr(op2));
   5404    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5405 
   5406    return "ltg";
   5407 }
   5408 
   5409 static HChar *
   5410 s390_irgen_LTGF(UChar r1, IRTemp op2addr)
   5411 {
   5412    IRTemp op2 = newTemp(Ity_I64);
   5413 
   5414    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   5415    put_gpr_dw0(r1, mkexpr(op2));
   5416    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   5417 
   5418    return "ltgf";
   5419 }
   5420 
   5421 static HChar *
   5422 s390_irgen_LBR(UChar r1, UChar r2)
   5423 {
   5424    put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
   5425 
   5426    return "lbr";
   5427 }
   5428 
   5429 static HChar *
   5430 s390_irgen_LGBR(UChar r1, UChar r2)
   5431 {
   5432    put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
   5433 
   5434    return "lgbr";
   5435 }
   5436 
   5437 static HChar *
   5438 s390_irgen_LB(UChar r1, IRTemp op2addr)
   5439 {
   5440    put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
   5441 
   5442    return "lb";
   5443 }
   5444 
   5445 static HChar *
   5446 s390_irgen_LGB(UChar r1, IRTemp op2addr)
   5447 {
   5448    put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
   5449 
   5450    return "lgb";
   5451 }
   5452 
   5453 static HChar *
   5454 s390_irgen_LBH(UChar r1, IRTemp op2addr)
   5455 {
   5456    put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
   5457 
   5458    return "lbh";
   5459 }
   5460 
   5461 static HChar *
   5462 s390_irgen_LCR(UChar r1, UChar r2)
   5463 {
   5464    Int op1;
   5465    IRTemp op2 = newTemp(Ity_I32);
   5466    IRTemp result = newTemp(Ity_I32);
   5467 
   5468    op1 = 0;
   5469    assign(op2, get_gpr_w1(r2));
   5470    assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
   5471    put_gpr_w1(r1, mkexpr(result));
   5472    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
   5473                        op1)), op2);
   5474 
   5475    return "lcr";
   5476 }
   5477 
   5478 static HChar *
   5479 s390_irgen_LCGR(UChar r1, UChar r2)
   5480 {
   5481    Long op1;
   5482    IRTemp op2 = newTemp(Ity_I64);
   5483    IRTemp result = newTemp(Ity_I64);
   5484 
   5485    op1 = 0ULL;
   5486    assign(op2, get_gpr_dw0(r2));
   5487    assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
   5488    put_gpr_dw0(r1, mkexpr(result));
   5489    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
   5490                        op1)), op2);
   5491 
   5492    return "lcgr";
   5493 }
   5494 
   5495 static HChar *
   5496 s390_irgen_LCGFR(UChar r1, UChar r2)
   5497 {
   5498    Long op1;
   5499    IRTemp op2 = newTemp(Ity_I64);
   5500    IRTemp result = newTemp(Ity_I64);
   5501 
   5502    op1 = 0ULL;
   5503    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   5504    assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
   5505    put_gpr_dw0(r1, mkexpr(result));
   5506    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
   5507                        op1)), op2);
   5508 
   5509    return "lcgfr";
   5510 }
   5511 
   5512 static HChar *
   5513 s390_irgen_LHR(UChar r1, UChar r2)
   5514 {
   5515    put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
   5516 
   5517    return "lhr";
   5518 }
   5519 
   5520 static HChar *
   5521 s390_irgen_LGHR(UChar r1, UChar r2)
   5522 {
   5523    put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
   5524 
   5525    return "lghr";
   5526 }
   5527 
   5528 static HChar *
   5529 s390_irgen_LH(UChar r1, IRTemp op2addr)
   5530 {
   5531    put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   5532 
   5533    return "lh";
   5534 }
   5535 
   5536 static HChar *
   5537 s390_irgen_LHY(UChar r1, IRTemp op2addr)
   5538 {
   5539    put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   5540 
   5541    return "lhy";
   5542 }
   5543 
   5544 static HChar *
   5545 s390_irgen_LGH(UChar r1, IRTemp op2addr)
   5546 {
   5547    put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
   5548 
   5549    return "lgh";
   5550 }
   5551 
   5552 static HChar *
   5553 s390_irgen_LHI(UChar r1, UShort i2)
   5554 {
   5555    put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
   5556 
   5557    return "lhi";
   5558 }
   5559 
   5560 static HChar *
   5561 s390_irgen_LGHI(UChar r1, UShort i2)
   5562 {
   5563    put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
   5564 
   5565    return "lghi";
   5566 }
   5567 
   5568 static HChar *
   5569 s390_irgen_LHRL(UChar r1, UInt i2)
   5570 {
   5571    put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
   5572               ((ULong)(Long)(Int)i2 << 1)))));
   5573 
   5574    return "lhrl";
   5575 }
   5576 
   5577 static HChar *
   5578 s390_irgen_LGHRL(UChar r1, UInt i2)
   5579 {
   5580    put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
   5581                ((ULong)(Long)(Int)i2 << 1)))));
   5582 
   5583    return "lghrl";
   5584 }
   5585 
   5586 static HChar *
   5587 s390_irgen_LHH(UChar r1, IRTemp op2addr)
   5588 {
   5589    put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   5590 
   5591    return "lhh";
   5592 }
   5593 
   5594 static HChar *
   5595 s390_irgen_LFH(UChar r1, IRTemp op2addr)
   5596 {
   5597    put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
   5598 
   5599    return "lfh";
   5600 }
   5601 
   5602 static HChar *
   5603 s390_irgen_LLGFR(UChar r1, UChar r2)
   5604 {
   5605    put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
   5606 
   5607    return "llgfr";
   5608 }
   5609 
   5610 static HChar *
   5611 s390_irgen_LLGF(UChar r1, IRTemp op2addr)
   5612 {
   5613    put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
   5614 
   5615    return "llgf";
   5616 }
   5617 
   5618 static HChar *
   5619 s390_irgen_LLGFRL(UChar r1, UInt i2)
   5620 {
   5621    put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
   5622                ((ULong)(Long)(Int)i2 << 1)))));
   5623 
   5624    return "llgfrl";
   5625 }
   5626 
   5627 static HChar *
   5628 s390_irgen_LLCR(UChar r1, UChar r2)
   5629 {
   5630    put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
   5631 
   5632    return "llcr";
   5633 }
   5634 
   5635 static HChar *
   5636 s390_irgen_LLGCR(UChar r1, UChar r2)
   5637 {
   5638    put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
   5639 
   5640    return "llgcr";
   5641 }
   5642 
   5643 static HChar *
   5644 s390_irgen_LLC(UChar r1, IRTemp op2addr)
   5645 {
   5646    put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
   5647 
   5648    return "llc";
   5649 }
   5650 
   5651 static HChar *
   5652 s390_irgen_LLGC(UChar r1, IRTemp op2addr)
   5653 {
   5654    put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
   5655 
   5656    return "llgc";
   5657 }
   5658 
   5659 static HChar *
   5660 s390_irgen_LLCH(UChar r1, IRTemp op2addr)
   5661 {
   5662    put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
   5663 
   5664    return "llch";
   5665 }
   5666 
   5667 static HChar *
   5668 s390_irgen_LLHR(UChar r1, UChar r2)
   5669 {
   5670    put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
   5671 
   5672    return "llhr";
   5673 }
   5674 
   5675 static HChar *
   5676 s390_irgen_LLGHR(UChar r1, UChar r2)
   5677 {
   5678    put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
   5679 
   5680    return "llghr";
   5681 }
   5682 
   5683 static HChar *
   5684 s390_irgen_LLH(UChar r1, IRTemp op2addr)
   5685 {
   5686    put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
   5687 
   5688    return "llh";
   5689 }
   5690 
   5691 static HChar *
   5692 s390_irgen_LLGH(UChar r1, IRTemp op2addr)
   5693 {
   5694    put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
   5695 
   5696    return "llgh";
   5697 }
   5698 
   5699 static HChar *
   5700 s390_irgen_LLHRL(UChar r1, UInt i2)
   5701 {
   5702    put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
   5703               ((ULong)(Long)(Int)i2 << 1)))));
   5704 
   5705    return "llhrl";
   5706 }
   5707 
   5708 static HChar *
   5709 s390_irgen_LLGHRL(UChar r1, UInt i2)
   5710 {
   5711    put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
   5712                ((ULong)(Long)(Int)i2 << 1)))));
   5713 
   5714    return "llghrl";
   5715 }
   5716 
   5717 static HChar *
   5718 s390_irgen_LLHH(UChar r1, IRTemp op2addr)
   5719 {
   5720    put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
   5721 
   5722    return "llhh";
   5723 }
   5724 
   5725 static HChar *
   5726 s390_irgen_LLIHF(UChar r1, UInt i2)
   5727 {
   5728    put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
   5729 
   5730    return "llihf";
   5731 }
   5732 
   5733 static HChar *
   5734 s390_irgen_LLIHH(UChar r1, UShort i2)
   5735 {
   5736    put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
   5737 
   5738    return "llihh";
   5739 }
   5740 
   5741 static HChar *
   5742 s390_irgen_LLIHL(UChar r1, UShort i2)
   5743 {
   5744    put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
   5745 
   5746    return "llihl";
   5747 }
   5748 
   5749 static HChar *
   5750 s390_irgen_LLILF(UChar r1, UInt i2)
   5751 {
   5752    put_gpr_dw0(r1, mkU64(i2));
   5753 
   5754    return "llilf";
   5755 }
   5756 
   5757 static HChar *
   5758 s390_irgen_LLILH(UChar r1, UShort i2)
   5759 {
   5760    put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
   5761 
   5762    return "llilh";
   5763 }
   5764 
   5765 static HChar *
   5766 s390_irgen_LLILL(UChar r1, UShort i2)
   5767 {
   5768    put_gpr_dw0(r1, mkU64(i2));
   5769 
   5770    return "llill";
   5771 }
   5772 
   5773 static HChar *
   5774 s390_irgen_LLGTR(UChar r1, UChar r2)
   5775 {
   5776    put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
   5777                mkU32(2147483647))));
   5778 
   5779    return "llgtr";
   5780 }
   5781 
   5782 static HChar *
   5783 s390_irgen_LLGT(UChar r1, IRTemp op2addr)
   5784 {
   5785    put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
   5786                mkexpr(op2addr)), mkU32(2147483647))));
   5787 
   5788    return "llgt";
   5789 }
   5790 
   5791 static HChar *
   5792 s390_irgen_LNR(UChar r1, UChar r2)
   5793 {
   5794    IRTemp op2 = newTemp(Ity_I32);
   5795    IRTemp result = newTemp(Ity_I32);
   5796 
   5797    assign(op2, get_gpr_w1(r2));
   5798    assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
   5799           binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
   5800    put_gpr_w1(r1, mkexpr(result));
   5801    s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
   5802 
   5803    return "lnr";
   5804 }
   5805 
   5806 static HChar *
   5807 s390_irgen_LNGR(UChar r1, UChar r2)
   5808 {
   5809    IRTemp op2 = newTemp(Ity_I64);
   5810    IRTemp result = newTemp(Ity_I64);
   5811 
   5812    assign(op2, get_gpr_dw0(r2));
   5813    assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
   5814           binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
   5815    put_gpr_dw0(r1, mkexpr(result));
   5816    s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
   5817 
   5818    return "lngr";
   5819 }
   5820 
   5821 static HChar *
   5822 s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
   5823 {
   5824    IRTemp op2 = newTemp(Ity_I64);
   5825    IRTemp result = newTemp(Ity_I64);
   5826 
   5827    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
   5828    assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
   5829           binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
   5830    put_gpr_dw0(r1, mkexpr(result));
   5831    s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
   5832 
   5833    return "lngfr";
   5834 }
   5835 
   5836 static HChar *
   5837 s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
   5838 {
   5839    if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
   5840                      guest_IA_next_instr);
   5841    put_gpr_w1(r1, get_gpr_w1(r2));
   5842 
   5843    return "locr";
   5844 }
   5845 
   5846 static HChar *
   5847 s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
   5848 {
   5849    if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
   5850                      guest_IA_next_instr);
   5851    put_gpr_dw0(r1, get_gpr_dw0(r2));
   5852 
   5853    return "locgr";
   5854 }
   5855 
   5856 static HChar *
   5857 s390_irgen_LOC(UChar r1, IRTemp op2addr)
   5858 {
   5859    /* condition is checked in format handler */
   5860    put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
   5861 
   5862    return "loc";
   5863 }
   5864 
   5865 static HChar *
   5866 s390_irgen_LOCG(UChar r1, IRTemp op2addr)
   5867 {
   5868    /* condition is checked in format handler */
   5869    put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
   5870 
   5871    return "locg";
   5872 }
   5873 
   5874 static HChar *
   5875 s390_irgen_LPQ(UChar r1, IRTemp op2addr)
   5876 {
   5877    put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
   5878    put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
   5879                ));
   5880 
   5881    return "lpq";
   5882 }
   5883 
   5884 static HChar *
   5885 s390_irgen_LPR(UChar r1, UChar r2)
   5886 {
   5887    IRTemp op2 = newTemp(Ity_I32);
   5888    IRTemp result = newTemp(Ity_I32);
   5889 
   5890    assign(op2, get_gpr_w1(r2));
   5891    assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
   5892           binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
   5893    put_gpr_w1(r1, mkexpr(result));
   5894    s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
   5895 
   5896    return "lpr";
   5897 }
   5898 
   5899 static HChar *
   5900 s390_irgen_LPGR(UChar r1, UChar r2)
   5901 {
   5902    IRTemp op2 = newTemp(Ity_I64);
   5903    IRTemp result = newTemp(Ity_I64);
   5904 
   5905    assign(op2, get_gpr_dw0(r2));
   5906    assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
   5907           binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
   5908    put_gpr_dw0(r1, mkexpr(result));
   5909    s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
   5910 
   5911    return "lpgr";
   5912 }
   5913 
   5914 static HChar *
   5915 s390_irgen_LPGFR(UChar r1, UChar r2)
   5916 {
   5917    IRTemp op2 = newTemp(Ity_I64);
   5918    IRTemp result = newTemp(Ity_I64);
   5919 
   5920    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   5921    assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
   5922           binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
   5923    put_gpr_dw0(r1, mkexpr(result));
   5924    s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
   5925 
   5926    return "lpgfr";
   5927 }
   5928 
   5929 static HChar *
   5930 s390_irgen_LRVR(UChar r1, UChar r2)
   5931 {
   5932    IRTemp b0 = newTemp(Ity_I8);
   5933    IRTemp b1 = newTemp(Ity_I8);
   5934    IRTemp b2 = newTemp(Ity_I8);
   5935    IRTemp b3 = newTemp(Ity_I8);
   5936 
   5937    assign(b3, get_gpr_b7(r2));
   5938    assign(b2, get_gpr_b6(r2));
   5939    assign(b1, get_gpr_b5(r2));
   5940    assign(b0, get_gpr_b4(r2));
   5941    put_gpr_b4(r1, mkexpr(b3));
   5942    put_gpr_b5(r1, mkexpr(b2));
   5943    put_gpr_b6(r1, mkexpr(b1));
   5944    put_gpr_b7(r1, mkexpr(b0));
   5945 
   5946    return "lrvr";
   5947 }
   5948 
   5949 static HChar *
   5950 s390_irgen_LRVGR(UChar r1, UChar r2)
   5951 {
   5952    IRTemp b0 = newTemp(Ity_I8);
   5953    IRTemp b1 = newTemp(Ity_I8);
   5954    IRTemp b2 = newTemp(Ity_I8);
   5955    IRTemp b3 = newTemp(Ity_I8);
   5956    IRTemp b4 = newTemp(Ity_I8);
   5957    IRTemp b5 = newTemp(Ity_I8);
   5958    IRTemp b6 = newTemp(Ity_I8);
   5959    IRTemp b7 = newTemp(Ity_I8);
   5960 
   5961    assign(b7, get_gpr_b7(r2));
   5962    assign(b6, get_gpr_b6(r2));
   5963    assign(b5, get_gpr_b5(r2));
   5964    assign(b4, get_gpr_b4(r2));
   5965    assign(b3, get_gpr_b3(r2));
   5966    assign(b2, get_gpr_b2(r2));
   5967    assign(b1, get_gpr_b1(r2));
   5968    assign(b0, get_gpr_b0(r2));
   5969    put_gpr_b0(r1, mkexpr(b7));
   5970    put_gpr_b1(r1, mkexpr(b6));
   5971    put_gpr_b2(r1, mkexpr(b5));
   5972    put_gpr_b3(r1, mkexpr(b4));
   5973    put_gpr_b4(r1, mkexpr(b3));
   5974    put_gpr_b5(r1, mkexpr(b2));
   5975    put_gpr_b6(r1, mkexpr(b1));
   5976    put_gpr_b7(r1, mkexpr(b0));
   5977 
   5978    return "lrvgr";
   5979 }
   5980 
   5981 static HChar *
   5982 s390_irgen_LRVH(UChar r1, IRTemp op2addr)
   5983 {
   5984    IRTemp op2 = newTemp(Ity_I16);
   5985 
   5986    assign(op2, load(Ity_I16, mkexpr(op2addr)));
   5987    put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
   5988    put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
   5989 
   5990    return "lrvh";
   5991 }
   5992 
   5993 static HChar *
   5994 s390_irgen_LRV(UChar r1, IRTemp op2addr)
   5995 {
   5996    IRTemp op2 = newTemp(Ity_I32);
   5997 
   5998    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   5999    put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
   6000    put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
   6001               mkU8(8)), mkU32(255))));
   6002    put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
   6003               mkU8(16)), mkU32(255))));
   6004    put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
   6005               mkU8(24)), mkU32(255))));
   6006 
   6007    return "lrv";
   6008 }
   6009 
   6010 static HChar *
   6011 s390_irgen_LRVG(UChar r1, IRTemp op2addr)
   6012 {
   6013    IRTemp op2 = newTemp(Ity_I64);
   6014 
   6015    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   6016    put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
   6017    put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6018               mkU8(8)), mkU64(255))));
   6019    put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6020               mkU8(16)), mkU64(255))));
   6021    put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6022               mkU8(24)), mkU64(255))));
   6023    put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6024               mkU8(32)), mkU64(255))));
   6025    put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6026               mkU8(40)), mkU64(255))));
   6027    put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6028               mkU8(48)), mkU64(255))));
   6029    put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
   6030               mkU8(56)), mkU64(255))));
   6031 
   6032    return "lrvg";
   6033 }
   6034 
   6035 static HChar *
   6036 s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
   6037 {
   6038    store(mkexpr(op1addr), mkU16(i2));
   6039 
   6040    return "mvhhi";
   6041 }
   6042 
   6043 static HChar *
   6044 s390_irgen_MVHI(UShort i2, IRTemp op1addr)
   6045 {
   6046    store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
   6047 
   6048    return "mvhi";
   6049 }
   6050 
   6051 static HChar *
   6052 s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
   6053 {
   6054    store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
   6055 
   6056    return "mvghi";
   6057 }
   6058 
   6059 static HChar *
   6060 s390_irgen_MVI(UChar i2, IRTemp op1addr)
   6061 {
   6062    store(mkexpr(op1addr), mkU8(i2));
   6063 
   6064    return "mvi";
   6065 }
   6066 
   6067 static HChar *
   6068 s390_irgen_MVIY(UChar i2, IRTemp op1addr)
   6069 {
   6070    store(mkexpr(op1addr), mkU8(i2));
   6071 
   6072    return "mviy";
   6073 }
   6074 
   6075 static HChar *
   6076 s390_irgen_MR(UChar r1, UChar r2)
   6077 {
   6078    IRTemp op1 = newTemp(Ity_I32);
   6079    IRTemp op2 = newTemp(Ity_I32);
   6080    IRTemp result = newTemp(Ity_I64);
   6081 
   6082    assign(op1, get_gpr_w1(r1 + 1));
   6083    assign(op2, get_gpr_w1(r2));
   6084    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6085    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6086    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6087 
   6088    return "mr";
   6089 }
   6090 
   6091 static HChar *
   6092 s390_irgen_M(UChar r1, IRTemp op2addr)
   6093 {
   6094    IRTemp op1 = newTemp(Ity_I32);
   6095    IRTemp op2 = newTemp(Ity_I32);
   6096    IRTemp result = newTemp(Ity_I64);
   6097 
   6098    assign(op1, get_gpr_w1(r1 + 1));
   6099    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6100    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6101    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6102    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6103 
   6104    return "m";
   6105 }
   6106 
   6107 static HChar *
   6108 s390_irgen_MFY(UChar r1, IRTemp op2addr)
   6109 {
   6110    IRTemp op1 = newTemp(Ity_I32);
   6111    IRTemp op2 = newTemp(Ity_I32);
   6112    IRTemp result = newTemp(Ity_I64);
   6113 
   6114    assign(op1, get_gpr_w1(r1 + 1));
   6115    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6116    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6117    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6118    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6119 
   6120    return "mfy";
   6121 }
   6122 
   6123 static HChar *
   6124 s390_irgen_MH(UChar r1, IRTemp op2addr)
   6125 {
   6126    IRTemp op1 = newTemp(Ity_I32);
   6127    IRTemp op2 = newTemp(Ity_I16);
   6128    IRTemp result = newTemp(Ity_I64);
   6129 
   6130    assign(op1, get_gpr_w1(r1));
   6131    assign(op2, load(Ity_I16, mkexpr(op2addr)));
   6132    assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
   6133           ));
   6134    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6135 
   6136    return "mh";
   6137 }
   6138 
   6139 static HChar *
   6140 s390_irgen_MHY(UChar r1, IRTemp op2addr)
   6141 {
   6142    IRTemp op1 = newTemp(Ity_I32);
   6143    IRTemp op2 = newTemp(Ity_I16);
   6144    IRTemp result = newTemp(Ity_I64);
   6145 
   6146    assign(op1, get_gpr_w1(r1));
   6147    assign(op2, load(Ity_I16, mkexpr(op2addr)));
   6148    assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
   6149           ));
   6150    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6151 
   6152    return "mhy";
   6153 }
   6154 
   6155 static HChar *
   6156 s390_irgen_MHI(UChar r1, UShort i2)
   6157 {
   6158    IRTemp op1 = newTemp(Ity_I32);
   6159    Short op2;
   6160    IRTemp result = newTemp(Ity_I64);
   6161 
   6162    assign(op1, get_gpr_w1(r1));
   6163    op2 = (Short)i2;
   6164    assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
   6165           mkU16((UShort)op2))));
   6166    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6167 
   6168    return "mhi";
   6169 }
   6170 
   6171 static HChar *
   6172 s390_irgen_MGHI(UChar r1, UShort i2)
   6173 {
   6174    IRTemp op1 = newTemp(Ity_I64);
   6175    Short op2;
   6176    IRTemp result = newTemp(Ity_I128);
   6177 
   6178    assign(op1, get_gpr_dw0(r1));
   6179    op2 = (Short)i2;
   6180    assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
   6181           mkU16((UShort)op2))));
   6182    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6183 
   6184    return "mghi";
   6185 }
   6186 
   6187 static HChar *
   6188 s390_irgen_MLR(UChar r1, UChar r2)
   6189 {
   6190    IRTemp op1 = newTemp(Ity_I32);
   6191    IRTemp op2 = newTemp(Ity_I32);
   6192    IRTemp result = newTemp(Ity_I64);
   6193 
   6194    assign(op1, get_gpr_w1(r1 + 1));
   6195    assign(op2, get_gpr_w1(r2));
   6196    assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
   6197    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6198    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6199 
   6200    return "mlr";
   6201 }
   6202 
   6203 static HChar *
   6204 s390_irgen_MLGR(UChar r1, UChar r2)
   6205 {
   6206    IRTemp op1 = newTemp(Ity_I64);
   6207    IRTemp op2 = newTemp(Ity_I64);
   6208    IRTemp result = newTemp(Ity_I128);
   6209 
   6210    assign(op1, get_gpr_dw0(r1 + 1));
   6211    assign(op2, get_gpr_dw0(r2));
   6212    assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
   6213    put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
   6214    put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
   6215 
   6216    return "mlgr";
   6217 }
   6218 
   6219 static HChar *
   6220 s390_irgen_ML(UChar r1, IRTemp op2addr)
   6221 {
   6222    IRTemp op1 = newTemp(Ity_I32);
   6223    IRTemp op2 = newTemp(Ity_I32);
   6224    IRTemp result = newTemp(Ity_I64);
   6225 
   6226    assign(op1, get_gpr_w1(r1 + 1));
   6227    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6228    assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
   6229    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6230    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6231 
   6232    return "ml";
   6233 }
   6234 
   6235 static HChar *
   6236 s390_irgen_MLG(UChar r1, IRTemp op2addr)
   6237 {
   6238    IRTemp op1 = newTemp(Ity_I64);
   6239    IRTemp op2 = newTemp(Ity_I64);
   6240    IRTemp result = newTemp(Ity_I128);
   6241 
   6242    assign(op1, get_gpr_dw0(r1 + 1));
   6243    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   6244    assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
   6245    put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
   6246    put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
   6247 
   6248    return "mlg";
   6249 }
   6250 
   6251 static HChar *
   6252 s390_irgen_MSR(UChar r1, UChar r2)
   6253 {
   6254    IRTemp op1 = newTemp(Ity_I32);
   6255    IRTemp op2 = newTemp(Ity_I32);
   6256    IRTemp result = newTemp(Ity_I64);
   6257 
   6258    assign(op1, get_gpr_w1(r1));
   6259    assign(op2, get_gpr_w1(r2));
   6260    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6261    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6262 
   6263    return "msr";
   6264 }
   6265 
   6266 static HChar *
   6267 s390_irgen_MSGR(UChar r1, UChar r2)
   6268 {
   6269    IRTemp op1 = newTemp(Ity_I64);
   6270    IRTemp op2 = newTemp(Ity_I64);
   6271    IRTemp result = newTemp(Ity_I128);
   6272 
   6273    assign(op1, get_gpr_dw0(r1));
   6274    assign(op2, get_gpr_dw0(r2));
   6275    assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
   6276    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6277 
   6278    return "msgr";
   6279 }
   6280 
   6281 static HChar *
   6282 s390_irgen_MSGFR(UChar r1, UChar r2)
   6283 {
   6284    IRTemp op1 = newTemp(Ity_I64);
   6285    IRTemp op2 = newTemp(Ity_I32);
   6286    IRTemp result = newTemp(Ity_I128);
   6287 
   6288    assign(op1, get_gpr_dw0(r1));
   6289    assign(op2, get_gpr_w1(r2));
   6290    assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
   6291           ));
   6292    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6293 
   6294    return "msgfr";
   6295 }
   6296 
   6297 static HChar *
   6298 s390_irgen_MS(UChar r1, IRTemp op2addr)
   6299 {
   6300    IRTemp op1 = newTemp(Ity_I32);
   6301    IRTemp op2 = newTemp(Ity_I32);
   6302    IRTemp result = newTemp(Ity_I64);
   6303 
   6304    assign(op1, get_gpr_w1(r1));
   6305    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6306    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6307    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6308 
   6309    return "ms";
   6310 }
   6311 
   6312 static HChar *
   6313 s390_irgen_MSY(UChar r1, IRTemp op2addr)
   6314 {
   6315    IRTemp op1 = newTemp(Ity_I32);
   6316    IRTemp op2 = newTemp(Ity_I32);
   6317    IRTemp result = newTemp(Ity_I64);
   6318 
   6319    assign(op1, get_gpr_w1(r1));
   6320    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6321    assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
   6322    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6323 
   6324    return "msy";
   6325 }
   6326 
   6327 static HChar *
   6328 s390_irgen_MSG(UChar r1, IRTemp op2addr)
   6329 {
   6330    IRTemp op1 = newTemp(Ity_I64);
   6331    IRTemp op2 = newTemp(Ity_I64);
   6332    IRTemp result = newTemp(Ity_I128);
   6333 
   6334    assign(op1, get_gpr_dw0(r1));
   6335    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   6336    assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
   6337    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6338 
   6339    return "msg";
   6340 }
   6341 
   6342 static HChar *
   6343 s390_irgen_MSGF(UChar r1, IRTemp op2addr)
   6344 {
   6345    IRTemp op1 = newTemp(Ity_I64);
   6346    IRTemp op2 = newTemp(Ity_I32);
   6347    IRTemp result = newTemp(Ity_I128);
   6348 
   6349    assign(op1, get_gpr_dw0(r1));
   6350    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6351    assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
   6352           ));
   6353    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6354 
   6355    return "msgf";
   6356 }
   6357 
   6358 static HChar *
   6359 s390_irgen_MSFI(UChar r1, UInt i2)
   6360 {
   6361    IRTemp op1 = newTemp(Ity_I32);
   6362    Int op2;
   6363    IRTemp result = newTemp(Ity_I64);
   6364 
   6365    assign(op1, get_gpr_w1(r1));
   6366    op2 = (Int)i2;
   6367    assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
   6368    put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
   6369 
   6370    return "msfi";
   6371 }
   6372 
   6373 static HChar *
   6374 s390_irgen_MSGFI(UChar r1, UInt i2)
   6375 {
   6376    IRTemp op1 = newTemp(Ity_I64);
   6377    Int op2;
   6378    IRTemp result = newTemp(Ity_I128);
   6379 
   6380    assign(op1, get_gpr_dw0(r1));
   6381    op2 = (Int)i2;
   6382    assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
   6383           op2))));
   6384    put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
   6385 
   6386    return "msgfi";
   6387 }
   6388 
   6389 static HChar *
   6390 s390_irgen_OR(UChar r1, UChar r2)
   6391 {
   6392    IRTemp op1 = newTemp(Ity_I32);
   6393    IRTemp op2 = newTemp(Ity_I32);
   6394    IRTemp result = newTemp(Ity_I32);
   6395 
   6396    assign(op1, get_gpr_w1(r1));
   6397    assign(op2, get_gpr_w1(r2));
   6398    assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
   6399    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6400    put_gpr_w1(r1, mkexpr(result));
   6401 
   6402    return "or";
   6403 }
   6404 
   6405 static HChar *
   6406 s390_irgen_OGR(UChar r1, UChar r2)
   6407 {
   6408    IRTemp op1 = newTemp(Ity_I64);
   6409    IRTemp op2 = newTemp(Ity_I64);
   6410    IRTemp result = newTemp(Ity_I64);
   6411 
   6412    assign(op1, get_gpr_dw0(r1));
   6413    assign(op2, get_gpr_dw0(r2));
   6414    assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
   6415    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6416    put_gpr_dw0(r1, mkexpr(result));
   6417 
   6418    return "ogr";
   6419 }
   6420 
   6421 static HChar *
   6422 s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
   6423 {
   6424    IRTemp op2 = newTemp(Ity_I32);
   6425    IRTemp op3 = newTemp(Ity_I32);
   6426    IRTemp result = newTemp(Ity_I32);
   6427 
   6428    assign(op2, get_gpr_w1(r2));
   6429    assign(op3, get_gpr_w1(r3));
   6430    assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
   6431    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6432    put_gpr_w1(r1, mkexpr(result));
   6433 
   6434    return "ork";
   6435 }
   6436 
   6437 static HChar *
   6438 s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
   6439 {
   6440    IRTemp op2 = newTemp(Ity_I64);
   6441    IRTemp op3 = newTemp(Ity_I64);
   6442    IRTemp result = newTemp(Ity_I64);
   6443 
   6444    assign(op2, get_gpr_dw0(r2));
   6445    assign(op3, get_gpr_dw0(r3));
   6446    assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
   6447    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6448    put_gpr_dw0(r1, mkexpr(result));
   6449 
   6450    return "ogrk";
   6451 }
   6452 
   6453 static HChar *
   6454 s390_irgen_O(UChar r1, IRTemp op2addr)
   6455 {
   6456    IRTemp op1 = newTemp(Ity_I32);
   6457    IRTemp op2 = newTemp(Ity_I32);
   6458    IRTemp result = newTemp(Ity_I32);
   6459 
   6460    assign(op1, get_gpr_w1(r1));
   6461    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6462    assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
   6463    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6464    put_gpr_w1(r1, mkexpr(result));
   6465 
   6466    return "o";
   6467 }
   6468 
   6469 static HChar *
   6470 s390_irgen_OY(UChar r1, IRTemp op2addr)
   6471 {
   6472    IRTemp op1 = newTemp(Ity_I32);
   6473    IRTemp op2 = newTemp(Ity_I32);
   6474    IRTemp result = newTemp(Ity_I32);
   6475 
   6476    assign(op1, get_gpr_w1(r1));
   6477    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   6478    assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
   6479    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6480    put_gpr_w1(r1, mkexpr(result));
   6481 
   6482    return "oy";
   6483 }
   6484 
   6485 static HChar *
   6486 s390_irgen_OG(UChar r1, IRTemp op2addr)
   6487 {
   6488    IRTemp op1 = newTemp(Ity_I64);
   6489    IRTemp op2 = newTemp(Ity_I64);
   6490    IRTemp result = newTemp(Ity_I64);
   6491 
   6492    assign(op1, get_gpr_dw0(r1));
   6493    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   6494    assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
   6495    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6496    put_gpr_dw0(r1, mkexpr(result));
   6497 
   6498    return "og";
   6499 }
   6500 
   6501 static HChar *
   6502 s390_irgen_OI(UChar i2, IRTemp op1addr)
   6503 {
   6504    IRTemp op1 = newTemp(Ity_I8);
   6505    UChar op2;
   6506    IRTemp result = newTemp(Ity_I8);
   6507 
   6508    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   6509    op2 = i2;
   6510    assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
   6511    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6512    store(mkexpr(op1addr), mkexpr(result));
   6513 
   6514    return "oi";
   6515 }
   6516 
   6517 static HChar *
   6518 s390_irgen_OIY(UChar i2, IRTemp op1addr)
   6519 {
   6520    IRTemp op1 = newTemp(Ity_I8);
   6521    UChar op2;
   6522    IRTemp result = newTemp(Ity_I8);
   6523 
   6524    assign(op1, load(Ity_I8, mkexpr(op1addr)));
   6525    op2 = i2;
   6526    assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
   6527    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6528    store(mkexpr(op1addr), mkexpr(result));
   6529 
   6530    return "oiy";
   6531 }
   6532 
   6533 static HChar *
   6534 s390_irgen_OIHF(UChar r1, UInt i2)
   6535 {
   6536    IRTemp op1 = newTemp(Ity_I32);
   6537    UInt op2;
   6538    IRTemp result = newTemp(Ity_I32);
   6539 
   6540    assign(op1, get_gpr_w0(r1));
   6541    op2 = i2;
   6542    assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
   6543    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6544    put_gpr_w0(r1, mkexpr(result));
   6545 
   6546    return "oihf";
   6547 }
   6548 
   6549 static HChar *
   6550 s390_irgen_OIHH(UChar r1, UShort i2)
   6551 {
   6552    IRTemp op1 = newTemp(Ity_I16);
   6553    UShort op2;
   6554    IRTemp result = newTemp(Ity_I16);
   6555 
   6556    assign(op1, get_gpr_hw0(r1));
   6557    op2 = i2;
   6558    assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
   6559    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6560    put_gpr_hw0(r1, mkexpr(result));
   6561 
   6562    return "oihh";
   6563 }
   6564 
   6565 static HChar *
   6566 s390_irgen_OIHL(UChar r1, UShort i2)
   6567 {
   6568    IRTemp op1 = newTemp(Ity_I16);
   6569    UShort op2;
   6570    IRTemp result = newTemp(Ity_I16);
   6571 
   6572    assign(op1, get_gpr_hw1(r1));
   6573    op2 = i2;
   6574    assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
   6575    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6576    put_gpr_hw1(r1, mkexpr(result));
   6577 
   6578    return "oihl";
   6579 }
   6580 
   6581 static HChar *
   6582 s390_irgen_OILF(UChar r1, UInt i2)
   6583 {
   6584    IRTemp op1 = newTemp(Ity_I32);
   6585    UInt op2;
   6586    IRTemp result = newTemp(Ity_I32);
   6587 
   6588    assign(op1, get_gpr_w1(r1));
   6589    op2 = i2;
   6590    assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
   6591    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6592    put_gpr_w1(r1, mkexpr(result));
   6593 
   6594    return "oilf";
   6595 }
   6596 
   6597 static HChar *
   6598 s390_irgen_OILH(UChar r1, UShort i2)
   6599 {
   6600    IRTemp op1 = newTemp(Ity_I16);
   6601    UShort op2;
   6602    IRTemp result = newTemp(Ity_I16);
   6603 
   6604    assign(op1, get_gpr_hw2(r1));
   6605    op2 = i2;
   6606    assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
   6607    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6608    put_gpr_hw2(r1, mkexpr(result));
   6609 
   6610    return "oilh";
   6611 }
   6612 
   6613 static HChar *
   6614 s390_irgen_OILL(UChar r1, UShort i2)
   6615 {
   6616    IRTemp op1 = newTemp(Ity_I16);
   6617    UShort op2;
   6618    IRTemp result = newTemp(Ity_I16);
   6619 
   6620    assign(op1, get_gpr_hw3(r1));
   6621    op2 = i2;
   6622    assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
   6623    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6624    put_gpr_hw3(r1, mkexpr(result));
   6625 
   6626    return "oill";
   6627 }
   6628 
   6629 static HChar *
   6630 s390_irgen_PFD(void)
   6631 {
   6632 
   6633    return "pfd";
   6634 }
   6635 
   6636 static HChar *
   6637 s390_irgen_PFDRL(void)
   6638 {
   6639 
   6640    return "pfdrl";
   6641 }
   6642 
   6643 static HChar *
   6644 s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
   6645 {
   6646    IRTemp amount = newTemp(Ity_I64);
   6647    IRTemp op = newTemp(Ity_I32);
   6648 
   6649    assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
   6650    assign(op, get_gpr_w1(r3));
   6651    put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
   6652               mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
   6653               binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
   6654 
   6655    return "rll";
   6656 }
   6657 
   6658 static HChar *
   6659 s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
   6660 {
   6661    IRTemp amount = newTemp(Ity_I64);
   6662    IRTemp op = newTemp(Ity_I64);
   6663 
   6664    assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
   6665    assign(op, get_gpr_dw0(r3));
   6666    put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
   6667                mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
   6668                binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
   6669 
   6670    return "rllg";
   6671 }
   6672 
   6673 static HChar *
   6674 s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
   6675 {
   6676    UChar from;
   6677    UChar to;
   6678    UChar rot;
   6679    UChar t_bit;
   6680    ULong mask;
   6681    ULong maskc;
   6682    IRTemp result = newTemp(Ity_I64);
   6683    IRTemp op2 = newTemp(Ity_I64);
   6684 
   6685    from = i3 & 63;
   6686    to = i4 & 63;
   6687    rot = i5 & 63;
   6688    t_bit = i3 & 128;
   6689    assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
   6690           get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
   6691           mkU8(64 - rot))));
   6692    if (from <= to) {
   6693       mask = ~0ULL;
   6694       mask = (mask >> from) & (mask << (63 - to));
   6695       maskc = ~mask;
   6696    } else {
   6697       maskc = ~0ULL;
   6698       maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
   6699       mask = ~maskc;
   6700    }
   6701    assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
   6702           ), mkU64(mask)));
   6703    if (t_bit == 0) {
   6704       put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
   6705                   mkU64(maskc)), mkexpr(result)));
   6706    }
   6707    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6708 
   6709    return "rnsbg";
   6710 }
   6711 
   6712 static HChar *
   6713 s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
   6714 {
   6715    UChar from;
   6716    UChar to;
   6717    UChar rot;
   6718    UChar t_bit;
   6719    ULong mask;
   6720    ULong maskc;
   6721    IRTemp result = newTemp(Ity_I64);
   6722    IRTemp op2 = newTemp(Ity_I64);
   6723 
   6724    from = i3 & 63;
   6725    to = i4 & 63;
   6726    rot = i5 & 63;
   6727    t_bit = i3 & 128;
   6728    assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
   6729           get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
   6730           mkU8(64 - rot))));
   6731    if (from <= to) {
   6732       mask = ~0ULL;
   6733       mask = (mask >> from) & (mask << (63 - to));
   6734       maskc = ~mask;
   6735    } else {
   6736       maskc = ~0ULL;
   6737       maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
   6738       mask = ~maskc;
   6739    }
   6740    assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
   6741           ), mkU64(mask)));
   6742    if (t_bit == 0) {
   6743       put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
   6744                   mkU64(maskc)), mkexpr(result)));
   6745    }
   6746    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6747 
   6748    return "rxsbg";
   6749 }
   6750 
   6751 static HChar *
   6752 s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
   6753 {
   6754    UChar from;
   6755    UChar to;
   6756    UChar rot;
   6757    UChar t_bit;
   6758    ULong mask;
   6759    ULong maskc;
   6760    IRTemp result = newTemp(Ity_I64);
   6761    IRTemp op2 = newTemp(Ity_I64);
   6762 
   6763    from = i3 & 63;
   6764    to = i4 & 63;
   6765    rot = i5 & 63;
   6766    t_bit = i3 & 128;
   6767    assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
   6768           get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
   6769           mkU8(64 - rot))));
   6770    if (from <= to) {
   6771       mask = ~0ULL;
   6772       mask = (mask >> from) & (mask << (63 - to));
   6773       maskc = ~mask;
   6774    } else {
   6775       maskc = ~0ULL;
   6776       maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
   6777       mask = ~maskc;
   6778    }
   6779    assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
   6780           ), mkU64(mask)));
   6781    if (t_bit == 0) {
   6782       put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
   6783                   mkU64(maskc)), mkexpr(result)));
   6784    }
   6785    s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
   6786 
   6787    return "rosbg";
   6788 }
   6789 
   6790 static HChar *
   6791 s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
   6792 {
   6793    UChar from;
   6794    UChar to;
   6795    UChar rot;
   6796    UChar z_bit;
   6797    ULong mask;
   6798    ULong maskc;
   6799    IRTemp op2 = newTemp(Ity_I64);
   6800    IRTemp result = newTemp(Ity_I64);
   6801 
   6802    from = i3 & 63;
   6803    to = i4 & 63;
   6804    rot = i5 & 63;
   6805    z_bit = i4 & 128;
   6806    assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
   6807           get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
   6808           mkU8(64 - rot))));
   6809    if (from <= to) {
   6810       mask = ~0ULL;
   6811       mask = (mask >> from) & (mask << (63 - to));
   6812       maskc = ~mask;
   6813    } else {
   6814       maskc = ~0ULL;
   6815       maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
   6816       mask = ~maskc;
   6817    }
   6818    if (z_bit == 0) {
   6819       put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
   6820                   mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
   6821    } else {
   6822       put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
   6823    }
   6824    assign(result, get_gpr_dw0(r1));
   6825    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
   6826 
   6827    return "risbg";
   6828 }
   6829 
   6830 static HChar *
   6831 s390_irgen_SAR(UChar r1, UChar r2)
   6832 {
   6833    put_ar_w0(r1, get_gpr_w1(r2));
   6834    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   6835       s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
   6836 
   6837    return "sar";
   6838 }
   6839 
   6840 static HChar *
   6841 s390_irgen_SLDA(UChar r1, IRTemp op2addr)
   6842 {
   6843    IRTemp p1 = newTemp(Ity_I64);
   6844    IRTemp p2 = newTemp(Ity_I64);
   6845    IRTemp op = newTemp(Ity_I64);
   6846    IRTemp result = newTemp(Ity_I64);
   6847    Long sign_mask;
   6848    IRTemp shift_amount = newTemp(Ity_I64);
   6849 
   6850    assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
   6851    assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
   6852    assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
   6853           ));
   6854    sign_mask = 1ULL << 63;
   6855    assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
   6856    assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
   6857           unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
   6858           binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
   6859    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6860    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6861    s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
   6862 
   6863    return "slda";
   6864 }
   6865 
   6866 static HChar *
   6867 s390_irgen_SLDL(UChar r1, IRTemp op2addr)
   6868 {
   6869    IRTemp p1 = newTemp(Ity_I64);
   6870    IRTemp p2 = newTemp(Ity_I64);
   6871    IRTemp result = newTemp(Ity_I64);
   6872 
   6873    assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
   6874    assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
   6875    assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
   6876           mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
   6877           mkexpr(op2addr), mkU64(63)))));
   6878    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6879    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6880 
   6881    return "sldl";
   6882 }
   6883 
   6884 static HChar *
   6885 s390_irgen_SLA(UChar r1, IRTemp op2addr)
   6886 {
   6887    IRTemp uop = newTemp(Ity_I32);
   6888    IRTemp result = newTemp(Ity_I32);
   6889    UInt sign_mask;
   6890    IRTemp shift_amount = newTemp(Ity_I64);
   6891    IRTemp op = newTemp(Ity_I32);
   6892 
   6893    assign(op, get_gpr_w1(r1));
   6894    assign(uop, get_gpr_w1(r1));
   6895    sign_mask = 2147483648U;
   6896    assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
   6897    assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
   6898           unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
   6899           binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
   6900    put_gpr_w1(r1, mkexpr(result));
   6901    s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
   6902 
   6903    return "sla";
   6904 }
   6905 
   6906 static HChar *
   6907 s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
   6908 {
   6909    IRTemp uop = newTemp(Ity_I32);
   6910    IRTemp result = newTemp(Ity_I32);
   6911    UInt sign_mask;
   6912    IRTemp shift_amount = newTemp(Ity_I64);
   6913    IRTemp op = newTemp(Ity_I32);
   6914 
   6915    assign(op, get_gpr_w1(r3));
   6916    assign(uop, get_gpr_w1(r3));
   6917    sign_mask = 2147483648U;
   6918    assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
   6919    assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
   6920           unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
   6921           binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
   6922    put_gpr_w1(r1, mkexpr(result));
   6923    s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
   6924 
   6925    return "slak";
   6926 }
   6927 
   6928 static HChar *
   6929 s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
   6930 {
   6931    IRTemp uop = newTemp(Ity_I64);
   6932    IRTemp result = newTemp(Ity_I64);
   6933    ULong sign_mask;
   6934    IRTemp shift_amount = newTemp(Ity_I64);
   6935    IRTemp op = newTemp(Ity_I64);
   6936 
   6937    assign(op, get_gpr_dw0(r3));
   6938    assign(uop, get_gpr_dw0(r3));
   6939    sign_mask = 9223372036854775808ULL;
   6940    assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
   6941    assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
   6942           unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
   6943           binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
   6944    put_gpr_dw0(r1, mkexpr(result));
   6945    s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
   6946 
   6947    return "slag";
   6948 }
   6949 
   6950 static HChar *
   6951 s390_irgen_SLL(UChar r1, IRTemp op2addr)
   6952 {
   6953    put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
   6954               binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
   6955 
   6956    return "sll";
   6957 }
   6958 
   6959 static HChar *
   6960 s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
   6961 {
   6962    put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
   6963               binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
   6964 
   6965    return "sllk";
   6966 }
   6967 
   6968 static HChar *
   6969 s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
   6970 {
   6971    put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
   6972                binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
   6973 
   6974    return "sllg";
   6975 }
   6976 
   6977 static HChar *
   6978 s390_irgen_SRDA(UChar r1, IRTemp op2addr)
   6979 {
   6980    IRTemp p1 = newTemp(Ity_I64);
   6981    IRTemp p2 = newTemp(Ity_I64);
   6982    IRTemp result = newTemp(Ity_I64);
   6983 
   6984    assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
   6985    assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
   6986    assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
   6987           mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
   6988           mkexpr(op2addr), mkU64(63)))));
   6989    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   6990    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   6991    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
   6992 
   6993    return "srda";
   6994 }
   6995 
   6996 static HChar *
   6997 s390_irgen_SRDL(UChar r1, IRTemp op2addr)
   6998 {
   6999    IRTemp p1 = newTemp(Ity_I64);
   7000    IRTemp p2 = newTemp(Ity_I64);
   7001    IRTemp result = newTemp(Ity_I64);
   7002 
   7003    assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
   7004    assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
   7005    assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
   7006           mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
   7007           mkexpr(op2addr), mkU64(63)))));
   7008    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
   7009    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
   7010 
   7011    return "srdl";
   7012 }
   7013 
   7014 static HChar *
   7015 s390_irgen_SRA(UChar r1, IRTemp op2addr)
   7016 {
   7017    IRTemp result = newTemp(Ity_I32);
   7018    IRTemp op = newTemp(Ity_I32);
   7019 
   7020    assign(op, get_gpr_w1(r1));
   7021    assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7022           mkexpr(op2addr), mkU64(63)))));
   7023    put_gpr_w1(r1, mkexpr(result));
   7024    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
   7025 
   7026    return "sra";
   7027 }
   7028 
   7029 static HChar *
   7030 s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
   7031 {
   7032    IRTemp result = newTemp(Ity_I32);
   7033    IRTemp op = newTemp(Ity_I32);
   7034 
   7035    assign(op, get_gpr_w1(r3));
   7036    assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7037           mkexpr(op2addr), mkU64(63)))));
   7038    put_gpr_w1(r1, mkexpr(result));
   7039    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
   7040 
   7041    return "srak";
   7042 }
   7043 
   7044 static HChar *
   7045 s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
   7046 {
   7047    IRTemp result = newTemp(Ity_I64);
   7048    IRTemp op = newTemp(Ity_I64);
   7049 
   7050    assign(op, get_gpr_dw0(r3));
   7051    assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7052           mkexpr(op2addr), mkU64(63)))));
   7053    put_gpr_dw0(r1, mkexpr(result));
   7054    s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
   7055 
   7056    return "srag";
   7057 }
   7058 
   7059 static HChar *
   7060 s390_irgen_SRL(UChar r1, IRTemp op2addr)
   7061 {
   7062    IRTemp op = newTemp(Ity_I32);
   7063 
   7064    assign(op, get_gpr_w1(r1));
   7065    put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7066               mkexpr(op2addr), mkU64(63)))));
   7067 
   7068    return "srl";
   7069 }
   7070 
   7071 static HChar *
   7072 s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
   7073 {
   7074    IRTemp op = newTemp(Ity_I32);
   7075 
   7076    assign(op, get_gpr_w1(r3));
   7077    put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7078               mkexpr(op2addr), mkU64(63)))));
   7079 
   7080    return "srlk";
   7081 }
   7082 
   7083 static HChar *
   7084 s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
   7085 {
   7086    IRTemp op = newTemp(Ity_I64);
   7087 
   7088    assign(op, get_gpr_dw0(r3));
   7089    put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
   7090                mkexpr(op2addr), mkU64(63)))));
   7091 
   7092    return "srlg";
   7093 }
   7094 
   7095 static HChar *
   7096 s390_irgen_ST(UChar r1, IRTemp op2addr)
   7097 {
   7098    store(mkexpr(op2addr), get_gpr_w1(r1));
   7099 
   7100    return "st";
   7101 }
   7102 
   7103 static HChar *
   7104 s390_irgen_STY(UChar r1, IRTemp op2addr)
   7105 {
   7106    store(mkexpr(op2addr), get_gpr_w1(r1));
   7107 
   7108    return "sty";
   7109 }
   7110 
   7111 static HChar *
   7112 s390_irgen_STG(UChar r1, IRTemp op2addr)
   7113 {
   7114    store(mkexpr(op2addr), get_gpr_dw0(r1));
   7115 
   7116    return "stg";
   7117 }
   7118 
   7119 static HChar *
   7120 s390_irgen_STRL(UChar r1, UInt i2)
   7121 {
   7122    store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
   7123          get_gpr_w1(r1));
   7124 
   7125    return "strl";
   7126 }
   7127 
   7128 static HChar *
   7129 s390_irgen_STGRL(UChar r1, UInt i2)
   7130 {
   7131    store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
   7132          get_gpr_dw0(r1));
   7133 
   7134    return "stgrl";
   7135 }
   7136 
   7137 static HChar *
   7138 s390_irgen_STC(UChar r1, IRTemp op2addr)
   7139 {
   7140    store(mkexpr(op2addr), get_gpr_b7(r1));
   7141 
   7142    return "stc";
   7143 }
   7144 
   7145 static HChar *
   7146 s390_irgen_STCY(UChar r1, IRTemp op2addr)
   7147 {
   7148    store(mkexpr(op2addr), get_gpr_b7(r1));
   7149 
   7150    return "stcy";
   7151 }
   7152 
   7153 static HChar *
   7154 s390_irgen_STCH(UChar r1, IRTemp op2addr)
   7155 {
   7156    store(mkexpr(op2addr), get_gpr_b3(r1));
   7157 
   7158    return "stch";
   7159 }
   7160 
   7161 static HChar *
   7162 s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
   7163 {
   7164    UChar mask;
   7165    UChar n;
   7166 
   7167    mask = (UChar)r3;
   7168    n = 0;
   7169    if ((mask & 8) != 0) {
   7170       store(mkexpr(op2addr), get_gpr_b4(r1));
   7171       n = n + 1;
   7172    }
   7173    if ((mask & 4) != 0) {
   7174       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
   7175       n = n + 1;
   7176    }
   7177    if ((mask & 2) != 0) {
   7178       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
   7179       n = n + 1;
   7180    }
   7181    if ((mask & 1) != 0) {
   7182       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
   7183    }
   7184 
   7185    return "stcm";
   7186 }
   7187 
   7188 static HChar *
   7189 s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
   7190 {
   7191    UChar mask;
   7192    UChar n;
   7193 
   7194    mask = (UChar)r3;
   7195    n = 0;
   7196    if ((mask & 8) != 0) {
   7197       store(mkexpr(op2addr), get_gpr_b4(r1));
   7198       n = n + 1;
   7199    }
   7200    if ((mask & 4) != 0) {
   7201       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
   7202       n = n + 1;
   7203    }
   7204    if ((mask & 2) != 0) {
   7205       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
   7206       n = n + 1;
   7207    }
   7208    if ((mask & 1) != 0) {
   7209       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
   7210    }
   7211 
   7212    return "stcmy";
   7213 }
   7214 
   7215 static HChar *
   7216 s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
   7217 {
   7218    UChar mask;
   7219    UChar n;
   7220 
   7221    mask = (UChar)r3;
   7222    n = 0;
   7223    if ((mask & 8) != 0) {
   7224       store(mkexpr(op2addr), get_gpr_b0(r1));
   7225       n = n + 1;
   7226    }
   7227    if ((mask & 4) != 0) {
   7228       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
   7229       n = n + 1;
   7230    }
   7231    if ((mask & 2) != 0) {
   7232       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
   7233       n = n + 1;
   7234    }
   7235    if ((mask & 1) != 0) {
   7236       store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
   7237    }
   7238 
   7239    return "stcmh";
   7240 }
   7241 
   7242 static HChar *
   7243 s390_irgen_STH(UChar r1, IRTemp op2addr)
   7244 {
   7245    store(mkexpr(op2addr), get_gpr_hw3(r1));
   7246 
   7247    return "sth";
   7248 }
   7249 
   7250 static HChar *
   7251 s390_irgen_STHY(UChar r1, IRTemp op2addr)
   7252 {
   7253    store(mkexpr(op2addr), get_gpr_hw3(r1));
   7254 
   7255    return "sthy";
   7256 }
   7257 
   7258 static HChar *
   7259 s390_irgen_STHRL(UChar r1, UInt i2)
   7260 {
   7261    store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
   7262          get_gpr_hw3(r1));
   7263 
   7264    return "sthrl";
   7265 }
   7266 
   7267 static HChar *
   7268 s390_irgen_STHH(UChar r1, IRTemp op2addr)
   7269 {
   7270    store(mkexpr(op2addr), get_gpr_hw1(r1));
   7271 
   7272    return "sthh";
   7273 }
   7274 
   7275 static HChar *
   7276 s390_irgen_STFH(UChar r1, IRTemp op2addr)
   7277 {
   7278    store(mkexpr(op2addr), get_gpr_w0(r1));
   7279 
   7280    return "stfh";
   7281 }
   7282 
   7283 static HChar *
   7284 s390_irgen_STOC(UChar r1, IRTemp op2addr)
   7285 {
   7286    /* condition is checked in format handler */
   7287    store(mkexpr(op2addr), get_gpr_w1(r1));
   7288 
   7289    return "stoc";
   7290 }
   7291 
   7292 static HChar *
   7293 s390_irgen_STOCG(UChar r1, IRTemp op2addr)
   7294 {
   7295    /* condition is checked in format handler */
   7296    store(mkexpr(op2addr), get_gpr_dw0(r1));
   7297 
   7298    return "stocg";
   7299 }
   7300 
   7301 static HChar *
   7302 s390_irgen_STPQ(UChar r1, IRTemp op2addr)
   7303 {
   7304    store(mkexpr(op2addr), get_gpr_dw0(r1));
   7305    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
   7306 
   7307    return "stpq";
   7308 }
   7309 
   7310 static HChar *
   7311 s390_irgen_STRVH(UChar r1, IRTemp op2addr)
   7312 {
   7313    store(mkexpr(op2addr), get_gpr_b7(r1));
   7314    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
   7315 
   7316    return "strvh";
   7317 }
   7318 
   7319 static HChar *
   7320 s390_irgen_STRV(UChar r1, IRTemp op2addr)
   7321 {
   7322    store(mkexpr(op2addr), get_gpr_b7(r1));
   7323    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
   7324    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
   7325    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
   7326 
   7327    return "strv";
   7328 }
   7329 
   7330 static HChar *
   7331 s390_irgen_STRVG(UChar r1, IRTemp op2addr)
   7332 {
   7333    store(mkexpr(op2addr), get_gpr_b7(r1));
   7334    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
   7335    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
   7336    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
   7337    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
   7338    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
   7339    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
   7340    store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
   7341 
   7342    return "strvg";
   7343 }
   7344 
   7345 static HChar *
   7346 s390_irgen_SR(UChar r1, UChar r2)
   7347 {
   7348    IRTemp op1 = newTemp(Ity_I32);
   7349    IRTemp op2 = newTemp(Ity_I32);
   7350    IRTemp result = newTemp(Ity_I32);
   7351 
   7352    assign(op1, get_gpr_w1(r1));
   7353    assign(op2, get_gpr_w1(r2));
   7354    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7355    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
   7356    put_gpr_w1(r1, mkexpr(result));
   7357 
   7358    return "sr";
   7359 }
   7360 
   7361 static HChar *
   7362 s390_irgen_SGR(UChar r1, UChar r2)
   7363 {
   7364    IRTemp op1 = newTemp(Ity_I64);
   7365    IRTemp op2 = newTemp(Ity_I64);
   7366    IRTemp result = newTemp(Ity_I64);
   7367 
   7368    assign(op1, get_gpr_dw0(r1));
   7369    assign(op2, get_gpr_dw0(r2));
   7370    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7371    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
   7372    put_gpr_dw0(r1, mkexpr(result));
   7373 
   7374    return "sgr";
   7375 }
   7376 
   7377 static HChar *
   7378 s390_irgen_SGFR(UChar r1, UChar r2)
   7379 {
   7380    IRTemp op1 = newTemp(Ity_I64);
   7381    IRTemp op2 = newTemp(Ity_I64);
   7382    IRTemp result = newTemp(Ity_I64);
   7383 
   7384    assign(op1, get_gpr_dw0(r1));
   7385    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   7386    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7387    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
   7388    put_gpr_dw0(r1, mkexpr(result));
   7389 
   7390    return "sgfr";
   7391 }
   7392 
   7393 static HChar *
   7394 s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
   7395 {
   7396    IRTemp op2 = newTemp(Ity_I32);
   7397    IRTemp op3 = newTemp(Ity_I32);
   7398    IRTemp result = newTemp(Ity_I32);
   7399 
   7400    assign(op2, get_gpr_w1(r2));
   7401    assign(op3, get_gpr_w1(r3));
   7402    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7403    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
   7404    put_gpr_w1(r1, mkexpr(result));
   7405 
   7406    return "srk";
   7407 }
   7408 
   7409 static HChar *
   7410 s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
   7411 {
   7412    IRTemp op2 = newTemp(Ity_I64);
   7413    IRTemp op3 = newTemp(Ity_I64);
   7414    IRTemp result = newTemp(Ity_I64);
   7415 
   7416    assign(op2, get_gpr_dw0(r2));
   7417    assign(op3, get_gpr_dw0(r3));
   7418    assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
   7419    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
   7420    put_gpr_dw0(r1, mkexpr(result));
   7421 
   7422    return "sgrk";
   7423 }
   7424 
   7425 static HChar *
   7426 s390_irgen_S(UChar r1, IRTemp op2addr)
   7427 {
   7428    IRTemp op1 = newTemp(Ity_I32);
   7429    IRTemp op2 = newTemp(Ity_I32);
   7430    IRTemp result = newTemp(Ity_I32);
   7431 
   7432    assign(op1, get_gpr_w1(r1));
   7433    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   7434    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7435    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
   7436    put_gpr_w1(r1, mkexpr(result));
   7437 
   7438    return "s";
   7439 }
   7440 
   7441 static HChar *
   7442 s390_irgen_SY(UChar r1, IRTemp op2addr)
   7443 {
   7444    IRTemp op1 = newTemp(Ity_I32);
   7445    IRTemp op2 = newTemp(Ity_I32);
   7446    IRTemp result = newTemp(Ity_I32);
   7447 
   7448    assign(op1, get_gpr_w1(r1));
   7449    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   7450    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7451    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
   7452    put_gpr_w1(r1, mkexpr(result));
   7453 
   7454    return "sy";
   7455 }
   7456 
   7457 static HChar *
   7458 s390_irgen_SG(UChar r1, IRTemp op2addr)
   7459 {
   7460    IRTemp op1 = newTemp(Ity_I64);
   7461    IRTemp op2 = newTemp(Ity_I64);
   7462    IRTemp result = newTemp(Ity_I64);
   7463 
   7464    assign(op1, get_gpr_dw0(r1));
   7465    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   7466    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7467    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
   7468    put_gpr_dw0(r1, mkexpr(result));
   7469 
   7470    return "sg";
   7471 }
   7472 
   7473 static HChar *
   7474 s390_irgen_SGF(UChar r1, IRTemp op2addr)
   7475 {
   7476    IRTemp op1 = newTemp(Ity_I64);
   7477    IRTemp op2 = newTemp(Ity_I64);
   7478    IRTemp result = newTemp(Ity_I64);
   7479 
   7480    assign(op1, get_gpr_dw0(r1));
   7481    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   7482    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7483    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
   7484    put_gpr_dw0(r1, mkexpr(result));
   7485 
   7486    return "sgf";
   7487 }
   7488 
   7489 static HChar *
   7490 s390_irgen_SH(UChar r1, IRTemp op2addr)
   7491 {
   7492    IRTemp op1 = newTemp(Ity_I32);
   7493    IRTemp op2 = newTemp(Ity_I32);
   7494    IRTemp result = newTemp(Ity_I32);
   7495 
   7496    assign(op1, get_gpr_w1(r1));
   7497    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   7498    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7499    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
   7500    put_gpr_w1(r1, mkexpr(result));
   7501 
   7502    return "sh";
   7503 }
   7504 
   7505 static HChar *
   7506 s390_irgen_SHY(UChar r1, IRTemp op2addr)
   7507 {
   7508    IRTemp op1 = newTemp(Ity_I32);
   7509    IRTemp op2 = newTemp(Ity_I32);
   7510    IRTemp result = newTemp(Ity_I32);
   7511 
   7512    assign(op1, get_gpr_w1(r1));
   7513    assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
   7514    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7515    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
   7516    put_gpr_w1(r1, mkexpr(result));
   7517 
   7518    return "shy";
   7519 }
   7520 
   7521 static HChar *
   7522 s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
   7523 {
   7524    IRTemp op2 = newTemp(Ity_I32);
   7525    IRTemp op3 = newTemp(Ity_I32);
   7526    IRTemp result = newTemp(Ity_I32);
   7527 
   7528    assign(op2, get_gpr_w0(r1));
   7529    assign(op3, get_gpr_w0(r2));
   7530    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7531    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
   7532    put_gpr_w0(r1, mkexpr(result));
   7533 
   7534    return "shhhr";
   7535 }
   7536 
   7537 static HChar *
   7538 s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
   7539 {
   7540    IRTemp op2 = newTemp(Ity_I32);
   7541    IRTemp op3 = newTemp(Ity_I32);
   7542    IRTemp result = newTemp(Ity_I32);
   7543 
   7544    assign(op2, get_gpr_w0(r1));
   7545    assign(op3, get_gpr_w1(r2));
   7546    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7547    s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
   7548    put_gpr_w0(r1, mkexpr(result));
   7549 
   7550    return "shhlr";
   7551 }
   7552 
   7553 static HChar *
   7554 s390_irgen_SLR(UChar r1, UChar r2)
   7555 {
   7556    IRTemp op1 = newTemp(Ity_I32);
   7557    IRTemp op2 = newTemp(Ity_I32);
   7558    IRTemp result = newTemp(Ity_I32);
   7559 
   7560    assign(op1, get_gpr_w1(r1));
   7561    assign(op2, get_gpr_w1(r2));
   7562    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7563    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
   7564    put_gpr_w1(r1, mkexpr(result));
   7565 
   7566    return "slr";
   7567 }
   7568 
   7569 static HChar *
   7570 s390_irgen_SLGR(UChar r1, UChar r2)
   7571 {
   7572    IRTemp op1 = newTemp(Ity_I64);
   7573    IRTemp op2 = newTemp(Ity_I64);
   7574    IRTemp result = newTemp(Ity_I64);
   7575 
   7576    assign(op1, get_gpr_dw0(r1));
   7577    assign(op2, get_gpr_dw0(r2));
   7578    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7579    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
   7580    put_gpr_dw0(r1, mkexpr(result));
   7581 
   7582    return "slgr";
   7583 }
   7584 
   7585 static HChar *
   7586 s390_irgen_SLGFR(UChar r1, UChar r2)
   7587 {
   7588    IRTemp op1 = newTemp(Ity_I64);
   7589    IRTemp op2 = newTemp(Ity_I64);
   7590    IRTemp result = newTemp(Ity_I64);
   7591 
   7592    assign(op1, get_gpr_dw0(r1));
   7593    assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
   7594    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7595    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
   7596    put_gpr_dw0(r1, mkexpr(result));
   7597 
   7598    return "slgfr";
   7599 }
   7600 
   7601 static HChar *
   7602 s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
   7603 {
   7604    IRTemp op2 = newTemp(Ity_I32);
   7605    IRTemp op3 = newTemp(Ity_I32);
   7606    IRTemp result = newTemp(Ity_I32);
   7607 
   7608    assign(op2, get_gpr_w1(r2));
   7609    assign(op3, get_gpr_w1(r3));
   7610    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7611    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
   7612    put_gpr_w1(r1, mkexpr(result));
   7613 
   7614    return "slrk";
   7615 }
   7616 
   7617 static HChar *
   7618 s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
   7619 {
   7620    IRTemp op2 = newTemp(Ity_I64);
   7621    IRTemp op3 = newTemp(Ity_I64);
   7622    IRTemp result = newTemp(Ity_I64);
   7623 
   7624    assign(op2, get_gpr_dw0(r2));
   7625    assign(op3, get_gpr_dw0(r3));
   7626    assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
   7627    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
   7628    put_gpr_dw0(r1, mkexpr(result));
   7629 
   7630    return "slgrk";
   7631 }
   7632 
   7633 static HChar *
   7634 s390_irgen_SL(UChar r1, IRTemp op2addr)
   7635 {
   7636    IRTemp op1 = newTemp(Ity_I32);
   7637    IRTemp op2 = newTemp(Ity_I32);
   7638    IRTemp result = newTemp(Ity_I32);
   7639 
   7640    assign(op1, get_gpr_w1(r1));
   7641    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   7642    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7643    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
   7644    put_gpr_w1(r1, mkexpr(result));
   7645 
   7646    return "sl";
   7647 }
   7648 
   7649 static HChar *
   7650 s390_irgen_SLY(UChar r1, IRTemp op2addr)
   7651 {
   7652    IRTemp op1 = newTemp(Ity_I32);
   7653    IRTemp op2 = newTemp(Ity_I32);
   7654    IRTemp result = newTemp(Ity_I32);
   7655 
   7656    assign(op1, get_gpr_w1(r1));
   7657    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   7658    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
   7659    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
   7660    put_gpr_w1(r1, mkexpr(result));
   7661 
   7662    return "sly";
   7663 }
   7664 
   7665 static HChar *
   7666 s390_irgen_SLG(UChar r1, IRTemp op2addr)
   7667 {
   7668    IRTemp op1 = newTemp(Ity_I64);
   7669    IRTemp op2 = newTemp(Ity_I64);
   7670    IRTemp result = newTemp(Ity_I64);
   7671 
   7672    assign(op1, get_gpr_dw0(r1));
   7673    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   7674    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7675    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
   7676    put_gpr_dw0(r1, mkexpr(result));
   7677 
   7678    return "slg";
   7679 }
   7680 
   7681 static HChar *
   7682 s390_irgen_SLGF(UChar r1, IRTemp op2addr)
   7683 {
   7684    IRTemp op1 = newTemp(Ity_I64);
   7685    IRTemp op2 = newTemp(Ity_I64);
   7686    IRTemp result = newTemp(Ity_I64);
   7687 
   7688    assign(op1, get_gpr_dw0(r1));
   7689    assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
   7690    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
   7691    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
   7692    put_gpr_dw0(r1, mkexpr(result));
   7693 
   7694    return "slgf";
   7695 }
   7696 
   7697 static HChar *
   7698 s390_irgen_SLFI(UChar r1, UInt i2)
   7699 {
   7700    IRTemp op1 = newTemp(Ity_I32);
   7701    UInt op2;
   7702    IRTemp result = newTemp(Ity_I32);
   7703 
   7704    assign(op1, get_gpr_w1(r1));
   7705    op2 = i2;
   7706    assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
   7707    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
   7708                        mkU32(op2)));
   7709    put_gpr_w1(r1, mkexpr(result));
   7710 
   7711    return "slfi";
   7712 }
   7713 
   7714 static HChar *
   7715 s390_irgen_SLGFI(UChar r1, UInt i2)
   7716 {
   7717    IRTemp op1 = newTemp(Ity_I64);
   7718    ULong op2;
   7719    IRTemp result = newTemp(Ity_I64);
   7720 
   7721    assign(op1, get_gpr_dw0(r1));
   7722    op2 = (ULong)i2;
   7723    assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
   7724    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
   7725                        mkU64(op2)));
   7726    put_gpr_dw0(r1, mkexpr(result));
   7727 
   7728    return "slgfi";
   7729 }
   7730 
   7731 static HChar *
   7732 s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
   7733 {
   7734    IRTemp op2 = newTemp(Ity_I32);
   7735    IRTemp op3 = newTemp(Ity_I32);
   7736    IRTemp result = newTemp(Ity_I32);
   7737 
   7738    assign(op2, get_gpr_w0(r1));
   7739    assign(op3, get_gpr_w0(r2));
   7740    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7741    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
   7742    put_gpr_w0(r1, mkexpr(result));
   7743 
   7744    return "slhhhr";
   7745 }
   7746 
   7747 static HChar *
   7748 s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
   7749 {
   7750    IRTemp op2 = newTemp(Ity_I32);
   7751    IRTemp op3 = newTemp(Ity_I32);
   7752    IRTemp result = newTemp(Ity_I32);
   7753 
   7754    assign(op2, get_gpr_w0(r1));
   7755    assign(op3, get_gpr_w1(r2));
   7756    assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
   7757    s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
   7758    put_gpr_w0(r1, mkexpr(result));
   7759 
   7760    return "slhhlr";
   7761 }
   7762 
   7763 static HChar *
   7764 s390_irgen_SLBR(UChar r1, UChar r2)
   7765 {
   7766    IRTemp op1 = newTemp(Ity_I32);
   7767    IRTemp op2 = newTemp(Ity_I32);
   7768    IRTemp result = newTemp(Ity_I32);
   7769    IRTemp borrow_in = newTemp(Ity_I32);
   7770 
   7771    assign(op1, get_gpr_w1(r1));
   7772    assign(op2, get_gpr_w1(r2));
   7773    assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
   7774           s390_call_calculate_cc(), mkU8(1))));
   7775    assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
   7776           mkexpr(borrow_in)));
   7777    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
   7778    put_gpr_w1(r1, mkexpr(result));
   7779 
   7780    return "slbr";
   7781 }
   7782 
   7783 static HChar *
   7784 s390_irgen_SLBGR(UChar r1, UChar r2)
   7785 {
   7786    IRTemp op1 = newTemp(Ity_I64);
   7787    IRTemp op2 = newTemp(Ity_I64);
   7788    IRTemp result = newTemp(Ity_I64);
   7789    IRTemp borrow_in = newTemp(Ity_I64);
   7790 
   7791    assign(op1, get_gpr_dw0(r1));
   7792    assign(op2, get_gpr_dw0(r2));
   7793    assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
   7794           binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
   7795    assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
   7796           mkexpr(borrow_in)));
   7797    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
   7798    put_gpr_dw0(r1, mkexpr(result));
   7799 
   7800    return "slbgr";
   7801 }
   7802 
   7803 static HChar *
   7804 s390_irgen_SLB(UChar r1, IRTemp op2addr)
   7805 {
   7806    IRTemp op1 = newTemp(Ity_I32);
   7807    IRTemp op2 = newTemp(Ity_I32);
   7808    IRTemp result = newTemp(Ity_I32);
   7809    IRTemp borrow_in = newTemp(Ity_I32);
   7810 
   7811    assign(op1, get_gpr_w1(r1));
   7812    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   7813    assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
   7814           s390_call_calculate_cc(), mkU8(1))));
   7815    assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
   7816           mkexpr(borrow_in)));
   7817    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
   7818    put_gpr_w1(r1, mkexpr(result));
   7819 
   7820    return "slb";
   7821 }
   7822 
   7823 static HChar *
   7824 s390_irgen_SLBG(UChar r1, IRTemp op2addr)
   7825 {
   7826    IRTemp op1 = newTemp(Ity_I64);
   7827    IRTemp op2 = newTemp(Ity_I64);
   7828    IRTemp result = newTemp(Ity_I64);
   7829    IRTemp borrow_in = newTemp(Ity_I64);
   7830 
   7831    assign(op1, get_gpr_dw0(r1));
   7832    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   7833    assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
   7834           binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
   7835    assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
   7836           mkexpr(borrow_in)));
   7837    s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
   7838    put_gpr_dw0(r1, mkexpr(result));
   7839 
   7840    return "slbg";
   7841 }
   7842 
   7843 static HChar *
   7844 s390_irgen_SVC(UChar i)
   7845 {
   7846    IRTemp sysno = newTemp(Ity_I64);
   7847 
   7848    if (i != 0) {
   7849       assign(sysno, mkU64(i));
   7850    } else {
   7851       assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
   7852    }
   7853    system_call(mkexpr(sysno));
   7854 
   7855    return "svc";
   7856 }
   7857 
   7858 static HChar *
   7859 s390_irgen_TS(IRTemp op2addr)
   7860 {
   7861    IRTemp value = newTemp(Ity_I8);
   7862 
   7863    assign(value, load(Ity_I8, mkexpr(op2addr)));
   7864    s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
   7865    store(mkexpr(op2addr), mkU8(255));
   7866 
   7867    return "ts";
   7868 }
   7869 
   7870 static HChar *
   7871 s390_irgen_TM(UChar i2, IRTemp op1addr)
   7872 {
   7873    UChar mask;
   7874    IRTemp value = newTemp(Ity_I8);
   7875 
   7876    mask = i2;
   7877    assign(value, load(Ity_I8, mkexpr(op1addr)));
   7878    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
   7879                        mkU8(mask)));
   7880 
   7881    return "tm";
   7882 }
   7883 
   7884 static HChar *
   7885 s390_irgen_TMY(UChar i2, IRTemp op1addr)
   7886 {
   7887    UChar mask;
   7888    IRTemp value = newTemp(Ity_I8);
   7889 
   7890    mask = i2;
   7891    assign(value, load(Ity_I8, mkexpr(op1addr)));
   7892    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
   7893                        mkU8(mask)));
   7894 
   7895    return "tmy";
   7896 }
   7897 
   7898 static HChar *
   7899 s390_irgen_TMHH(UChar r1, UShort i2)
   7900 {
   7901    UShort mask;
   7902    IRTemp value = newTemp(Ity_I16);
   7903 
   7904    mask = i2;
   7905    assign(value, get_gpr_hw0(r1));
   7906    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
   7907                        mkU16(mask)));
   7908 
   7909    return "tmhh";
   7910 }
   7911 
   7912 static HChar *
   7913 s390_irgen_TMHL(UChar r1, UShort i2)
   7914 {
   7915    UShort mask;
   7916    IRTemp value = newTemp(Ity_I16);
   7917 
   7918    mask = i2;
   7919    assign(value, get_gpr_hw1(r1));
   7920    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
   7921                        mkU16(mask)));
   7922 
   7923    return "tmhl";
   7924 }
   7925 
   7926 static HChar *
   7927 s390_irgen_TMLH(UChar r1, UShort i2)
   7928 {
   7929    UShort mask;
   7930    IRTemp value = newTemp(Ity_I16);
   7931 
   7932    mask = i2;
   7933    assign(value, get_gpr_hw2(r1));
   7934    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
   7935                        mkU16(mask)));
   7936 
   7937    return "tmlh";
   7938 }
   7939 
   7940 static HChar *
   7941 s390_irgen_TMLL(UChar r1, UShort i2)
   7942 {
   7943    UShort mask;
   7944    IRTemp value = newTemp(Ity_I16);
   7945 
   7946    mask = i2;
   7947    assign(value, get_gpr_hw3(r1));
   7948    s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
   7949                        mkU16(mask)));
   7950 
   7951    return "tmll";
   7952 }
   7953 
   7954 static HChar *
   7955 s390_irgen_EFPC(UChar r1)
   7956 {
   7957    put_gpr_w1(r1, get_fpc_w0());
   7958 
   7959    return "efpc";
   7960 }
   7961 
   7962 static HChar *
   7963 s390_irgen_LER(UChar r1, UChar r2)
   7964 {
   7965    put_fpr_w0(r1, get_fpr_w0(r2));
   7966 
   7967    return "ler";
   7968 }
   7969 
   7970 static HChar *
   7971 s390_irgen_LDR(UChar r1, UChar r2)
   7972 {
   7973    put_fpr_dw0(r1, get_fpr_dw0(r2));
   7974 
   7975    return "ldr";
   7976 }
   7977 
   7978 static HChar *
   7979 s390_irgen_LXR(UChar r1, UChar r2)
   7980 {
   7981    put_fpr_dw0(r1, get_fpr_dw0(r2));
   7982    put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
   7983 
   7984    return "lxr";
   7985 }
   7986 
   7987 static HChar *
   7988 s390_irgen_LE(UChar r1, IRTemp op2addr)
   7989 {
   7990    put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
   7991 
   7992    return "le";
   7993 }
   7994 
   7995 static HChar *
   7996 s390_irgen_LD(UChar r1, IRTemp op2addr)
   7997 {
   7998    put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
   7999 
   8000    return "ld";
   8001 }
   8002 
   8003 static HChar *
   8004 s390_irgen_LEY(UChar r1, IRTemp op2addr)
   8005 {
   8006    put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
   8007 
   8008    return "ley";
   8009 }
   8010 
   8011 static HChar *
   8012 s390_irgen_LDY(UChar r1, IRTemp op2addr)
   8013 {
   8014    put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
   8015 
   8016    return "ldy";
   8017 }
   8018 
   8019 static HChar *
   8020 s390_irgen_LFPC(IRTemp op2addr)
   8021 {
   8022    put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
   8023 
   8024    return "lfpc";
   8025 }
   8026 
   8027 static HChar *
   8028 s390_irgen_LZER(UChar r1)
   8029 {
   8030    put_fpr_w0(r1, mkF32i(0x0));
   8031 
   8032    return "lzer";
   8033 }
   8034 
   8035 static HChar *
   8036 s390_irgen_LZDR(UChar r1)
   8037 {
   8038    put_fpr_dw0(r1, mkF64i(0x0));
   8039 
   8040    return "lzdr";
   8041 }
   8042 
   8043 static HChar *
   8044 s390_irgen_LZXR(UChar r1)
   8045 {
   8046    put_fpr_dw0(r1, mkF64i(0x0));
   8047    put_fpr_dw0(r1 + 2, mkF64i(0x0));
   8048 
   8049    return "lzxr";
   8050 }
   8051 
   8052 static HChar *
   8053 s390_irgen_SRNM(IRTemp op2addr)
   8054 {
   8055    UInt mask;
   8056 
   8057    mask = 3;
   8058    put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
   8059               binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
   8060               );
   8061 
   8062    return "srnm";
   8063 }
   8064 
   8065 static HChar *
   8066 s390_irgen_SFPC(UChar r1)
   8067 {
   8068    put_fpc_w0(get_gpr_w1(r1));
   8069 
   8070    return "sfpc";
   8071 }
   8072 
   8073 static HChar *
   8074 s390_irgen_STE(UChar r1, IRTemp op2addr)
   8075 {
   8076    store(mkexpr(op2addr), get_fpr_w0(r1));
   8077 
   8078    return "ste";
   8079 }
   8080 
   8081 static HChar *
   8082 s390_irgen_STD(UChar r1, IRTemp op2addr)
   8083 {
   8084    store(mkexpr(op2addr), get_fpr_dw0(r1));
   8085 
   8086    return "std";
   8087 }
   8088 
   8089 static HChar *
   8090 s390_irgen_STEY(UChar r1, IRTemp op2addr)
   8091 {
   8092    store(mkexpr(op2addr), get_fpr_w0(r1));
   8093 
   8094    return "stey";
   8095 }
   8096 
   8097 static HChar *
   8098 s390_irgen_STDY(UChar r1, IRTemp op2addr)
   8099 {
   8100    store(mkexpr(op2addr), get_fpr_dw0(r1));
   8101 
   8102    return "stdy";
   8103 }
   8104 
   8105 static HChar *
   8106 s390_irgen_STFPC(IRTemp op2addr)
   8107 {
   8108    store(mkexpr(op2addr), get_fpc_w0());
   8109 
   8110    return "stfpc";
   8111 }
   8112 
   8113 static HChar *
   8114 s390_irgen_AEBR(UChar r1, UChar r2)
   8115 {
   8116    IRTemp op1 = newTemp(Ity_F32);
   8117    IRTemp op2 = newTemp(Ity_F32);
   8118    IRTemp result = newTemp(Ity_F32);
   8119 
   8120    assign(op1, get_fpr_w0(r1));
   8121    assign(op2, get_fpr_w0(r2));
   8122    assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8123           mkexpr(op2)));
   8124    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8125    put_fpr_w0(r1, mkexpr(result));
   8126 
   8127    return "aebr";
   8128 }
   8129 
   8130 static HChar *
   8131 s390_irgen_ADBR(UChar r1, UChar r2)
   8132 {
   8133    IRTemp op1 = newTemp(Ity_F64);
   8134    IRTemp op2 = newTemp(Ity_F64);
   8135    IRTemp result = newTemp(Ity_F64);
   8136 
   8137    assign(op1, get_fpr_dw0(r1));
   8138    assign(op2, get_fpr_dw0(r2));
   8139    assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8140           mkexpr(op2)));
   8141    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8142    put_fpr_dw0(r1, mkexpr(result));
   8143 
   8144    return "adbr";
   8145 }
   8146 
   8147 static HChar *
   8148 s390_irgen_AEB(UChar r1, IRTemp op2addr)
   8149 {
   8150    IRTemp op1 = newTemp(Ity_F32);
   8151    IRTemp op2 = newTemp(Ity_F32);
   8152    IRTemp result = newTemp(Ity_F32);
   8153 
   8154    assign(op1, get_fpr_w0(r1));
   8155    assign(op2, load(Ity_F32, mkexpr(op2addr)));
   8156    assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8157           mkexpr(op2)));
   8158    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8159    put_fpr_w0(r1, mkexpr(result));
   8160 
   8161    return "aeb";
   8162 }
   8163 
   8164 static HChar *
   8165 s390_irgen_ADB(UChar r1, IRTemp op2addr)
   8166 {
   8167    IRTemp op1 = newTemp(Ity_F64);
   8168    IRTemp op2 = newTemp(Ity_F64);
   8169    IRTemp result = newTemp(Ity_F64);
   8170 
   8171    assign(op1, get_fpr_dw0(r1));
   8172    assign(op2, load(Ity_F64, mkexpr(op2addr)));
   8173    assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8174           mkexpr(op2)));
   8175    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8176    put_fpr_dw0(r1, mkexpr(result));
   8177 
   8178    return "adb";
   8179 }
   8180 
   8181 static HChar *
   8182 s390_irgen_CEFBR(UChar r1, UChar r2)
   8183 {
   8184    IRTemp op2 = newTemp(Ity_I32);
   8185 
   8186    assign(op2, get_gpr_w1(r2));
   8187    put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
   8188 
   8189    return "cefbr";
   8190 }
   8191 
   8192 static HChar *
   8193 s390_irgen_CDFBR(UChar r1, UChar r2)
   8194 {
   8195    IRTemp op2 = newTemp(Ity_I32);
   8196 
   8197    assign(op2, get_gpr_w1(r2));
   8198    put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
   8199 
   8200    return "cdfbr";
   8201 }
   8202 
   8203 static HChar *
   8204 s390_irgen_CEGBR(UChar r1, UChar r2)
   8205 {
   8206    IRTemp op2 = newTemp(Ity_I64);
   8207 
   8208    assign(op2, get_gpr_dw0(r2));
   8209    put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
   8210 
   8211    return "cegbr";
   8212 }
   8213 
   8214 static HChar *
   8215 s390_irgen_CDGBR(UChar r1, UChar r2)
   8216 {
   8217    IRTemp op2 = newTemp(Ity_I64);
   8218 
   8219    assign(op2, get_gpr_dw0(r2));
   8220    put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
   8221 
   8222    return "cdgbr";
   8223 }
   8224 
   8225 static HChar *
   8226 s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
   8227 {
   8228    IRTemp op = newTemp(Ity_F32);
   8229    IRTemp result = newTemp(Ity_I32);
   8230 
   8231    assign(op, get_fpr_w0(r2));
   8232    assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
   8233           mkexpr(op)));
   8234    put_gpr_w1(r1, mkexpr(result));
   8235    s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
   8236 
   8237    return "cfebr";
   8238 }
   8239 
   8240 static HChar *
   8241 s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
   8242 {
   8243    IRTemp op = newTemp(Ity_F64);
   8244    IRTemp result = newTemp(Ity_I32);
   8245 
   8246    assign(op, get_fpr_dw0(r2));
   8247    assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
   8248           mkexpr(op)));
   8249    put_gpr_w1(r1, mkexpr(result));
   8250    s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
   8251 
   8252    return "cfdbr";
   8253 }
   8254 
   8255 static HChar *
   8256 s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
   8257 {
   8258    IRTemp op = newTemp(Ity_F32);
   8259    IRTemp result = newTemp(Ity_I64);
   8260 
   8261    assign(op, get_fpr_w0(r2));
   8262    assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
   8263           mkexpr(op)));
   8264    put_gpr_dw0(r1, mkexpr(result));
   8265    s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
   8266 
   8267    return "cgebr";
   8268 }
   8269 
   8270 static HChar *
   8271 s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
   8272 {
   8273    IRTemp op = newTemp(Ity_F64);
   8274    IRTemp result = newTemp(Ity_I64);
   8275 
   8276    assign(op, get_fpr_dw0(r2));
   8277    assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
   8278           mkexpr(op)));
   8279    put_gpr_dw0(r1, mkexpr(result));
   8280    s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
   8281 
   8282    return "cgdbr";
   8283 }
   8284 
   8285 static HChar *
   8286 s390_irgen_DEBR(UChar r1, UChar r2)
   8287 {
   8288    IRTemp op1 = newTemp(Ity_F32);
   8289    IRTemp op2 = newTemp(Ity_F32);
   8290    IRTemp result = newTemp(Ity_F32);
   8291 
   8292    assign(op1, get_fpr_w0(r1));
   8293    assign(op2, get_fpr_w0(r2));
   8294    assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8295           mkexpr(op2)));
   8296    put_fpr_w0(r1, mkexpr(result));
   8297 
   8298    return "debr";
   8299 }
   8300 
   8301 static HChar *
   8302 s390_irgen_DDBR(UChar r1, UChar r2)
   8303 {
   8304    IRTemp op1 = newTemp(Ity_F64);
   8305    IRTemp op2 = newTemp(Ity_F64);
   8306    IRTemp result = newTemp(Ity_F64);
   8307 
   8308    assign(op1, get_fpr_dw0(r1));
   8309    assign(op2, get_fpr_dw0(r2));
   8310    assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8311           mkexpr(op2)));
   8312    put_fpr_dw0(r1, mkexpr(result));
   8313 
   8314    return "ddbr";
   8315 }
   8316 
   8317 static HChar *
   8318 s390_irgen_DEB(UChar r1, IRTemp op2addr)
   8319 {
   8320    IRTemp op1 = newTemp(Ity_F32);
   8321    IRTemp op2 = newTemp(Ity_F32);
   8322    IRTemp result = newTemp(Ity_F32);
   8323 
   8324    assign(op1, get_fpr_w0(r1));
   8325    assign(op2, load(Ity_F32, mkexpr(op2addr)));
   8326    assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8327           mkexpr(op2)));
   8328    put_fpr_w0(r1, mkexpr(result));
   8329 
   8330    return "deb";
   8331 }
   8332 
   8333 static HChar *
   8334 s390_irgen_DDB(UChar r1, IRTemp op2addr)
   8335 {
   8336    IRTemp op1 = newTemp(Ity_F64);
   8337    IRTemp op2 = newTemp(Ity_F64);
   8338    IRTemp result = newTemp(Ity_F64);
   8339 
   8340    assign(op1, get_fpr_dw0(r1));
   8341    assign(op2, load(Ity_F64, mkexpr(op2addr)));
   8342    assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8343           mkexpr(op2)));
   8344    put_fpr_dw0(r1, mkexpr(result));
   8345 
   8346    return "ddb";
   8347 }
   8348 
   8349 static HChar *
   8350 s390_irgen_LTEBR(UChar r1, UChar r2)
   8351 {
   8352    IRTemp result = newTemp(Ity_F32);
   8353 
   8354    assign(result, get_fpr_w0(r2));
   8355    put_fpr_w0(r1, mkexpr(result));
   8356    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8357 
   8358    return "ltebr";
   8359 }
   8360 
   8361 static HChar *
   8362 s390_irgen_LTDBR(UChar r1, UChar r2)
   8363 {
   8364    IRTemp result = newTemp(Ity_F64);
   8365 
   8366    assign(result, get_fpr_dw0(r2));
   8367    put_fpr_dw0(r1, mkexpr(result));
   8368    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8369 
   8370    return "ltdbr";
   8371 }
   8372 
   8373 static HChar *
   8374 s390_irgen_LCEBR(UChar r1, UChar r2)
   8375 {
   8376    IRTemp result = newTemp(Ity_F32);
   8377 
   8378    assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
   8379    put_fpr_w0(r1, mkexpr(result));
   8380    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8381 
   8382    return "lcebr";
   8383 }
   8384 
   8385 static HChar *
   8386 s390_irgen_LCDBR(UChar r1, UChar r2)
   8387 {
   8388    IRTemp result = newTemp(Ity_F64);
   8389 
   8390    assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
   8391    put_fpr_dw0(r1, mkexpr(result));
   8392    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8393 
   8394    return "lcdbr";
   8395 }
   8396 
   8397 static HChar *
   8398 s390_irgen_LDEBR(UChar r1, UChar r2)
   8399 {
   8400    IRTemp op = newTemp(Ity_F32);
   8401 
   8402    assign(op, get_fpr_w0(r2));
   8403    put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
   8404 
   8405    return "ldebr";
   8406 }
   8407 
   8408 static HChar *
   8409 s390_irgen_LDEB(UChar r1, IRTemp op2addr)
   8410 {
   8411    IRTemp op = newTemp(Ity_F32);
   8412 
   8413    assign(op, load(Ity_F32, mkexpr(op2addr)));
   8414    put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
   8415 
   8416    return "ldeb";
   8417 }
   8418 
   8419 static HChar *
   8420 s390_irgen_LEDBR(UChar r1, UChar r2)
   8421 {
   8422    IRTemp op = newTemp(Ity_F64);
   8423 
   8424    assign(op, get_fpr_dw0(r2));
   8425    put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
   8426 
   8427    return "ledbr";
   8428 }
   8429 
   8430 static HChar *
   8431 s390_irgen_MEEBR(UChar r1, UChar r2)
   8432 {
   8433    IRTemp op1 = newTemp(Ity_F32);
   8434    IRTemp op2 = newTemp(Ity_F32);
   8435    IRTemp result = newTemp(Ity_F32);
   8436 
   8437    assign(op1, get_fpr_w0(r1));
   8438    assign(op2, get_fpr_w0(r2));
   8439    assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8440           mkexpr(op2)));
   8441    put_fpr_w0(r1, mkexpr(result));
   8442 
   8443    return "meebr";
   8444 }
   8445 
   8446 static HChar *
   8447 s390_irgen_MDBR(UChar r1, UChar r2)
   8448 {
   8449    IRTemp op1 = newTemp(Ity_F64);
   8450    IRTemp op2 = newTemp(Ity_F64);
   8451    IRTemp result = newTemp(Ity_F64);
   8452 
   8453    assign(op1, get_fpr_dw0(r1));
   8454    assign(op2, get_fpr_dw0(r2));
   8455    assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8456           mkexpr(op2)));
   8457    put_fpr_dw0(r1, mkexpr(result));
   8458 
   8459    return "mdbr";
   8460 }
   8461 
   8462 static HChar *
   8463 s390_irgen_MEEB(UChar r1, IRTemp op2addr)
   8464 {
   8465    IRTemp op1 = newTemp(Ity_F32);
   8466    IRTemp op2 = newTemp(Ity_F32);
   8467    IRTemp result = newTemp(Ity_F32);
   8468 
   8469    assign(op1, get_fpr_w0(r1));
   8470    assign(op2, load(Ity_F32, mkexpr(op2addr)));
   8471    assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8472           mkexpr(op2)));
   8473    put_fpr_w0(r1, mkexpr(result));
   8474 
   8475    return "meeb";
   8476 }
   8477 
   8478 static HChar *
   8479 s390_irgen_MDB(UChar r1, IRTemp op2addr)
   8480 {
   8481    IRTemp op1 = newTemp(Ity_F64);
   8482    IRTemp op2 = newTemp(Ity_F64);
   8483    IRTemp result = newTemp(Ity_F64);
   8484 
   8485    assign(op1, get_fpr_dw0(r1));
   8486    assign(op2, load(Ity_F64, mkexpr(op2addr)));
   8487    assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8488           mkexpr(op2)));
   8489    put_fpr_dw0(r1, mkexpr(result));
   8490 
   8491    return "mdb";
   8492 }
   8493 
   8494 static HChar *
   8495 s390_irgen_SEBR(UChar r1, UChar r2)
   8496 {
   8497    IRTemp op1 = newTemp(Ity_F32);
   8498    IRTemp op2 = newTemp(Ity_F32);
   8499    IRTemp result = newTemp(Ity_F32);
   8500 
   8501    assign(op1, get_fpr_w0(r1));
   8502    assign(op2, get_fpr_w0(r2));
   8503    assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8504           mkexpr(op2)));
   8505    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8506    put_fpr_w0(r1, mkexpr(result));
   8507 
   8508    return "sebr";
   8509 }
   8510 
   8511 static HChar *
   8512 s390_irgen_SDBR(UChar r1, UChar r2)
   8513 {
   8514    IRTemp op1 = newTemp(Ity_F64);
   8515    IRTemp op2 = newTemp(Ity_F64);
   8516    IRTemp result = newTemp(Ity_F64);
   8517 
   8518    assign(op1, get_fpr_dw0(r1));
   8519    assign(op2, get_fpr_dw0(r2));
   8520    assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8521           mkexpr(op2)));
   8522    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8523    put_fpr_dw0(r1, mkexpr(result));
   8524 
   8525    return "sdbr";
   8526 }
   8527 
   8528 static HChar *
   8529 s390_irgen_SEB(UChar r1, IRTemp op2addr)
   8530 {
   8531    IRTemp op1 = newTemp(Ity_F32);
   8532    IRTemp op2 = newTemp(Ity_F32);
   8533    IRTemp result = newTemp(Ity_F32);
   8534 
   8535    assign(op1, get_fpr_w0(r1));
   8536    assign(op2, load(Ity_F32, mkexpr(op2addr)));
   8537    assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
   8538           mkexpr(op2)));
   8539    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
   8540    put_fpr_w0(r1, mkexpr(result));
   8541 
   8542    return "seb";
   8543 }
   8544 
   8545 static HChar *
   8546 s390_irgen_SDB(UChar r1, IRTemp op2addr)
   8547 {
   8548    IRTemp op1 = newTemp(Ity_F64);
   8549    IRTemp op2 = newTemp(Ity_F64);
   8550    IRTemp result = newTemp(Ity_F64);
   8551 
   8552    assign(op1, get_fpr_dw0(r1));
   8553    assign(op2, load(Ity_F64, mkexpr(op2addr)));
   8554    assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
   8555           mkexpr(op2)));
   8556    s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
   8557    put_fpr_dw0(r1, mkexpr(result));
   8558 
   8559    return "sdb";
   8560 }
   8561 
   8562 
   8563 static HChar *
   8564 s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
   8565 {
   8566    IRTemp current1 = newTemp(Ity_I8);
   8567    IRTemp current2 = newTemp(Ity_I8);
   8568    IRTemp counter = newTemp(Ity_I64);
   8569 
   8570    assign(counter, get_counter_dw0());
   8571    put_counter_dw0(mkU64(0));
   8572 
   8573    assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
   8574                                        mkexpr(counter))));
   8575    assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
   8576                                        mkexpr(counter))));
   8577    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
   8578                       False);
   8579 
   8580    /* Both fields differ ? */
   8581    if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
   8582                      guest_IA_next_instr);
   8583 
   8584    /* Check for end of field */
   8585    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   8586    if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
   8587                      guest_IA_curr_instr);
   8588    put_counter_dw0(mkU64(0));
   8589 
   8590    return "clc";
   8591 }
   8592 
   8593 static HChar *
   8594 s390_irgen_CLCL(UChar r1, UChar r2)
   8595 {
   8596    IRTemp addr1 = newTemp(Ity_I64);
   8597    IRTemp addr2 = newTemp(Ity_I64);
   8598    IRTemp addr1_load = newTemp(Ity_I64);
   8599    IRTemp addr2_load = newTemp(Ity_I64);
   8600    IRTemp len1 = newTemp(Ity_I32);
   8601    IRTemp len2 = newTemp(Ity_I32);
   8602    IRTemp r1p1 = newTemp(Ity_I32);   /* contents of r1 + 1 */
   8603    IRTemp r2p1 = newTemp(Ity_I32);   /* contents of r2 + 1 */
   8604    IRTemp single1 = newTemp(Ity_I8);
   8605    IRTemp single2 = newTemp(Ity_I8);
   8606    IRTemp pad = newTemp(Ity_I8);
   8607 
   8608    assign(addr1, get_gpr_dw0(r1));
   8609    assign(r1p1, get_gpr_w1(r1 + 1));
   8610    assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
   8611    assign(addr2, get_gpr_dw0(r2));
   8612    assign(r2p1, get_gpr_w1(r2 + 1));
   8613    assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
   8614    assign(pad, get_gpr_b4(r2 + 1));
   8615 
   8616    /* len1 == 0 and len2 == 0? Exit */
   8617    s390_cc_set(0);
   8618    if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
   8619                                               mkexpr(len2)), mkU32(0)),
   8620                      guest_IA_next_instr);
   8621 
   8622    /* Because mkite evaluates both the then-clause and the else-clause
   8623       we cannot load directly from addr1 here. If len1 is 0, then adddr1
   8624       may be NULL and loading from there would segfault. So we provide a
   8625       valid dummy address in that case. Loading from there does no harm and
   8626       the value will be discarded at runtime. */
   8627    assign(addr1_load,
   8628           mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
   8629                 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
   8630    assign(single1,
   8631           mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
   8632                 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
   8633 
   8634    assign(addr2_load,
   8635           mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   8636                 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
   8637    assign(single2,
   8638           mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   8639                 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
   8640 
   8641    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
   8642    /* Fields differ ? */
   8643    if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
   8644                      guest_IA_next_instr);
   8645 
   8646    /* Update len1 and addr1, unless len1 == 0. */
   8647    put_gpr_dw0(r1,
   8648                mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
   8649                      mkexpr(addr1),
   8650                      binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
   8651 
   8652    /* When updating len1 we must not modify bits (r1+1)[0:39] */
   8653    put_gpr_w1(r1 + 1,
   8654               mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
   8655                     binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
   8656                     binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
   8657 
   8658    /* Update len2 and addr2, unless len2 == 0. */
   8659    put_gpr_dw0(r2,
   8660                mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   8661                      mkexpr(addr2),
   8662                      binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
   8663 
   8664    /* When updating len2 we must not modify bits (r2+1)[0:39] */
   8665    put_gpr_w1(r2 + 1,
   8666               mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   8667                     binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
   8668                     binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
   8669 
   8670    always_goto_and_chase(guest_IA_curr_instr);
   8671 
   8672    return "clcl";
   8673 }
   8674 
   8675 static HChar *
   8676 s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
   8677 {
   8678    IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
   8679 
   8680    addr1 = newTemp(Ity_I64);
   8681    addr3 = newTemp(Ity_I64);
   8682    addr1_load = newTemp(Ity_I64);
   8683    addr3_load = newTemp(Ity_I64);
   8684    len1 = newTemp(Ity_I64);
   8685    len3 = newTemp(Ity_I64);
   8686    single1 = newTemp(Ity_I8);
   8687    single3 = newTemp(Ity_I8);
   8688 
   8689    assign(addr1, get_gpr_dw0(r1));
   8690    assign(len1, get_gpr_dw0(r1 + 1));
   8691    assign(addr3, get_gpr_dw0(r3));
   8692    assign(len3, get_gpr_dw0(r3 + 1));
   8693 
   8694    /* len1 == 0 and len3 == 0? Exit */
   8695    s390_cc_set(0);
   8696    if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
   8697                                              mkexpr(len3)), mkU64(0)),
   8698                      guest_IA_next_instr);
   8699 
   8700    /* A mux requires both ways to be possible. This is a way to prevent clcle
   8701       from reading from addr1 if it should read from the pad. Since the pad
   8702       has no address, just read from the instruction, we discard that anyway */
   8703    assign(addr1_load,
   8704           mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
   8705                 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
   8706 
   8707    /* same for addr3 */
   8708    assign(addr3_load,
   8709           mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   8710                 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
   8711 
   8712    assign(single1,
   8713           mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
   8714                 unop(Iop_64to8, mkexpr(pad2)),
   8715                 load(Ity_I8, mkexpr(addr1_load))));
   8716 
   8717    assign(single3,
   8718           mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   8719                 unop(Iop_64to8, mkexpr(pad2)),
   8720                 load(Ity_I8, mkexpr(addr3_load))));
   8721 
   8722    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
   8723    /* Both fields differ ? */
   8724    if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
   8725                      guest_IA_next_instr);
   8726 
   8727    /* If a length in 0 we must not change this length and the address */
   8728    put_gpr_dw0(r1,
   8729                mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
   8730                      mkexpr(addr1),
   8731                      binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
   8732 
   8733    put_gpr_dw0(r1 + 1,
   8734                mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
   8735                      mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
   8736 
   8737    put_gpr_dw0(r3,
   8738                mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   8739                      mkexpr(addr3),
   8740                      binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
   8741 
   8742    put_gpr_dw0(r3 + 1,
   8743                mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   8744                      mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
   8745 
   8746    /* The architecture requires that we exit with CC3 after a machine specific
   8747       amount of bytes. We do that if len1+len3 % 4096 == 0 */
   8748    s390_cc_set(3);
   8749    if_condition_goto(binop(Iop_CmpEQ64,
   8750                            binop(Iop_And64,
   8751                                  binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
   8752                                  mkU64(0xfff)),
   8753                            mkU64(0)),
   8754                      guest_IA_next_instr);
   8755 
   8756    always_goto_and_chase(guest_IA_curr_instr);
   8757 
   8758    return "clcle";
   8759 }
   8760 
   8761 static void
   8762 s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
   8763 {
   8764    IRTemp old1 = newTemp(Ity_I8);
   8765    IRTemp old2 = newTemp(Ity_I8);
   8766    IRTemp new1 = newTemp(Ity_I8);
   8767    IRTemp counter = newTemp(Ity_I32);
   8768    IRTemp addr1 = newTemp(Ity_I64);
   8769 
   8770    assign(counter, get_counter_w0());
   8771 
   8772    assign(addr1, binop(Iop_Add64, mkexpr(start1),
   8773                        unop(Iop_32Uto64, mkexpr(counter))));
   8774 
   8775    assign(old1, load(Ity_I8, mkexpr(addr1)));
   8776    assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
   8777                                    unop(Iop_32Uto64,mkexpr(counter)))));
   8778    assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
   8779 
   8780    store(mkexpr(addr1),
   8781          mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
   8782                mkU8(0), mkexpr(new1)));
   8783    put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
   8784                         get_counter_w1()));
   8785 
   8786    /* Check for end of field */
   8787    put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
   8788    if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
   8789                      guest_IA_curr_instr);
   8790    s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
   8791                       False);
   8792    put_counter_dw0(mkU64(0));
   8793 }
   8794 
   8795 
   8796 static void
   8797 s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
   8798 {
   8799    IRTemp current1 = newTemp(Ity_I8);
   8800    IRTemp current2 = newTemp(Ity_I8);
   8801    IRTemp counter = newTemp(Ity_I64);
   8802 
   8803    assign(counter, get_counter_dw0());
   8804    put_counter_dw0(mkU64(0));
   8805 
   8806    assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
   8807                                        mkexpr(counter))));
   8808    assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
   8809                                        mkexpr(counter))));
   8810    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
   8811                       False);
   8812 
   8813    /* Both fields differ ? */
   8814    if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
   8815                      guest_IA_next_instr);
   8816 
   8817    /* Check for end of field */
   8818    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   8819    if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
   8820                      guest_IA_curr_instr);
   8821    put_counter_dw0(mkU64(0));
   8822 }
   8823 
   8824 static void
   8825 s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
   8826 {
   8827    IRTemp counter = newTemp(Ity_I64);
   8828 
   8829    assign(counter, get_counter_dw0());
   8830 
   8831    store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
   8832          load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
   8833 
   8834    /* Check for end of field */
   8835    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   8836    if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
   8837                      guest_IA_curr_instr);
   8838    put_counter_dw0(mkU64(0));
   8839 }
   8840 
   8841 
   8842 
   8843 static void
   8844 s390_irgen_EX_SS(UChar r, IRTemp addr2,
   8845 void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
   8846 {
   8847    struct SS {
   8848       unsigned int op :  8;
   8849       unsigned int l  :  8;
   8850       unsigned int b1 :  4;
   8851       unsigned int d1 : 12;
   8852       unsigned int b2 :  4;
   8853       unsigned int d2 : 12;
   8854    };
   8855    union {
   8856       struct SS dec;
   8857       unsigned long bytes;
   8858    } ss;
   8859    IRTemp cond;
   8860    IRDirty *d;
   8861    IRTemp torun;
   8862 
   8863    IRTemp start1 = newTemp(Ity_I64);
   8864    IRTemp start2 = newTemp(Ity_I64);
   8865    IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
   8866    cond = newTemp(Ity_I1);
   8867    torun = newTemp(Ity_I64);
   8868 
   8869    assign(torun, load(Ity_I64, mkexpr(addr2)));
   8870    /* Start with a check that the saved code is still correct */
   8871    assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
   8872    /* If not, save the new value */
   8873    d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
   8874                           mkIRExprVec_1(mkexpr(torun)));
   8875    d->guard = mkexpr(cond);
   8876    stmt(IRStmt_Dirty(d));
   8877 
   8878    /* and restart */
   8879    stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
   8880    stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
   8881    stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
   8882         IRConst_U64(guest_IA_curr_instr)));
   8883 
   8884    ss.bytes = last_execute_target;
   8885    assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
   8886           ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
   8887    assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
   8888           ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
   8889    assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
   8890           r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
   8891    irgen(len, start1, start2);
   8892    last_execute_target = 0;
   8893 }
   8894 
   8895 static HChar *
   8896 s390_irgen_EX(UChar r1, IRTemp addr2)
   8897 {
   8898    switch(last_execute_target & 0xff00000000000000ULL) {
   8899    case 0:
   8900    {
   8901       /* no code information yet */
   8902       IRDirty *d;
   8903 
   8904       /* so safe the code... */
   8905       d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
   8906                              mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
   8907       stmt(IRStmt_Dirty(d));
   8908       /* and restart */
   8909       stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
   8910       stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
   8911       stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
   8912            IRConst_U64(guest_IA_curr_instr)));
   8913       /* we know that this will be invalidated */
   8914       irsb->next = mkU64(guest_IA_next_instr);
   8915       dis_res->whatNext = Dis_StopHere;
   8916       break;
   8917    }
   8918 
   8919    case 0xd200000000000000ULL:
   8920       /* special case MVC */
   8921       s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
   8922       return "mvc via ex";
   8923 
   8924    case 0xd500000000000000ULL:
   8925       /* special case CLC */
   8926       s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
   8927       return "clc via ex";
   8928 
   8929    case 0xd700000000000000ULL:
   8930       /* special case XC */
   8931       s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
   8932       return "xc via ex";
   8933 
   8934 
   8935    default:
   8936    {
   8937       /* everything else will get a self checking prefix that also checks the
   8938          register content */
   8939       IRDirty *d;
   8940       UChar *bytes;
   8941       IRTemp cond;
   8942       IRTemp orperand;
   8943       IRTemp torun;
   8944 
   8945       cond = newTemp(Ity_I1);
   8946       orperand = newTemp(Ity_I64);
   8947       torun = newTemp(Ity_I64);
   8948 
   8949       if (r1 == 0)
   8950          assign(orperand, mkU64(0));
   8951       else
   8952          assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
   8953       /* This code is going to be translated */
   8954       assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
   8955              binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
   8956 
   8957       /* Start with a check that saved code is still correct */
   8958       assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
   8959              mkU64(last_execute_target)));
   8960       /* If not, save the new value */
   8961       d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
   8962                              mkIRExprVec_1(mkexpr(torun)));
   8963       d->guard = mkexpr(cond);
   8964       stmt(IRStmt_Dirty(d));
   8965 
   8966       /* and restart */
   8967       stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
   8968       stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
   8969       stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
   8970            IRConst_U64(guest_IA_curr_instr)));
   8971 
   8972       /* Now comes the actual translation */
   8973       bytes = (UChar *) &last_execute_target;
   8974       s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
   8975                             dis_res);
   8976       if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   8977          vex_printf("    which was executed by\n");
   8978       /* dont make useless translations in the next execute */
   8979       last_execute_target = 0;
   8980    }
   8981    }
   8982    return "ex";
   8983 }
   8984 
   8985 static HChar *
   8986 s390_irgen_EXRL(UChar r1, UInt offset)
   8987 {
   8988    IRTemp addr = newTemp(Ity_I64);
   8989    /* we might save one round trip because we know the target */
   8990    if (!last_execute_target)
   8991       last_execute_target = *(ULong *)(HWord)
   8992                              (guest_IA_curr_instr + offset * 2UL);
   8993    assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
   8994    s390_irgen_EX(r1, addr);
   8995    return "exrl";
   8996 }
   8997 
   8998 static HChar *
   8999 s390_irgen_IPM(UChar r1)
   9000 {
   9001    // As long as we dont support SPM, lets just assume 0 as program mask
   9002    put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
   9003                        binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
   9004 
   9005    return "ipm";
   9006 }
   9007 
   9008 
   9009 static HChar *
   9010 s390_irgen_SRST(UChar r1, UChar r2)
   9011 {
   9012    IRTemp address = newTemp(Ity_I64);
   9013    IRTemp next = newTemp(Ity_I64);
   9014    IRTemp delim = newTemp(Ity_I8);
   9015    IRTemp counter = newTemp(Ity_I64);
   9016    IRTemp byte = newTemp(Ity_I8);
   9017 
   9018    assign(address, get_gpr_dw0(r2));
   9019    assign(next, get_gpr_dw0(r1));
   9020 
   9021    assign(counter, get_counter_dw0());
   9022    put_counter_dw0(mkU64(0));
   9023 
   9024    // start = next?  CC=2 and out r1 and r2 unchanged
   9025    s390_cc_set(2);
   9026    put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
   9027    if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
   9028                      guest_IA_next_instr);
   9029 
   9030    assign(byte, load(Ity_I8, mkexpr(address)));
   9031    assign(delim, get_gpr_b7(0));
   9032 
   9033    // byte = delim? CC=1, R1=address
   9034    s390_cc_set(1);
   9035    put_gpr_dw0(r1,  mkexpr(address));
   9036    if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
   9037                      guest_IA_next_instr);
   9038 
   9039    // else: all equal, no end yet, loop
   9040    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   9041    put_gpr_dw0(r1, mkexpr(next));
   9042    put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
   9043    stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
   9044                     Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
   9045    // >= 256 bytes done CC=3
   9046    s390_cc_set(3);
   9047    put_counter_dw0(mkU64(0));
   9048 
   9049    return "srst";
   9050 }
   9051 
   9052 static HChar *
   9053 s390_irgen_CLST(UChar r1, UChar r2)
   9054 {
   9055    IRTemp address1 = newTemp(Ity_I64);
   9056    IRTemp address2 = newTemp(Ity_I64);
   9057    IRTemp end = newTemp(Ity_I8);
   9058    IRTemp counter = newTemp(Ity_I64);
   9059    IRTemp byte1 = newTemp(Ity_I8);
   9060    IRTemp byte2 = newTemp(Ity_I8);
   9061 
   9062    assign(address1, get_gpr_dw0(r1));
   9063    assign(address2, get_gpr_dw0(r2));
   9064    assign(end, get_gpr_b7(0));
   9065    assign(counter, get_counter_dw0());
   9066    put_counter_dw0(mkU64(0));
   9067    assign(byte1, load(Ity_I8, mkexpr(address1)));
   9068    assign(byte2, load(Ity_I8, mkexpr(address2)));
   9069 
   9070    // end in both? all equal, reset r1 and r2 to start values
   9071    s390_cc_set(0);
   9072    put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
   9073    put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
   9074    if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
   9075                            binop(Iop_Or8,
   9076                                  binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
   9077                                  binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
   9078                      guest_IA_next_instr);
   9079 
   9080    put_gpr_dw0(r1, mkexpr(address1));
   9081    put_gpr_dw0(r2, mkexpr(address2));
   9082 
   9083    // End found in string1
   9084    s390_cc_set(1);
   9085    if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
   9086                      guest_IA_next_instr);
   9087 
   9088    // End found in string2
   9089    s390_cc_set(2);
   9090    if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
   9091                      guest_IA_next_instr);
   9092 
   9093    // string1 < string2
   9094    s390_cc_set(1);
   9095    if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
   9096                            unop(Iop_8Uto32, mkexpr(byte2))),
   9097                      guest_IA_next_instr);
   9098 
   9099    // string2 < string1
   9100    s390_cc_set(2);
   9101    if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
   9102                            unop(Iop_8Uto32, mkexpr(byte1))),
   9103                      guest_IA_next_instr);
   9104 
   9105    // else: all equal, no end yet, loop
   9106    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   9107    put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
   9108    put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
   9109    stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
   9110                     Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
   9111    // >= 256 bytes done CC=3
   9112    s390_cc_set(3);
   9113    put_counter_dw0(mkU64(0));
   9114 
   9115    return "clst";
   9116 }
   9117 
   9118 static void
   9119 s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
   9120 {
   9121    UChar reg;
   9122    IRTemp addr = newTemp(Ity_I64);
   9123 
   9124    assign(addr, mkexpr(op2addr));
   9125    reg = r1;
   9126    do {
   9127       IRTemp old = addr;
   9128 
   9129       reg %= 16;
   9130       put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
   9131       addr = newTemp(Ity_I64);
   9132       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9133       reg++;
   9134    } while (reg != (r3 + 1));
   9135 }
   9136 
   9137 static HChar *
   9138 s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
   9139 {
   9140    s390_irgen_load_multiple_32bit(r1, r3, op2addr);
   9141 
   9142    return "lm";
   9143 }
   9144 
   9145 static HChar *
   9146 s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
   9147 {
   9148    s390_irgen_load_multiple_32bit(r1, r3, op2addr);
   9149 
   9150    return "lmy";
   9151 }
   9152 
   9153 static HChar *
   9154 s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
   9155 {
   9156    UChar reg;
   9157    IRTemp addr = newTemp(Ity_I64);
   9158 
   9159    assign(addr, mkexpr(op2addr));
   9160    reg = r1;
   9161    do {
   9162       IRTemp old = addr;
   9163 
   9164       reg %= 16;
   9165       put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
   9166       addr = newTemp(Ity_I64);
   9167       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9168       reg++;
   9169    } while (reg != (r3 + 1));
   9170 
   9171    return "lmh";
   9172 }
   9173 
   9174 static HChar *
   9175 s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
   9176 {
   9177    UChar reg;
   9178    IRTemp addr = newTemp(Ity_I64);
   9179 
   9180    assign(addr, mkexpr(op2addr));
   9181    reg = r1;
   9182    do {
   9183       IRTemp old = addr;
   9184 
   9185       reg %= 16;
   9186       put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
   9187       addr = newTemp(Ity_I64);
   9188       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
   9189       reg++;
   9190    } while (reg != (r3 + 1));
   9191 
   9192    return "lmg";
   9193 }
   9194 
   9195 static void
   9196 s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
   9197 {
   9198    UChar reg;
   9199    IRTemp addr = newTemp(Ity_I64);
   9200 
   9201    assign(addr, mkexpr(op2addr));
   9202    reg = r1;
   9203    do {
   9204       IRTemp old = addr;
   9205 
   9206       reg %= 16;
   9207       store(mkexpr(addr), get_gpr_w1(reg));
   9208       addr = newTemp(Ity_I64);
   9209       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9210       reg++;
   9211    } while( reg != (r3 + 1));
   9212 }
   9213 
   9214 static HChar *
   9215 s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
   9216 {
   9217    s390_irgen_store_multiple_32bit(r1, r3, op2addr);
   9218 
   9219    return "stm";
   9220 }
   9221 
   9222 static HChar *
   9223 s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
   9224 {
   9225    s390_irgen_store_multiple_32bit(r1, r3, op2addr);
   9226 
   9227    return "stmy";
   9228 }
   9229 
   9230 static HChar *
   9231 s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
   9232 {
   9233    UChar reg;
   9234    IRTemp addr = newTemp(Ity_I64);
   9235 
   9236    assign(addr, mkexpr(op2addr));
   9237    reg = r1;
   9238    do {
   9239       IRTemp old = addr;
   9240 
   9241       reg %= 16;
   9242       store(mkexpr(addr), get_gpr_w0(reg));
   9243       addr = newTemp(Ity_I64);
   9244       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9245       reg++;
   9246    } while( reg != (r3 + 1));
   9247 
   9248    return "stmh";
   9249 }
   9250 
   9251 static HChar *
   9252 s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
   9253 {
   9254    UChar reg;
   9255    IRTemp addr = newTemp(Ity_I64);
   9256 
   9257    assign(addr, mkexpr(op2addr));
   9258    reg = r1;
   9259    do {
   9260       IRTemp old = addr;
   9261 
   9262       reg %= 16;
   9263       store(mkexpr(addr), get_gpr_dw0(reg));
   9264       addr = newTemp(Ity_I64);
   9265       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
   9266       reg++;
   9267    } while( reg != (r3 + 1));
   9268 
   9269    return "stmg";
   9270 }
   9271 
   9272 static void
   9273 s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
   9274 {
   9275    IRTemp old1 = newTemp(Ity_I8);
   9276    IRTemp old2 = newTemp(Ity_I8);
   9277    IRTemp new1 = newTemp(Ity_I8);
   9278    IRTemp counter = newTemp(Ity_I32);
   9279    IRTemp addr1 = newTemp(Ity_I64);
   9280 
   9281    assign(counter, get_counter_w0());
   9282 
   9283    assign(addr1, binop(Iop_Add64, mkexpr(start1),
   9284                        unop(Iop_32Uto64, mkexpr(counter))));
   9285 
   9286    assign(old1, load(Ity_I8, mkexpr(addr1)));
   9287    assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
   9288                                    unop(Iop_32Uto64,mkexpr(counter)))));
   9289    assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
   9290 
   9291    /* Special case: xc is used to zero memory */
   9292    if (op == Iop_Xor8) {
   9293       store(mkexpr(addr1),
   9294             mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
   9295                   mkU8(0), mkexpr(new1)));
   9296    } else
   9297       store(mkexpr(addr1), mkexpr(new1));
   9298    put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
   9299                         get_counter_w1()));
   9300 
   9301    /* Check for end of field */
   9302    put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
   9303    if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
   9304                      guest_IA_curr_instr);
   9305    s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
   9306                       False);
   9307    put_counter_dw0(mkU64(0));
   9308 }
   9309 
   9310 static HChar *
   9311 s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
   9312 {
   9313    s390_irgen_XONC(Iop_Xor8, length, start1, start2);
   9314 
   9315    return "xc";
   9316 }
   9317 
   9318 static void
   9319 s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
   9320 {
   9321    IRTemp counter = newTemp(Ity_I32);
   9322    IRTemp start = newTemp(Ity_I64);
   9323    IRTemp addr  = newTemp(Ity_I64);
   9324 
   9325    assign(start,
   9326           binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
   9327 
   9328    if (length < 8) {
   9329       UInt i;
   9330 
   9331       for (i = 0; i <= length; ++i) {
   9332          store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
   9333       }
   9334    } else {
   9335      assign(counter, get_counter_w0());
   9336 
   9337      assign(addr, binop(Iop_Add64, mkexpr(start),
   9338                         unop(Iop_32Uto64, mkexpr(counter))));
   9339 
   9340      store(mkexpr(addr), mkU8(0));
   9341 
   9342      /* Check for end of field */
   9343      put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
   9344      if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
   9345                        guest_IA_curr_instr);
   9346 
   9347      /* Reset counter */
   9348      put_counter_dw0(mkU64(0));
   9349    }
   9350 
   9351    s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
   9352 
   9353    if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
   9354       s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
   9355 }
   9356 
   9357 static HChar *
   9358 s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
   9359 {
   9360    s390_irgen_XONC(Iop_And8, length, start1, start2);
   9361 
   9362    return "nc";
   9363 }
   9364 
   9365 static HChar *
   9366 s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
   9367 {
   9368    s390_irgen_XONC(Iop_Or8, length, start1, start2);
   9369 
   9370    return "oc";
   9371 }
   9372 
   9373 
   9374 static HChar *
   9375 s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
   9376 {
   9377    IRTemp counter = newTemp(Ity_I64);
   9378 
   9379    assign(counter, get_counter_dw0());
   9380 
   9381    store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
   9382          load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
   9383 
   9384    /* Check for end of field */
   9385    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   9386    if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
   9387                      guest_IA_curr_instr);
   9388    put_counter_dw0(mkU64(0));
   9389 
   9390    return "mvc";
   9391 }
   9392 
   9393 static HChar *
   9394 s390_irgen_MVCL(UChar r1, UChar r2)
   9395 {
   9396    IRTemp addr1 = newTemp(Ity_I64);
   9397    IRTemp addr2 = newTemp(Ity_I64);
   9398    IRTemp addr2_load = newTemp(Ity_I64);
   9399    IRTemp r1p1 = newTemp(Ity_I32);   /* contents of r1 + 1 */
   9400    IRTemp r2p1 = newTemp(Ity_I32);   /* contents of r2 + 1 */
   9401    IRTemp len1 = newTemp(Ity_I32);
   9402    IRTemp len2 = newTemp(Ity_I32);
   9403    IRTemp pad = newTemp(Ity_I8);
   9404    IRTemp single = newTemp(Ity_I8);
   9405 
   9406    assign(addr1, get_gpr_dw0(r1));
   9407    assign(r1p1, get_gpr_w1(r1 + 1));
   9408    assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
   9409    assign(addr2, get_gpr_dw0(r2));
   9410    assign(r2p1, get_gpr_w1(r2 + 1));
   9411    assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
   9412    assign(pad, get_gpr_b4(r2 + 1));
   9413 
   9414    /* len1 == 0 ? */
   9415    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
   9416    if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
   9417                      guest_IA_next_instr);
   9418 
   9419    /* Check for destructive overlap:
   9420       addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
   9421    s390_cc_set(3);
   9422    IRTemp cond1 = newTemp(Ity_I32);
   9423    assign(cond1, unop(Iop_1Uto32,
   9424                       binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
   9425    IRTemp cond2 = newTemp(Ity_I32);
   9426    assign(cond2, unop(Iop_1Uto32,
   9427                       binop(Iop_CmpLT64U, mkexpr(addr1),
   9428                             binop(Iop_Add64, mkexpr(addr2),
   9429                                   unop(Iop_32Uto64, mkexpr(len1))))));
   9430    IRTemp cond3 = newTemp(Ity_I32);
   9431    assign(cond3, unop(Iop_1Uto32,
   9432                       binop(Iop_CmpLT64U,
   9433                             mkexpr(addr1),
   9434                             binop(Iop_Add64, mkexpr(addr2),
   9435                                   unop(Iop_32Uto64, mkexpr(len2))))));
   9436 
   9437    if_condition_goto(binop(Iop_CmpEQ32,
   9438                            binop(Iop_And32,
   9439                                  binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
   9440                                  mkexpr(cond3)),
   9441                            mkU32(1)),
   9442                      guest_IA_next_instr);
   9443 
   9444    /* See s390_irgen_CLCL for explanation why we cannot load directly
   9445       and need two steps. */
   9446    assign(addr2_load,
   9447           mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   9448                 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
   9449    assign(single,
   9450           mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   9451                 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
   9452 
   9453    store(mkexpr(addr1), mkexpr(single));
   9454 
   9455    /* Update addr1 and len1 */
   9456    put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
   9457    put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
   9458 
   9459    /* Update addr2 and len2 */
   9460    put_gpr_dw0(r2,
   9461                mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   9462                      mkexpr(addr2),
   9463                      binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
   9464 
   9465    /* When updating len2 we must not modify bits (r2+1)[0:39] */
   9466    put_gpr_w1(r2 + 1,
   9467               mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
   9468                     binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
   9469                     binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
   9470 
   9471    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
   9472    if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
   9473                      guest_IA_curr_instr);
   9474 
   9475    return "mvcl";
   9476 }
   9477 
   9478 
   9479 static HChar *
   9480 s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
   9481 {
   9482    IRTemp addr1, addr3, addr3_load, len1, len3, single;
   9483 
   9484    addr1 = newTemp(Ity_I64);
   9485    addr3 = newTemp(Ity_I64);
   9486    addr3_load = newTemp(Ity_I64);
   9487    len1 = newTemp(Ity_I64);
   9488    len3 = newTemp(Ity_I64);
   9489    single = newTemp(Ity_I8);
   9490 
   9491    assign(addr1, get_gpr_dw0(r1));
   9492    assign(len1, get_gpr_dw0(r1 + 1));
   9493    assign(addr3, get_gpr_dw0(r3));
   9494    assign(len3, get_gpr_dw0(r3 + 1));
   9495 
   9496    // len1 == 0 ?
   9497    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
   9498    if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
   9499                      guest_IA_next_instr);
   9500 
   9501    /* This is a hack to prevent mvcle from reading from addr3 if it
   9502       should read from the pad. Since the pad has no address, just
   9503       read from the instruction, we discard that anyway */
   9504    assign(addr3_load,
   9505           mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   9506                 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
   9507 
   9508    assign(single,
   9509           mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   9510                 unop(Iop_64to8, mkexpr(pad2)),
   9511                 load(Ity_I8, mkexpr(addr3_load))));
   9512    store(mkexpr(addr1), mkexpr(single));
   9513 
   9514    put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
   9515 
   9516    put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
   9517 
   9518    put_gpr_dw0(r3,
   9519                mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   9520                      mkexpr(addr3),
   9521                      binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
   9522 
   9523    put_gpr_dw0(r3 + 1,
   9524                mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
   9525                      mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
   9526 
   9527    /* We should set CC=3 (faked by overflow add) and leave after
   9528       a maximum of ~4096 bytes have been processed. This is simpler:
   9529       we leave whenever (len1 % 4096) == 0 */
   9530    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
   9531                       mktemp(Ity_I64, mkU64(-1ULL)), False);
   9532    if_condition_goto(binop(Iop_CmpEQ64,
   9533                            binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
   9534                            mkU64(0)),
   9535                      guest_IA_next_instr);
   9536 
   9537    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
   9538    if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
   9539                      guest_IA_curr_instr);
   9540 
   9541    return "mvcle";
   9542 }
   9543 
   9544 static HChar *
   9545 s390_irgen_MVST(UChar r1, UChar r2)
   9546 {
   9547    IRTemp addr1 = newTemp(Ity_I64);
   9548    IRTemp addr2 = newTemp(Ity_I64);
   9549    IRTemp end = newTemp(Ity_I8);
   9550    IRTemp byte = newTemp(Ity_I8);
   9551    IRTemp counter = newTemp(Ity_I64);
   9552 
   9553    assign(addr1, get_gpr_dw0(r1));
   9554    assign(addr2, get_gpr_dw0(r2));
   9555    assign(counter, get_counter_dw0());
   9556    assign(end, get_gpr_b7(0));
   9557    assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
   9558    store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
   9559 
   9560    // We use unlimited as cpu-determined number
   9561    put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
   9562    if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
   9563                      guest_IA_curr_instr);
   9564 
   9565    // and always set cc=1 at the end + update r1
   9566    s390_cc_set(1);
   9567    put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
   9568    put_counter_dw0(mkU64(0));
   9569 
   9570    return "mvst";
   9571 }
   9572 
   9573 static void
   9574 s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
   9575 {
   9576    IRTemp op1 = newTemp(Ity_I64);
   9577    IRTemp result = newTemp(Ity_I64);
   9578 
   9579    assign(op1, binop(Iop_32HLto64,
   9580                      get_gpr_w1(r1),         // high 32 bits
   9581                      get_gpr_w1(r1 + 1)));   // low  32 bits
   9582    assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
   9583    put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));   // remainder
   9584    put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
   9585 }
   9586 
   9587 static void
   9588 s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
   9589 {
   9590    IRTemp op1 = newTemp(Ity_I128);
   9591    IRTemp result = newTemp(Ity_I128);
   9592 
   9593    assign(op1, binop(Iop_64HLto128,
   9594                      get_gpr_dw0(r1),         // high 64 bits
   9595                      get_gpr_dw0(r1 + 1)));   // low  64 bits
   9596    assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
   9597    put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));   // remainder
   9598    put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
   9599 }
   9600 
   9601 static void
   9602 s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
   9603 {
   9604    IRTemp op1 = newTemp(Ity_I64);
   9605    IRTemp result = newTemp(Ity_I128);
   9606 
   9607    assign(op1, get_gpr_dw0(r1 + 1));
   9608    assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
   9609    put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));   // remainder
   9610    put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
   9611 }
   9612 
   9613 static HChar *
   9614 s390_irgen_DR(UChar r1, UChar r2)
   9615 {
   9616    IRTemp op2 = newTemp(Ity_I32);
   9617 
   9618    assign(op2, get_gpr_w1(r2));
   9619 
   9620    s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
   9621 
   9622    return "dr";
   9623 }
   9624 
   9625 static HChar *
   9626 s390_irgen_D(UChar r1, IRTemp op2addr)
   9627 {
   9628    IRTemp op2 = newTemp(Ity_I32);
   9629 
   9630    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   9631 
   9632    s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
   9633 
   9634    return "d";
   9635 }
   9636 
   9637 static HChar *
   9638 s390_irgen_DLR(UChar r1, UChar r2)
   9639 {
   9640    IRTemp op2 = newTemp(Ity_I32);
   9641 
   9642    assign(op2, get_gpr_w1(r2));
   9643 
   9644    s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
   9645 
   9646    return "dr";
   9647 }
   9648 
   9649 static HChar *
   9650 s390_irgen_DL(UChar r1, IRTemp op2addr)
   9651 {
   9652    IRTemp op2 = newTemp(Ity_I32);
   9653 
   9654    assign(op2, load(Ity_I32, mkexpr(op2addr)));
   9655 
   9656    s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
   9657 
   9658    return "dl";
   9659 }
   9660 
   9661 static HChar *
   9662 s390_irgen_DLG(UChar r1, IRTemp op2addr)
   9663 {
   9664    IRTemp op2 = newTemp(Ity_I64);
   9665 
   9666    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   9667 
   9668    s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
   9669 
   9670    return "dlg";
   9671 }
   9672 
   9673 static HChar *
   9674 s390_irgen_DLGR(UChar r1, UChar r2)
   9675 {
   9676    IRTemp op2 = newTemp(Ity_I64);
   9677 
   9678    assign(op2, get_gpr_dw0(r2));
   9679 
   9680    s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
   9681 
   9682    return "dlgr";
   9683 }
   9684 
   9685 static HChar *
   9686 s390_irgen_DSGR(UChar r1, UChar r2)
   9687 {
   9688    IRTemp op2 = newTemp(Ity_I64);
   9689 
   9690    assign(op2, get_gpr_dw0(r2));
   9691 
   9692    s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
   9693 
   9694    return "dsgr";
   9695 }
   9696 
   9697 static HChar *
   9698 s390_irgen_DSG(UChar r1, IRTemp op2addr)
   9699 {
   9700    IRTemp op2 = newTemp(Ity_I64);
   9701 
   9702    assign(op2, load(Ity_I64, mkexpr(op2addr)));
   9703 
   9704    s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
   9705 
   9706    return "dsg";
   9707 }
   9708 
   9709 static HChar *
   9710 s390_irgen_DSGFR(UChar r1, UChar r2)
   9711 {
   9712    IRTemp op2 = newTemp(Ity_I64);
   9713 
   9714    assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
   9715 
   9716    s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
   9717 
   9718    return "dsgfr";
   9719 }
   9720 
   9721 static HChar *
   9722 s390_irgen_DSGF(UChar r1, IRTemp op2addr)
   9723 {
   9724    IRTemp op2 = newTemp(Ity_I64);
   9725 
   9726    assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
   9727 
   9728    s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
   9729 
   9730    return "dsgf";
   9731 }
   9732 
   9733 static void
   9734 s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
   9735 {
   9736    UChar reg;
   9737    IRTemp addr = newTemp(Ity_I64);
   9738 
   9739    assign(addr, mkexpr(op2addr));
   9740    reg = r1;
   9741    do {
   9742       IRTemp old = addr;
   9743 
   9744       reg %= 16;
   9745       put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
   9746       addr = newTemp(Ity_I64);
   9747       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9748       reg++;
   9749    } while (reg != (r3 + 1));
   9750 }
   9751 
   9752 static HChar *
   9753 s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
   9754 {
   9755    s390_irgen_load_ar_multiple(r1, r3, op2addr);
   9756 
   9757    return "lam";
   9758 }
   9759 
   9760 static HChar *
   9761 s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
   9762 {
   9763    s390_irgen_load_ar_multiple(r1, r3, op2addr);
   9764 
   9765    return "lamy";
   9766 }
   9767 
   9768 static void
   9769 s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
   9770 {
   9771    UChar reg;
   9772    IRTemp addr = newTemp(Ity_I64);
   9773 
   9774    assign(addr, mkexpr(op2addr));
   9775    reg = r1;
   9776    do {
   9777       IRTemp old = addr;
   9778 
   9779       reg %= 16;
   9780       store(mkexpr(addr), get_ar_w0(reg));
   9781       addr = newTemp(Ity_I64);
   9782       assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
   9783       reg++;
   9784    } while (reg != (r3 + 1));
   9785 }
   9786 
   9787 static HChar *
   9788 s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
   9789 {
   9790    s390_irgen_store_ar_multiple(r1, r3, op2addr);
   9791 
   9792    return "stam";
   9793 }
   9794 
   9795 static HChar *
   9796 s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
   9797 {
   9798    s390_irgen_store_ar_multiple(r1, r3, op2addr);
   9799 
   9800    return "stamy";
   9801 }
   9802 
   9803 
   9804 /* Implementation for 32-bit compare-and-swap */
   9805 static void
   9806 s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
   9807 {
   9808    IRCAS *cas;
   9809    IRTemp op1 = newTemp(Ity_I32);
   9810    IRTemp old_mem = newTemp(Ity_I32);
   9811    IRTemp op3 = newTemp(Ity_I32);
   9812    IRTemp result = newTemp(Ity_I32);
   9813    IRTemp nequal = newTemp(Ity_I1);
   9814 
   9815    assign(op1, get_gpr_w1(r1));
   9816    assign(op3, get_gpr_w1(r3));
   9817 
   9818    /* The first and second operands are compared. If they are equal,
   9819       the third operand is stored at the second- operand location. */
   9820    cas = mkIRCAS(IRTemp_INVALID, old_mem,
   9821                  Iend_BE, mkexpr(op2addr),
   9822                  NULL, mkexpr(op1), /* expected value */
   9823                  NULL, mkexpr(op3)  /* new value */);
   9824    stmt(IRStmt_CAS(cas));
   9825 
   9826    /* Set CC. Operands compared equal -> 0, else 1. */
   9827    assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
   9828    s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
   9829 
   9830    /* If operands were equal (cc == 0) just store the old value op1 in r1.
   9831       Otherwise, store the old_value from memory in r1 and yield. */
   9832    assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
   9833    put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
   9834    stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
   9835         IRConst_U64(guest_IA_next_instr)));
   9836 }
   9837 
   9838 static HChar *
   9839 s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
   9840 {
   9841    s390_irgen_cas_32(r1, r3, op2addr);
   9842 
   9843    return "cs";
   9844 }
   9845 
   9846 static HChar *
   9847 s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
   9848 {
   9849    s390_irgen_cas_32(r1, r3, op2addr);
   9850 
   9851    return "csy";
   9852 }
   9853 
   9854 static HChar *
   9855 s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
   9856 {
   9857    IRCAS *cas;
   9858    IRTemp op1 = newTemp(Ity_I64);
   9859    IRTemp old_mem = newTemp(Ity_I64);
   9860    IRTemp op3 = newTemp(Ity_I64);
   9861    IRTemp result = newTemp(Ity_I64);
   9862    IRTemp nequal = newTemp(Ity_I1);
   9863 
   9864    assign(op1, get_gpr_dw0(r1));
   9865    assign(op3, get_gpr_dw0(r3));
   9866 
   9867    /* The first and second operands are compared. If they are equal,
   9868       the third operand is stored at the second- operand location. */
   9869    cas = mkIRCAS(IRTemp_INVALID, old_mem,
   9870                  Iend_BE, mkexpr(op2addr),
   9871                  NULL, mkexpr(op1), /* expected value */
   9872                  NULL, mkexpr(op3)  /* new value */);
   9873    stmt(IRStmt_CAS(cas));
   9874 
   9875    /* Set CC. Operands compared equal -> 0, else 1. */
   9876    assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
   9877    s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
   9878 
   9879    /* If operands were equal (cc == 0) just store the old value op1 in r1.
   9880       Otherwise, store the old_value from memory in r1 and yield. */
   9881    assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
   9882    put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
   9883    stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
   9884         IRConst_U64(guest_IA_next_instr)));
   9885 
   9886    return "csg";
   9887 }
   9888 
   9889 
   9890 /* Binary floating point */
   9891 
   9892 static HChar *
   9893 s390_irgen_AXBR(UChar r1, UChar r2)
   9894 {
   9895    IRTemp op1 = newTemp(Ity_F128);
   9896    IRTemp op2 = newTemp(Ity_F128);
   9897    IRTemp result = newTemp(Ity_F128);
   9898 
   9899    assign(op1, get_fpr_pair(r1));
   9900    assign(op2, get_fpr_pair(r2));
   9901    assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
   9902                         mkexpr(op2)));
   9903    put_fpr_pair(r1, mkexpr(result));
   9904 
   9905    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   9906 
   9907    return "axbr";
   9908 }
   9909 
   9910 /* The result of a Iop_CmdFxx operation is a condition code. It is
   9911    encoded using the values defined in type IRCmpFxxResult.
   9912    Before we can store the condition code into the guest state (or do
   9913    anything else with it for that matter) we need to convert it to
   9914    the encoding that s390 uses. This is what this function does.
   9915 
   9916    s390     VEX                b6 b2 b0   cc.1  cc.0
   9917    0      0x40 EQ             1  0  0     0     0
   9918    1      0x01 LT             0  0  1     0     1
   9919    2      0x00 GT             0  0  0     1     0
   9920    3      0x45 Unordered      1  1  1     1     1
   9921 
   9922    The following bits from the VEX encoding are interesting:
   9923    b0, b2, b6  with b0 being the LSB. We observe:
   9924 
   9925    cc.0 = b0;
   9926    cc.1 = b2 | (~b0 & ~b6)
   9927 
   9928    with cc being the s390 condition code.
   9929 */
   9930 static IRExpr *
   9931 convert_vex_fpcc_to_s390(IRTemp vex_cc)
   9932 {
   9933    IRTemp cc0  = newTemp(Ity_I32);
   9934    IRTemp cc1  = newTemp(Ity_I32);
   9935    IRTemp b0   = newTemp(Ity_I32);
   9936    IRTemp b2   = newTemp(Ity_I32);
   9937    IRTemp b6   = newTemp(Ity_I32);
   9938 
   9939    assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
   9940    assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
   9941                     mkU32(1)));
   9942    assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
   9943                     mkU32(1)));
   9944 
   9945    assign(cc0, mkexpr(b0));
   9946    assign(cc1, binop(Iop_Or32, mkexpr(b2),
   9947                      binop(Iop_And32,
   9948                            binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
   9949                            binop(Iop_Sub32, mkU32(1), mkexpr(b6))  /* ~b6 */
   9950                            )));
   9951 
   9952    return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
   9953 }
   9954 
   9955 static HChar *
   9956 s390_irgen_CEBR(UChar r1, UChar r2)
   9957 {
   9958    IRTemp op1 = newTemp(Ity_F32);
   9959    IRTemp op2 = newTemp(Ity_F32);
   9960    IRTemp cc_vex  = newTemp(Ity_I32);
   9961    IRTemp cc_s390 = newTemp(Ity_I32);
   9962 
   9963    assign(op1, get_fpr_w0(r1));
   9964    assign(op2, get_fpr_w0(r2));
   9965    assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
   9966 
   9967    assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
   9968    s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
   9969 
   9970    return "cebr";
   9971 }
   9972 
   9973 static HChar *
   9974 s390_irgen_CDBR(UChar r1, UChar r2)
   9975 {
   9976    IRTemp op1 = newTemp(Ity_F64);
   9977    IRTemp op2 = newTemp(Ity_F64);
   9978    IRTemp cc_vex  = newTemp(Ity_I32);
   9979    IRTemp cc_s390 = newTemp(Ity_I32);
   9980 
   9981    assign(op1, get_fpr_dw0(r1));
   9982    assign(op2, get_fpr_dw0(r2));
   9983    assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
   9984 
   9985    assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
   9986    s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
   9987 
   9988    return "cdbr";
   9989 }
   9990 
   9991 static HChar *
   9992 s390_irgen_CXBR(UChar r1, UChar r2)
   9993 {
   9994    IRTemp op1 = newTemp(Ity_F128);
   9995    IRTemp op2 = newTemp(Ity_F128);
   9996    IRTemp cc_vex  = newTemp(Ity_I32);
   9997    IRTemp cc_s390 = newTemp(Ity_I32);
   9998 
   9999    assign(op1, get_fpr_pair(r1));
   10000    assign(op2, get_fpr_pair(r2));
   10001    assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
   10002 
   10003    assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
   10004    s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
   10005 
   10006    return "cxbr";
   10007 }
   10008 
   10009 static HChar *
   10010 s390_irgen_CEB(UChar r1, IRTemp op2addr)
   10011 {
   10012    IRTemp op1 = newTemp(Ity_F32);
   10013    IRTemp op2 = newTemp(Ity_F32);
   10014    IRTemp cc_vex  = newTemp(Ity_I32);
   10015    IRTemp cc_s390 = newTemp(Ity_I32);
   10016 
   10017    assign(op1, get_fpr_w0(r1));
   10018    assign(op2, load(Ity_F32, mkexpr(op2addr)));
   10019    assign(cc_vex,  binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
   10020 
   10021    assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
   10022    s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
   10023 
   10024    return "ceb";
   10025 }
   10026 
   10027 static HChar *
   10028 s390_irgen_CDB(UChar r1, IRTemp op2addr)
   10029 {
   10030    IRTemp op1 = newTemp(Ity_F64);
   10031    IRTemp op2 = newTemp(Ity_F64);
   10032    IRTemp cc_vex  = newTemp(Ity_I32);
   10033    IRTemp cc_s390 = newTemp(Ity_I32);
   10034 
   10035    assign(op1, get_fpr_dw0(r1));
   10036    assign(op2, load(Ity_F64, mkexpr(op2addr)));
   10037    assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
   10038 
   10039    assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
   10040    s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
   10041 
   10042    return "cdb";
   10043 }
   10044 
   10045 static HChar *
   10046 s390_irgen_CXFBR(UChar r1, UChar r2)
   10047 {
   10048    IRTemp op2 = newTemp(Ity_I32);
   10049 
   10050    assign(op2, get_gpr_w1(r2));
   10051    put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
   10052 
   10053    return "cxfbr";
   10054 }
   10055 
   10056 static HChar *
   10057 s390_irgen_CXGBR(UChar r1, UChar r2)
   10058 {
   10059    IRTemp op2 = newTemp(Ity_I64);
   10060 
   10061    assign(op2, get_gpr_dw0(r2));
   10062    put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
   10063 
   10064    return "cxgbr";
   10065 }
   10066 
   10067 static HChar *
   10068 s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
   10069 {
   10070    IRTemp op = newTemp(Ity_F128);
   10071    IRTemp result = newTemp(Ity_I32);
   10072 
   10073    assign(op, get_fpr_pair(r2));
   10074    assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
   10075                         mkexpr(op)));
   10076    put_gpr_w1(r1, mkexpr(result));
   10077    s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
   10078 
   10079    return "cfxbr";
   10080 }
   10081 
   10082 static HChar *
   10083 s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
   10084 {
   10085    IRTemp op = newTemp(Ity_F128);
   10086    IRTemp result = newTemp(Ity_I64);
   10087 
   10088    assign(op, get_fpr_pair(r2));
   10089    assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
   10090                         mkexpr(op)));
   10091    put_gpr_dw0(r1, mkexpr(result));
   10092    s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
   10093 
   10094    return "cgxbr";
   10095 }
   10096 
   10097 static HChar *
   10098 s390_irgen_DXBR(UChar r1, UChar r2)
   10099 {
   10100    IRTemp op1 = newTemp(Ity_F128);
   10101    IRTemp op2 = newTemp(Ity_F128);
   10102    IRTemp result = newTemp(Ity_F128);
   10103 
   10104    assign(op1, get_fpr_pair(r1));
   10105    assign(op2, get_fpr_pair(r2));
   10106    assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
   10107                         mkexpr(op2)));
   10108    put_fpr_pair(r1, mkexpr(result));
   10109 
   10110    return "dxbr";
   10111 }
   10112 
   10113 static HChar *
   10114 s390_irgen_LTXBR(UChar r1, UChar r2)
   10115 {
   10116    IRTemp result = newTemp(Ity_F128);
   10117 
   10118    assign(result, get_fpr_pair(r2));
   10119    put_fpr_pair(r1, mkexpr(result));
   10120    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   10121 
   10122    return "ltxbr";
   10123 }
   10124 
   10125 static HChar *
   10126 s390_irgen_LCXBR(UChar r1, UChar r2)
   10127 {
   10128    IRTemp result = newTemp(Ity_F128);
   10129 
   10130    assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
   10131    put_fpr_pair(r1, mkexpr(result));
   10132    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   10133 
   10134    return "lcxbr";
   10135 }
   10136 
   10137 static HChar *
   10138 s390_irgen_LXDBR(UChar r1, UChar r2)
   10139 {
   10140    IRTemp op = newTemp(Ity_F64);
   10141 
   10142    assign(op, get_fpr_dw0(r2));
   10143    put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
   10144 
   10145    return "lxdbr";
   10146 }
   10147 
   10148 static HChar *
   10149 s390_irgen_LXEBR(UChar r1, UChar r2)
   10150 {
   10151    IRTemp op = newTemp(Ity_F32);
   10152 
   10153    assign(op, get_fpr_w0(r2));
   10154    put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
   10155 
   10156    return "lxebr";
   10157 }
   10158 
   10159 static HChar *
   10160 s390_irgen_LXDB(UChar r1, IRTemp op2addr)
   10161 {
   10162    IRTemp op = newTemp(Ity_F64);
   10163 
   10164    assign(op, load(Ity_F64, mkexpr(op2addr)));
   10165    put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
   10166 
   10167    return "lxdb";
   10168 }
   10169 
   10170 static HChar *
   10171 s390_irgen_LXEB(UChar r1, IRTemp op2addr)
   10172 {
   10173    IRTemp op = newTemp(Ity_F32);
   10174 
   10175    assign(op, load(Ity_F32, mkexpr(op2addr)));
   10176    put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
   10177 
   10178    return "lxeb";
   10179 }
   10180 
   10181 static HChar *
   10182 s390_irgen_LNEBR(UChar r1, UChar r2)
   10183 {
   10184    IRTemp result = newTemp(Ity_F32);
   10185 
   10186    assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
   10187    put_fpr_w0(r1, mkexpr(result));
   10188    s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
   10189 
   10190    return "lnebr";
   10191 }
   10192 
   10193 static HChar *
   10194 s390_irgen_LNDBR(UChar r1, UChar r2)
   10195 {
   10196    IRTemp result = newTemp(Ity_F64);
   10197 
   10198    assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
   10199    put_fpr_dw0(r1, mkexpr(result));
   10200    s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
   10201 
   10202    return "lndbr";
   10203 }
   10204 
   10205 static HChar *
   10206 s390_irgen_LNXBR(UChar r1, UChar r2)
   10207 {
   10208    IRTemp result = newTemp(Ity_F128);
   10209 
   10210    assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
   10211    put_fpr_pair(r1, mkexpr(result));
   10212    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   10213 
   10214    return "lnxbr";
   10215 }
   10216 
   10217 static HChar *
   10218 s390_irgen_LPEBR(UChar r1, UChar r2)
   10219 {
   10220    IRTemp result = newTemp(Ity_F32);
   10221 
   10222    assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
   10223    put_fpr_w0(r1, mkexpr(result));
   10224    s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
   10225 
   10226    return "lpebr";
   10227 }
   10228 
   10229 static HChar *
   10230 s390_irgen_LPDBR(UChar r1, UChar r2)
   10231 {
   10232    IRTemp result = newTemp(Ity_F64);
   10233 
   10234    assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
   10235    put_fpr_dw0(r1, mkexpr(result));
   10236    s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
   10237 
   10238    return "lpdbr";
   10239 }
   10240 
   10241 static HChar *
   10242 s390_irgen_LPXBR(UChar r1, UChar r2)
   10243 {
   10244    IRTemp result = newTemp(Ity_F128);
   10245 
   10246    assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
   10247    put_fpr_pair(r1, mkexpr(result));
   10248    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   10249 
   10250    return "lpxbr";
   10251 }
   10252 
   10253 static HChar *
   10254 s390_irgen_LDXBR(UChar r1, UChar r2)
   10255 {
   10256    IRTemp result = newTemp(Ity_F64);
   10257 
   10258    assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
   10259    put_fpr_dw0(r1, mkexpr(result));
   10260 
   10261    return "ldxbr";
   10262 }
   10263 
   10264 static HChar *
   10265 s390_irgen_LEXBR(UChar r1, UChar r2)
   10266 {
   10267    IRTemp result = newTemp(Ity_F32);
   10268 
   10269    assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
   10270    put_fpr_w0(r1, mkexpr(result));
   10271 
   10272    return "lexbr";
   10273 }
   10274 
   10275 static HChar *
   10276 s390_irgen_MXBR(UChar r1, UChar r2)
   10277 {
   10278    IRTemp op1 = newTemp(Ity_F128);
   10279    IRTemp op2 = newTemp(Ity_F128);
   10280    IRTemp result = newTemp(Ity_F128);
   10281 
   10282    assign(op1, get_fpr_pair(r1));
   10283    assign(op2, get_fpr_pair(r2));
   10284    assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
   10285                         mkexpr(op2)));
   10286    put_fpr_pair(r1, mkexpr(result));
   10287 
   10288    return "mxbr";
   10289 }
   10290 
   10291 static HChar *
   10292 s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
   10293 {
   10294    put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
   10295                       get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
   10296 
   10297    return "maebr";
   10298 }
   10299 
   10300 static HChar *
   10301 s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
   10302 {
   10303    put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
   10304                        get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
   10305 
   10306    return "madbr";
   10307 }
   10308 
   10309 static HChar *
   10310 s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
   10311 {
   10312    IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
   10313 
   10314    put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
   10315                       get_fpr_w0(r1), op2, get_fpr_w0(r3)));
   10316 
   10317    return "maeb";
   10318 }
   10319 
   10320 static HChar *
   10321 s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
   10322 {
   10323    IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
   10324 
   10325    put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
   10326                        get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
   10327 
   10328    return "madb";
   10329 }
   10330 
   10331 static HChar *
   10332 s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
   10333 {
   10334    put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
   10335                       get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
   10336 
   10337    return "msebr";
   10338 }
   10339 
   10340 static HChar *
   10341 s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
   10342 {
   10343    put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
   10344                        get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
   10345 
   10346    return "msdbr";
   10347 }
   10348 
   10349 static HChar *
   10350 s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
   10351 {
   10352    IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
   10353 
   10354    put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
   10355                       get_fpr_w0(r1), op2, get_fpr_w0(r3)));
   10356 
   10357    return "mseb";
   10358 }
   10359 
   10360 static HChar *
   10361 s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
   10362 {
   10363    IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
   10364 
   10365    put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
   10366                        get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
   10367 
   10368    return "msdb";
   10369 }
   10370 
   10371 static HChar *
   10372 s390_irgen_SQEBR(UChar r1, UChar r2)
   10373 {
   10374    IRTemp result = newTemp(Ity_F32);
   10375 
   10376    assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
   10377    put_fpr_w0(r1, mkexpr(result));
   10378 
   10379    return "sqebr";
   10380 }
   10381 
   10382 static HChar *
   10383 s390_irgen_SQDBR(UChar r1, UChar r2)
   10384 {
   10385    IRTemp result = newTemp(Ity_F64);
   10386 
   10387    assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
   10388    put_fpr_dw0(r1, mkexpr(result));
   10389 
   10390    return "sqdbr";
   10391 }
   10392 
   10393 static HChar *
   10394 s390_irgen_SQXBR(UChar r1, UChar r2)
   10395 {
   10396    IRTemp result = newTemp(Ity_F128);
   10397 
   10398    assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
   10399    put_fpr_pair(r1, mkexpr(result));
   10400 
   10401    return "sqxbr";
   10402 }
   10403 
   10404 static HChar *
   10405 s390_irgen_SQEB(UChar r1, IRTemp op2addr)
   10406 {
   10407    IRTemp op = newTemp(Ity_F32);
   10408 
   10409    assign(op, load(Ity_F32, mkexpr(op2addr)));
   10410    put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
   10411 
   10412    return "sqeb";
   10413 }
   10414 
   10415 static HChar *
   10416 s390_irgen_SQDB(UChar r1, IRTemp op2addr)
   10417 {
   10418    IRTemp op = newTemp(Ity_F64);
   10419 
   10420    assign(op, load(Ity_F64, mkexpr(op2addr)));
   10421    put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
   10422 
   10423    return "sqdb";
   10424 }
   10425 
   10426 static HChar *
   10427 s390_irgen_SXBR(UChar r1, UChar r2)
   10428 {
   10429    IRTemp op1 = newTemp(Ity_F128);
   10430    IRTemp op2 = newTemp(Ity_F128);
   10431    IRTemp result = newTemp(Ity_F128);
   10432 
   10433    assign(op1, get_fpr_pair(r1));
   10434    assign(op2, get_fpr_pair(r2));
   10435    assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
   10436                         mkexpr(op2)));
   10437    put_fpr_pair(r1, mkexpr(result));
   10438    s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
   10439 
   10440    return "sxbr";
   10441 }
   10442 
   10443 static HChar *
   10444 s390_irgen_TCEB(UChar r1, IRTemp op2addr)
   10445 {
   10446    IRTemp value = newTemp(Ity_F32);
   10447 
   10448    assign(value, get_fpr_w0(r1));
   10449 
   10450    s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
   10451 
   10452    return "tceb";
   10453 }
   10454 
   10455 static HChar *
   10456 s390_irgen_TCDB(UChar r1, IRTemp op2addr)
   10457 {
   10458    IRTemp value = newTemp(Ity_F64);
   10459 
   10460    assign(value, get_fpr_dw0(r1));
   10461 
   10462    s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
   10463 
   10464    return "tcdb";
   10465 }
   10466 
   10467 static HChar *
   10468 s390_irgen_TCXB(UChar r1, IRTemp op2addr)
   10469 {
   10470    IRTemp value = newTemp(Ity_F128);
   10471 
   10472    assign(value, get_fpr_pair(r1));
   10473 
   10474    s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
   10475 
   10476    return "tcxb";
   10477 }
   10478 
   10479 static HChar *
   10480 s390_irgen_LCDFR(UChar r1, UChar r2)
   10481 {
   10482    IRTemp result = newTemp(Ity_F64);
   10483 
   10484    assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
   10485    put_fpr_dw0(r1, mkexpr(result));
   10486 
   10487    return "lcdfr";
   10488 }
   10489 
   10490 static HChar *
   10491 s390_irgen_LNDFR(UChar r1, UChar r2)
   10492 {
   10493    IRTemp result = newTemp(Ity_F64);
   10494 
   10495    assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
   10496    put_fpr_dw0(r1, mkexpr(result));
   10497 
   10498    return "lndfr";
   10499 }
   10500 
   10501 static HChar *
   10502 s390_irgen_LPDFR(UChar r1, UChar r2)
   10503 {
   10504    IRTemp result = newTemp(Ity_F64);
   10505 
   10506    assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
   10507    put_fpr_dw0(r1, mkexpr(result));
   10508 
   10509    return "lpdfr";
   10510 }
   10511 
   10512 static HChar *
   10513 s390_irgen_LDGR(UChar r1, UChar r2)
   10514 {
   10515    put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
   10516 
   10517    return "ldgr";
   10518 }
   10519 
   10520 static HChar *
   10521 s390_irgen_LGDR(UChar r1, UChar r2)
   10522 {
   10523    put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
   10524 
   10525    return "lgdr";
   10526 }
   10527 
   10528 
   10529 static HChar *
   10530 s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
   10531 {
   10532    IRTemp sign  = newTemp(Ity_I64);
   10533    IRTemp value = newTemp(Ity_I64);
   10534 
   10535    assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
   10536                       mkU64(1ULL << 63)));
   10537    assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
   10538                        mkU64((1ULL << 63) - 1)));
   10539    put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
   10540                                                     mkexpr(sign))));
   10541 
   10542    return "cpsdr";
   10543 }
   10544 
   10545 
   10546 static UInt
   10547 s390_do_cvb(ULong decimal)
   10548 {
   10549 #if defined(VGA_s390x)
   10550    UInt binary;
   10551 
   10552    __asm__ volatile (
   10553         "cvb %[result],%[input]\n\t"
   10554           : [result] "=d"(binary)
   10555           : [input] "m"(decimal)
   10556    );
   10557 
   10558    return binary;
   10559 #else
   10560    return 0;
   10561 #endif
   10562 }
   10563 
   10564 static IRExpr *
   10565 s390_call_cvb(IRExpr *in)
   10566 {
   10567    IRExpr **args, *call;
   10568 
   10569    args = mkIRExprVec_1(in);
   10570    call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
   10571                         "s390_do_cvb", &s390_do_cvb, args);
   10572 
   10573    /* Nothing is excluded from definedness checking. */
   10574    call->Iex.CCall.cee->mcx_mask = 0;
   10575 
   10576    return call;
   10577 }
   10578 
   10579 static HChar *
   10580 s390_irgen_CVB(UChar r1, IRTemp op2addr)
   10581 {
   10582    put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
   10583 
   10584    return "cvb";
   10585 }
   10586 
   10587 static HChar *
   10588 s390_irgen_CVBY(UChar r1, IRTemp op2addr)
   10589 {
   10590    put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
   10591 
   10592    return "cvby";
   10593 }
   10594 
   10595 
   10596 static ULong
   10597 s390_do_cvd(ULong binary_in)
   10598 {
   10599 #if defined(VGA_s390x)
   10600    UInt binary = binary_in & 0xffffffffULL;
   10601    ULong decimal;
   10602 
   10603    __asm__ volatile (
   10604         "cvd %[input],%[result]\n\t"
   10605           : [result] "=m"(decimal)
   10606           : [input] "d"(binary)
   10607    );
   10608 
   10609    return decimal;
   10610 #else
   10611    return 0;
   10612 #endif
   10613 }
   10614 
   10615 static IRExpr *
   10616 s390_call_cvd(IRExpr *in)
   10617 {
   10618    IRExpr **args, *call;
   10619 
   10620    args = mkIRExprVec_1(in);
   10621    call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
   10622                         "s390_do_cvd", &s390_do_cvd, args);
   10623 
   10624    /* Nothing is excluded from definedness checking. */
   10625    call->Iex.CCall.cee->mcx_mask = 0;
   10626 
   10627    return call;
   10628 }
   10629 
   10630 static HChar *
   10631 s390_irgen_CVD(UChar r1, IRTemp op2addr)
   10632 {
   10633    store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
   10634 
   10635    return "cvd";
   10636 }
   10637 
   10638 static HChar *
   10639 s390_irgen_CVDY(UChar r1, IRTemp op2addr)
   10640 {
   10641    store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
   10642 
   10643    return "cvdy";
   10644 }
   10645 
   10646 static HChar *
   10647 s390_irgen_FLOGR(UChar r1, UChar r2)
   10648 {
   10649    IRTemp input    = newTemp(Ity_I64);
   10650    IRTemp not_zero = newTemp(Ity_I64);
   10651    IRTemp tmpnum   = newTemp(Ity_I64);
   10652    IRTemp num      = newTemp(Ity_I64);
   10653    IRTemp shift_amount = newTemp(Ity_I8);
   10654 
   10655    /* We use the "count leading zeroes" operator because the number of
   10656       leading zeroes is identical with the bit position of the first '1' bit.
   10657       However, that operator does not work when the input value is zero.
   10658       Therefore, we set the LSB of the input value to 1 and use Clz64 on
   10659       the modified value. If input == 0, then the result is 64. Otherwise,
   10660       the result of Clz64 is what we want. */
   10661 
   10662    assign(input, get_gpr_dw0(r2));
   10663    assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
   10664    assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
   10665 
   10666    /* num = (input == 0) ? 64 : tmpnum */
   10667    assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
   10668                      /* == 0 */ mkU64(64),
   10669                      /* != 0 */ mkexpr(tmpnum)));
   10670 
   10671    put_gpr_dw0(r1, mkexpr(num));
   10672 
   10673    /* Set the leftmost '1' bit of the input value to zero. The general scheme
   10674       is to first shift the input value by NUM + 1 bits to the left which
   10675       causes the leftmost '1' bit to disappear. Then we shift logically to
   10676       the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
   10677       Iop_Shr64 are undefined if the shift-amount is greater than or equal to
   10678       the width of the value-to-be-shifted, we need to special case
   10679       NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
   10680       For both such INPUT values the result will be 0. */
   10681 
   10682    assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
   10683                           mkU64(1))));
   10684 
   10685    put_gpr_dw0(r1 + 1,
   10686                mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
   10687                      /* == 0 || == 1*/ mkU64(0),
   10688                      /* otherwise */
   10689                      binop(Iop_Shr64,
   10690                            binop(Iop_Shl64, mkexpr(input),
   10691                                  mkexpr(shift_amount)),
   10692                            mkexpr(shift_amount))));
   10693 
   10694    /* Compare the original value as an unsigned integer with 0. */
   10695    s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
   10696                       mktemp(Ity_I64, mkU64(0)), False);
   10697 
   10698    return "flogr";
   10699 }
   10700 
   10701 static HChar *
   10702 s390_irgen_STCK(IRTemp op2addr)
   10703 {
   10704    IRDirty *d;
   10705    IRTemp cc = newTemp(Ity_I64);
   10706 
   10707    d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
   10708                          &s390x_dirtyhelper_STCK,
   10709                          mkIRExprVec_1(mkexpr(op2addr)));
   10710    d->mFx   = Ifx_Write;
   10711    d->mAddr = mkexpr(op2addr);
   10712    d->mSize = 8;
   10713    stmt(IRStmt_Dirty(d));
   10714    s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
   10715                       mkexpr(cc), mkU64(0), mkU64(0));
   10716    return "stck";
   10717 }
   10718 
   10719 static HChar *
   10720 s390_irgen_STCKF(IRTemp op2addr)
   10721 {
   10722    IRDirty *d;
   10723    IRTemp cc = newTemp(Ity_I64);
   10724 
   10725    d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
   10726                          &s390x_dirtyhelper_STCKF,
   10727                          mkIRExprVec_1(mkexpr(op2addr)));
   10728    d->mFx   = Ifx_Write;
   10729    d->mAddr = mkexpr(op2addr);
   10730    d->mSize = 8;
   10731    stmt(IRStmt_Dirty(d));
   10732    s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
   10733                       mkexpr(cc), mkU64(0), mkU64(0));
   10734    return "stckf";
   10735 }
   10736 
   10737 static HChar *
   10738 s390_irgen_STCKE(IRTemp op2addr)
   10739 {
   10740    IRDirty *d;
   10741    IRTemp cc = newTemp(Ity_I64);
   10742 
   10743    d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
   10744                          &s390x_dirtyhelper_STCKE,
   10745                          mkIRExprVec_1(mkexpr(op2addr)));
   10746    d->mFx   = Ifx_Write;
   10747    d->mAddr = mkexpr(op2addr);
   10748    d->mSize = 16;
   10749    stmt(IRStmt_Dirty(d));
   10750    s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
   10751                       mkexpr(cc), mkU64(0), mkU64(0));
   10752    return "stcke";
   10753 }
   10754 
   10755 static HChar *
   10756 s390_irgen_STFLE(IRTemp op2addr)
   10757 {
   10758    IRDirty *d;
   10759    IRTemp cc = newTemp(Ity_I64);
   10760 
   10761    d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
   10762                          &s390x_dirtyhelper_STFLE,
   10763                          mkIRExprVec_1(mkexpr(op2addr)));
   10764 
   10765    d->needsBBP = 1;  /* Need to pass pointer to guest state to helper */
   10766 
   10767    d->fxState[0].fx     = Ifx_Modify;  /* read then write */
   10768    d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
   10769    d->fxState[0].size   = sizeof(ULong);
   10770    d->nFxState = 1;
   10771 
   10772    d->mAddr = mkexpr(op2addr);
   10773    /* Pretend all double words are written */
   10774    d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
   10775    d->mFx   = Ifx_Write;
   10776 
   10777    stmt(IRStmt_Dirty(d));
   10778 
   10779    s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
   10780 
   10781    return "stfle";
   10782 }
   10783 
   10784 static HChar *
   10785 s390_irgen_CKSM(UChar r1,UChar r2)
   10786 {
   10787    IRTemp addr = newTemp(Ity_I64);
   10788    IRTemp op = newTemp(Ity_I32);
   10789    IRTemp len = newTemp(Ity_I64);
   10790    IRTemp oldval = newTemp(Ity_I32);
   10791    IRTemp mask = newTemp(Ity_I32);
   10792    IRTemp newop = newTemp(Ity_I32);
   10793    IRTemp result = newTemp(Ity_I32);
   10794    IRTemp result1 = newTemp(Ity_I32);
   10795    IRTemp inc = newTemp(Ity_I64);
   10796 
   10797    assign(oldval, get_gpr_w1(r1));
   10798    assign(addr, get_gpr_dw0(r2));
   10799    assign(len, get_gpr_dw0(r2+1));
   10800 
   10801    /* Condition code is always zero. */
   10802    s390_cc_set(0);
   10803 
   10804    /* If length is zero, there is no need to calculate the checksum */
   10805    if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
   10806                      guest_IA_next_instr);
   10807 
   10808    /* Assiging the increment variable to adjust address and length
   10809       later on. */
   10810    assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
   10811                            mkexpr(len), mkU64(4)));
   10812 
   10813    /* If length < 4 the final 4-byte 2nd operand value is computed by
   10814       appending the remaining bytes to the right with 0. This is done
   10815       by AND'ing the 4 bytes loaded from memory with an appropriate
   10816       mask. If length >= 4, that mask is simply 0xffffffff. */
   10817 
   10818    assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
   10819                       /* Mask computation when len < 4:
   10820                          0xffffffff << (32 - (len % 4)*8) */
   10821                       binop(Iop_Shl32, mkU32(0xffffffff),
   10822                             unop(Iop_32to8,
   10823                                  binop(Iop_Sub32, mkU32(32),
   10824                                        binop(Iop_Shl32,
   10825                                              unop(Iop_64to32,
   10826                                                   binop(Iop_And64,
   10827                                                         mkexpr(len), mkU64(3))),
   10828                                              mkU8(3))))),
   10829                       mkU32(0xffffffff)));
   10830 
   10831    assign(op, load(Ity_I32, mkexpr(addr)));
   10832    assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
   10833    assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
   10834 
   10835    /* Checking for carry */
   10836    assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
   10837                          binop(Iop_Add32, mkexpr(result), mkU32(1)),
   10838                          mkexpr(result)));
   10839 
   10840    put_gpr_w1(r1, mkexpr(result1));
   10841    put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
   10842    put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
   10843 
   10844    if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
   10845                      guest_IA_curr_instr);
   10846 
   10847    return "cksm";
   10848 }
   10849 
   10850 
   10851 /*------------------------------------------------------------*/
   10852 /*--- Build IR for special instructions                    ---*/
   10853 /*------------------------------------------------------------*/
   10854 
   10855 static void
   10856 s390_irgen_client_request(void)
   10857 {
   10858    if (0)
   10859       vex_printf("%%R3 = client_request ( %%R2 )\n");
   10860 
   10861    irsb->next = mkU64((ULong)(guest_IA_curr_instr
   10862                               + S390_SPECIAL_OP_PREAMBLE_SIZE
   10863                               + S390_SPECIAL_OP_SIZE));
   10864    irsb->jumpkind = Ijk_ClientReq;
   10865 
   10866    dis_res->whatNext = Dis_StopHere;
   10867 }
   10868 
   10869 static void
   10870 s390_irgen_guest_NRADDR(void)
   10871 {
   10872    if (0)
   10873       vex_printf("%%R3 = guest_NRADDR\n");
   10874 
   10875    put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
   10876 }
   10877 
   10878 static void
   10879 s390_irgen_call_noredir(void)
   10880 {
   10881    /* Continue after special op */
   10882    put_gpr_dw0(14, mkU64(guest_IA_curr_instr
   10883                          + S390_SPECIAL_OP_PREAMBLE_SIZE
   10884                          + S390_SPECIAL_OP_SIZE));
   10885 
   10886    /* The address is in REG1, all parameters are in the right (guest) places */
   10887    irsb->next     = get_gpr_dw0(1);
   10888    irsb->jumpkind = Ijk_NoRedir;
   10889 
   10890    dis_res->whatNext = Dis_StopHere;
   10891 }
   10892 
   10893 /* Force proper alignment for the structures below. */
   10894 #pragma pack(1)
   10895 
   10896 
   10897 static s390_decode_t
   10898 s390_decode_2byte_and_irgen(UChar *bytes)
   10899 {
   10900    typedef union {
   10901       struct {
   10902          unsigned int op : 16;
   10903       } E;
   10904       struct {
   10905          unsigned int op :  8;
   10906          unsigned int i  :  8;
   10907       } I;
   10908       struct {
   10909          unsigned int op :  8;
   10910          unsigned int r1 :  4;
   10911          unsigned int r2 :  4;
   10912       } RR;
   10913    } formats;
   10914    union {
   10915       formats fmt;
   10916       UShort value;
   10917    } ovl;
   10918 
   10919    vassert(sizeof(formats) == 2);
   10920 
   10921    ((char *)(&ovl.value))[0] = bytes[0];
   10922    ((char *)(&ovl.value))[1] = bytes[1];
   10923 
   10924    switch (ovl.value & 0xffff) {
   10925    case 0x0000: /* invalid opcode */
   10926       s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
   10927    case 0x0101: /* PR */ goto unimplemented;
   10928    case 0x0102: /* UPT */ goto unimplemented;
   10929    case 0x0104: /* PTFF */ goto unimplemented;
   10930    case 0x0107: /* SCKPF */ goto unimplemented;
   10931    case 0x010a: /* PFPO */ goto unimplemented;
   10932    case 0x010b: /* TAM */ goto unimplemented;
   10933    case 0x010c: /* SAM24 */ goto unimplemented;
   10934    case 0x010d: /* SAM31 */ goto unimplemented;
   10935    case 0x010e: /* SAM64 */ goto unimplemented;
   10936    case 0x01ff: /* TRAP2 */ goto unimplemented;
   10937    }
   10938 
   10939    switch ((ovl.value & 0xff00) >> 8) {
   10940    case 0x04: /* SPM */ goto unimplemented;
   10941    case 0x05: /* BALR */ goto unimplemented;
   10942    case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10943                                 goto ok;
   10944    case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10945                              goto ok;
   10946    case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i);  goto ok;
   10947    case 0x0b: /* BSM */ goto unimplemented;
   10948    case 0x0c: /* BASSM */ goto unimplemented;
   10949    case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10950                                 goto ok;
   10951    case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10952                              goto ok;
   10953    case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10954                              goto ok;
   10955    case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10956                                 goto ok;
   10957    case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10958                                 goto ok;
   10959    case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10960                                 goto ok;
   10961    case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10962                                 goto ok;
   10963    case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10964                                 goto ok;
   10965    case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10966                                 goto ok;
   10967    case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10968                                 goto ok;
   10969    case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10970                                 goto ok;
   10971    case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10972                                 goto ok;
   10973    case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10974                                 goto ok;
   10975    case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10976                                 goto ok;
   10977    case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10978                                 goto ok;
   10979    case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10980                                 goto ok;
   10981    case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10982                                 goto ok;
   10983    case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10984                                 goto ok;
   10985    case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10986                                 goto ok;
   10987    case 0x20: /* LPDR */ goto unimplemented;
   10988    case 0x21: /* LNDR */ goto unimplemented;
   10989    case 0x22: /* LTDR */ goto unimplemented;
   10990    case 0x23: /* LCDR */ goto unimplemented;
   10991    case 0x24: /* HDR */ goto unimplemented;
   10992    case 0x25: /* LDXR */ goto unimplemented;
   10993    case 0x26: /* MXR */ goto unimplemented;
   10994    case 0x27: /* MXDR */ goto unimplemented;
   10995    case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   10996                                 goto ok;
   10997    case 0x29: /* CDR */ goto unimplemented;
   10998    case 0x2a: /* ADR */ goto unimplemented;
   10999    case 0x2b: /* SDR */ goto unimplemented;
   11000    case 0x2c: /* MDR */ goto unimplemented;
   11001    case 0x2d: /* DDR */ goto unimplemented;
   11002    case 0x2e: /* AWR */ goto unimplemented;
   11003    case 0x2f: /* SWR */ goto unimplemented;
   11004    case 0x30: /* LPER */ goto unimplemented;
   11005    case 0x31: /* LNER */ goto unimplemented;
   11006    case 0x32: /* LTER */ goto unimplemented;
   11007    case 0x33: /* LCER */ goto unimplemented;
   11008    case 0x34: /* HER */ goto unimplemented;
   11009    case 0x35: /* LEDR */ goto unimplemented;
   11010    case 0x36: /* AXR */ goto unimplemented;
   11011    case 0x37: /* SXR */ goto unimplemented;
   11012    case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
   11013                                 goto ok;
   11014    case 0x39: /* CER */ goto unimplemented;
   11015    case 0x3a: /* AER */ goto unimplemented;
   11016    case 0x3b: /* SER */ goto unimplemented;
   11017    case 0x3c: /* MDER */ goto unimplemented;
   11018    case 0x3d: /* DER */ goto unimplemented;
   11019    case 0x3e: /* AUR */ goto unimplemented;
   11020    case 0x3f: /* SUR */ goto unimplemented;
   11021    }
   11022 
   11023    return S390_DECODE_UNKNOWN_INSN;
   11024 
   11025 ok:
   11026    return S390_DECODE_OK;
   11027 
   11028 unimplemented:
   11029    return S390_DECODE_UNIMPLEMENTED_INSN;
   11030 }
   11031 
   11032 static s390_decode_t
   11033 s390_decode_4byte_and_irgen(UChar *bytes)
   11034 {
   11035    typedef union {
   11036       struct {
   11037          unsigned int op1 :  8;
   11038          unsigned int r1  :  4;
   11039          unsigned int op2 :  4;
   11040          unsigned int i2  : 16;
   11041       } RI;
   11042       struct {
   11043          unsigned int op : 16;
   11044          unsigned int    :  8;
   11045          unsigned int r1 :  4;
   11046          unsigned int r2 :  4;
   11047       } RRE;
   11048       struct {
   11049          unsigned int op : 16;
   11050          unsigned int r1 :  4;
   11051          unsigned int    :  4;
   11052          unsigned int r3 :  4;
   11053          unsigned int r2 :  4;
   11054       } RRF;
   11055       struct {
   11056          unsigned int op : 16;
   11057          unsigned int r3 :  4;
   11058          unsigned int m4 :  4;
   11059          unsigned int r1 :  4;
   11060          unsigned int r2 :  4;
   11061       } RRF2;
   11062       struct {
   11063          unsigned int op : 16;
   11064          unsigned int r3 :  4;
   11065          unsigned int    :  4;
   11066          unsigned int r1 :  4;
   11067          unsigned int r2 :  4;
   11068       } RRF3;
   11069       struct {
   11070          unsigned int op : 16;
   11071          unsigned int r3 :  4;
   11072          unsigned int    :  4;
   11073          unsigned int r1 :  4;
   11074          unsigned int r2 :  4;
   11075       } RRR;
   11076       struct {
   11077          unsigned int op : 16;
   11078          unsigned int r3 :  4;
   11079          unsigned int    :  4;
   11080          unsigned int r1 :  4;
   11081          unsigned int r2 :  4;
   11082       } RRF4;
   11083       struct {
   11084          unsigned int op :  8;
   11085          unsigned int r1 :  4;
   11086          unsigned int r3 :  4;
   11087          unsigned int b2 :  4;
   11088          unsigned int d2 : 12;
   11089       } RS;
   11090       struct {
   11091          unsigned int op :  8;
   11092          unsigned int r1 :  4;
   11093          unsigned int r3 :  4;
   11094          unsigned int i2 : 16;
   11095       } RSI;
   11096       struct {
   11097          unsigned int op :  8;
   11098          unsigned int r1 :  4;
   11099          unsigned int x2 :  4;
   11100          unsigned int b2 :  4;
   11101          unsigned int d2 : 12;
   11102       } RX;
   11103       struct {
   11104          unsigned int op : 16;
   11105          unsigned int b2 :  4;
   11106          unsigned int d2 : 12;
   11107       } S;
   11108       struct {
   11109          unsigned int op :  8;
   11110          unsigned int i2 :  8;
   11111          unsigned int b1 :  4;
   11112          unsigned int d1 : 12;
   11113       } SI;
   11114    } formats;
   11115    union {
   11116       formats fmt;
   11117       UInt value;
   11118    } ovl;
   11119 
   11120    vassert(sizeof(formats) == 4);
   11121 
   11122    ((char *)(&ovl.value))[0] = bytes[0];
   11123    ((char *)(&ovl.value))[1] = bytes[1];
   11124    ((char *)(&ovl.value))[2] = bytes[2];
   11125    ((char *)(&ovl.value))[3] = bytes[3];
   11126 
   11127    switch ((ovl.value & 0xff0f0000) >> 16) {
   11128    case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
   11129                                   ovl.fmt.RI.i2);  goto ok;
   11130    case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
   11131                                   ovl.fmt.RI.i2);  goto ok;
   11132    case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
   11133                                   ovl.fmt.RI.i2);  goto ok;
   11134    case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
   11135                                   ovl.fmt.RI.i2);  goto ok;
   11136    case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
   11137                                   ovl.fmt.RI.i2);  goto ok;
   11138    case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
   11139                                   ovl.fmt.RI.i2);  goto ok;
   11140    case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
   11141                                   ovl.fmt.RI.i2);  goto ok;
   11142    case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
   11143                                   ovl.fmt.RI.i2);  goto ok;
   11144    case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
   11145                                   ovl.fmt.RI.i2);  goto ok;
   11146    case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
   11147                                   ovl.fmt.RI.i2);  goto ok;
   11148    case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
   11149                                   ovl.fmt.RI.i2);  goto ok;
   11150    case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
   11151                                   ovl.fmt.RI.i2);  goto ok;
   11152    case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
   11153                                   ovl.fmt.RI.i2);  goto ok;
   11154    case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
   11155                                   ovl.fmt.RI.i2);  goto ok;
   11156    case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
   11157                                   ovl.fmt.RI.i2);  goto ok;
   11158    case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
   11159                                   ovl.fmt.RI.i2);  goto ok;
   11160    case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
   11161                                   ovl.fmt.RI.i2);  goto ok;
   11162    case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
   11163                                   ovl.fmt.RI.i2);  goto ok;
   11164    case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
   11165                                   ovl.fmt.RI.i2);  goto ok;
   11166    case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
   11167                                   ovl.fmt.RI.i2);  goto ok;
   11168    case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
   11169                                goto ok;
   11170    case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
   11171                                   ovl.fmt.RI.i2);  goto ok;
   11172    case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
   11173                                   ovl.fmt.RI.i2);  goto ok;
   11174    case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
   11175                                   ovl.fmt.RI.i2);  goto ok;
   11176    case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
   11177                                   goto ok;
   11178    case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
   11179                                   ovl.fmt.RI.i2);  goto ok;
   11180    case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
   11181                                   goto ok;
   11182    case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
   11183                                   ovl.fmt.RI.i2);  goto ok;
   11184    case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
   11185                                   goto ok;
   11186    case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
   11187                                   ovl.fmt.RI.i2);  goto ok;
   11188    case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
   11189                                   goto ok;
   11190    case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
   11191                                   ovl.fmt.RI.i2);  goto ok;
   11192    }
   11193 
   11194    switch ((ovl.value & 0xffff0000) >> 16) {
   11195    case 0x8000: /* SSM */ goto unimplemented;
   11196    case 0x8200: /* LPSW */ goto unimplemented;
   11197    case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
   11198                                  goto ok;
   11199    case 0xb202: /* STIDP */ goto unimplemented;
   11200    case 0xb204: /* SCK */ goto unimplemented;
   11201    case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
   11202    case 0xb206: /* SCKC */ goto unimplemented;
   11203    case 0xb207: /* STCKC */ goto unimplemented;
   11204    case 0xb208: /* SPT */ goto unimplemented;
   11205    case 0xb209: /* STPT */ goto unimplemented;
   11206    case 0xb20a: /* SPKA */ goto unimplemented;
   11207    case 0xb20b: /* IPK */ goto unimplemented;
   11208    case 0xb20d: /* PTLB */ goto unimplemented;
   11209    case 0xb210: /* SPX */ goto unimplemented;
   11210    case 0xb211: /* STPX */ goto unimplemented;
   11211    case 0xb212: /* STAP */ goto unimplemented;
   11212    case 0xb214: /* SIE */ goto unimplemented;
   11213    case 0xb218: /* PC */ goto unimplemented;
   11214    case 0xb219: /* SAC */ goto unimplemented;
   11215    case 0xb21a: /* CFC */ goto unimplemented;
   11216    case 0xb221: /* IPTE */ goto unimplemented;
   11217    case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1);  goto ok;
   11218    case 0xb223: /* IVSK */ goto unimplemented;
   11219    case 0xb224: /* IAC */ goto unimplemented;
   11220    case 0xb225: /* SSAR */ goto unimplemented;
   11221    case 0xb226: /* EPAR */ goto unimplemented;
   11222    case 0xb227: /* ESAR */ goto unimplemented;
   11223    case 0xb228: /* PT */ goto unimplemented;
   11224    case 0xb229: /* ISKE */ goto unimplemented;
   11225    case 0xb22a: /* RRBE */ goto unimplemented;
   11226    case 0xb22b: /* SSKE */ goto unimplemented;
   11227    case 0xb22c: /* TB */ goto unimplemented;
   11228    case 0xb22d: /* DXR */ goto unimplemented;
   11229    case 0xb22e: /* PGIN */ goto unimplemented;
   11230    case 0xb22f: /* PGOUT */ goto unimplemented;
   11231    case 0xb230: /* CSCH */ goto unimplemented;
   11232    case 0xb231: /* HSCH */ goto unimplemented;
   11233    case 0xb232: /* MSCH */ goto unimplemented;
   11234    case 0xb233: /* SSCH */ goto unimplemented;
   11235    case 0xb234: /* STSCH */ goto unimplemented;
   11236    case 0xb235: /* TSCH */ goto unimplemented;
   11237    case 0xb236: /* TPI */ goto unimplemented;
   11238    case 0xb237: /* SAL */ goto unimplemented;
   11239    case 0xb238: /* RSCH */ goto unimplemented;
   11240    case 0xb239: /* STCRW */ goto unimplemented;
   11241    case 0xb23a: /* STCPS */ goto unimplemented;
   11242    case 0xb23b: /* RCHP */ goto unimplemented;
   11243    case 0xb23c: /* SCHM */ goto unimplemented;
   11244    case 0xb240: /* BAKR */ goto unimplemented;
   11245    case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
   11246                                 ovl.fmt.RRE.r2);  goto ok;
   11247    case 0xb244: /* SQDR */ goto unimplemented;
   11248    case 0xb245: /* SQER */ goto unimplemented;
   11249    case 0xb246: /* STURA */ goto unimplemented;
   11250    case 0xb247: /* MSTA */ goto unimplemented;
   11251    case 0xb248: /* PALB */ goto unimplemented;
   11252    case 0xb249: /* EREG */ goto unimplemented;
   11253    case 0xb24a: /* ESTA */ goto unimplemented;
   11254    case 0xb24b: /* LURA */ goto unimplemented;
   11255    case 0xb24c: /* TAR */ goto unimplemented;
   11256    case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
   11257                                 ovl.fmt.RRE.r2);  goto ok;
   11258    case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
   11259                                 goto ok;
   11260    case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
   11261                                 goto ok;
   11262    case 0xb250: /* CSP */ goto unimplemented;
   11263    case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
   11264                                    ovl.fmt.RRE.r2);  goto ok;
   11265    case 0xb254: /* MVPG */ goto unimplemented;
   11266    case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
   11267                                    ovl.fmt.RRE.r2);  goto ok;
   11268    case 0xb257: /* CUSE */ goto unimplemented;
   11269    case 0xb258: /* BSG */ goto unimplemented;
   11270    case 0xb25a: /* BSA */ goto unimplemented;
   11271    case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
   11272                                    ovl.fmt.RRE.r2);  goto ok;
   11273    case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
   11274                                    ovl.fmt.RRE.r2);  goto ok;
   11275    case 0xb263: /* CMPSC */ goto unimplemented;
   11276    case 0xb274: /* SIGA */ goto unimplemented;
   11277    case 0xb276: /* XSCH */ goto unimplemented;
   11278    case 0xb277: /* RP */ goto unimplemented;
   11279    case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
   11280    case 0xb279: /* SACF */ goto unimplemented;
   11281    case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
   11282    case 0xb27d: /* STSI */ goto unimplemented;
   11283    case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
   11284                                  goto ok;
   11285    case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
   11286                                  goto ok;
   11287    case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
   11288                                  goto ok;
   11289    case 0xb2a5: /* TRE */ goto unimplemented;
   11290    case 0xb2a6: /* CU21 */ goto unimplemented;
   11291    case 0xb2a7: /* CU12 */ goto unimplemented;
   11292    case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
   11293                                  goto ok;
   11294    case 0xb2b1: /* STFL */ goto unimplemented;
   11295    case 0xb2b2: /* LPSWE */ goto unimplemented;
   11296    case 0xb2b8: /* SRNMB */ goto unimplemented;
   11297    case 0xb2b9: /* SRNMT */ goto unimplemented;
   11298    case 0xb2bd: /* LFAS */ goto unimplemented;
   11299    case 0xb2ff: /* TRAP4 */ goto unimplemented;
   11300    case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
   11301                                    ovl.fmt.RRE.r2);  goto ok;
   11302    case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
   11303                                    ovl.fmt.RRE.r2);  goto ok;
   11304    case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
   11305                                    ovl.fmt.RRE.r2);  goto ok;
   11306    case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
   11307                                    ovl.fmt.RRE.r2);  goto ok;
   11308    case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
   11309                                    ovl.fmt.RRE.r2);  goto ok;
   11310    case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
   11311                                    ovl.fmt.RRE.r2);  goto ok;
   11312    case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
   11313                                    ovl.fmt.RRE.r2);  goto ok;
   11314    case 0xb307: /* MXDBR */ goto unimplemented;
   11315    case 0xb308: /* KEBR */ goto unimplemented;
   11316    case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
   11317                                    ovl.fmt.RRE.r2);  goto ok;
   11318    case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
   11319                                    ovl.fmt.RRE.r2);  goto ok;
   11320    case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
   11321                                    ovl.fmt.RRE.r2);  goto ok;
   11322    case 0xb30c: /* MDEBR */ goto unimplemented;
   11323    case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
   11324                                    ovl.fmt.RRE.r2);  goto ok;
   11325    case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
   11326                                      ovl.fmt.RRF.r3, ovl.fmt.RRF.r2);  goto ok;
   11327    case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
   11328                                      ovl.fmt.RRF.r3, ovl.fmt.RRF.r2);  goto ok;
   11329    case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
   11330                                    ovl.fmt.RRE.r2);  goto ok;
   11331    case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
   11332                                    ovl.fmt.RRE.r2);  goto ok;
   11333    case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
   11334                                    ovl.fmt.RRE.r2);  goto ok;
   11335    case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
   11336                                    ovl.fmt.RRE.r2);  goto ok;
   11337    case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
   11338                                    ovl.fmt.RRE.r2);  goto ok;
   11339    case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
   11340                                    ovl.fmt.RRE.r2);  goto ok;
   11341    case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
   11342                                    ovl.fmt.RRE.r2);  goto ok;
   11343    case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
   11344                                    ovl.fmt.RRE.r2);  goto ok;
   11345    case 0xb318: /* KDBR */ goto unimplemented;
   11346    case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
   11347                                    ovl.fmt.RRE.r2);  goto ok;
   11348    case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
   11349                                    ovl.fmt.RRE.r2);  goto ok;
   11350    case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
   11351                                    ovl.fmt.RRE.r2);  goto ok;
   11352    case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
   11353                                    ovl.fmt.RRE.r2);  goto ok;
   11354    case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
   11355                                    ovl.fmt.RRE.r2);  goto ok;
   11356    case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
   11357                                      ovl.fmt.RRF.r3, ovl.fmt.RRF.r2);  goto ok;
   11358    case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
   11359                                      ovl.fmt.RRF.r3, ovl.fmt.RRF.r2);  goto ok;
   11360    case 0xb324: /* LDER */ goto unimplemented;
   11361    case 0xb325: /* LXDR */ goto unimplemented;
   11362    case 0xb326: /* LXER */ goto unimplemented;
   11363    case 0xb32e: /* MAER */ goto unimplemented;
   11364    case 0xb32f: /* MSER */ goto unimplemented;
   11365    case 0xb336: /* SQXR */ goto unimplemented;
   11366    case 0xb337: /* MEER */ goto unimplemented;
   11367    case 0xb338: /* MAYLR */ goto unimplemented;
   11368    case 0xb339: /* MYLR */ goto unimplemented;
   11369    case 0xb33a: /* MAYR */ goto unimplemented;
   11370    case 0xb33b: /* MYR */ goto unimplemented;
   11371    case 0xb33c: /* MAYHR */ goto unimplemented;
   11372    case 0xb33d: /* MYHR */ goto unimplemented;
   11373    case 0xb33e: /* MADR */ goto unimplemented;
   11374    case 0xb33f: /* MSDR */ goto unimplemented;
   11375    case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
   11376                                    ovl.fmt.RRE.r2);  goto ok;
   11377    case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
   11378                                    ovl.fmt.RRE.r2);  goto ok;
   11379    case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
   11380                                    ovl.fmt.RRE.r2);  goto ok;
   11381    case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
   11382                                    ovl.fmt.RRE.r2);  goto ok;
   11383    case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
   11384                                    ovl.fmt.RRE.r2);  goto ok;
   11385    case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
   11386                                    ovl.fmt.RRE.r2);  goto ok;
   11387    case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
   11388                                    ovl.fmt.RRE.r2);  goto ok;
   11389    case 0xb347: /* FIXBR */ goto unimplemented;
   11390    case 0xb348: /* KXBR */ goto unimplemented;
   11391    case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
   11392                                    ovl.fmt.RRE.r2);  goto ok;
   11393    case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
   11394                                    ovl.fmt.RRE.r2);  goto ok;
   11395    case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
   11396                                    ovl.fmt.RRE.r2);  goto ok;
   11397    case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
   11398                                    ovl.fmt.RRE.r2);  goto ok;
   11399    case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
   11400                                    ovl.fmt.RRE.r2);  goto ok;
   11401    case 0xb350: /* TBEDR */ goto unimplemented;
   11402    case 0xb351: /* TBDR */ goto unimplemented;
   11403    case 0xb353: /* DIEBR */ goto unimplemented;
   11404    case 0xb357: /* FIEBR */ goto unimplemented;
   11405    case 0xb358: /* THDER */ goto unimplemented;
   11406    case 0xb359: /* THDR */ goto unimplemented;
   11407    case 0xb35b: /* DIDBR */ goto unimplemented;
   11408    case 0xb35f: /* FIDBR */ goto unimplemented;
   11409    case 0xb360: /* LPXR */ goto unimplemented;
   11410    case 0xb361: /* LNXR */ goto unimplemented;
   11411    case 0xb362: /* LTXR */ goto unimplemented;
   11412    case 0xb363: /* LCXR */ goto unimplemented;
   11413    case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
   11414                                    ovl.fmt.RRE.r2);  goto ok;
   11415    case 0xb366: /* LEXR */ goto unimplemented;
   11416    case 0xb367: /* FIXR */ goto unimplemented;
   11417    case 0xb369: /* CXR */ goto unimplemented;
   11418    case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
   11419                                    ovl.fmt.RRE.r2);  goto ok;
   11420    case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
   11421                                    ovl.fmt.RRE.r2);  goto ok;
   11422    case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
   11423                                       ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11424                                       goto ok;
   11425    case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
   11426                                    ovl.fmt.RRE.r2);  goto ok;
   11427    case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1);  goto ok;
   11428    case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1);  goto ok;
   11429    case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1);  goto ok;
   11430    case 0xb377: /* FIER */ goto unimplemented;
   11431    case 0xb37f: /* FIDR */ goto unimplemented;
   11432    case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1);  goto ok;
   11433    case 0xb385: /* SFASR */ goto unimplemented;
   11434    case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1);  goto ok;
   11435    case 0xb390: /* CELFBR */ goto unimplemented;
   11436    case 0xb391: /* CDLFBR */ goto unimplemented;
   11437    case 0xb392: /* CXLFBR */ goto unimplemented;
   11438    case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
   11439                                    ovl.fmt.RRE.r2);  goto ok;
   11440    case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
   11441                                    ovl.fmt.RRE.r2);  goto ok;
   11442    case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
   11443                                    ovl.fmt.RRE.r2);  goto ok;
   11444    case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
   11445                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11446                                      goto ok;
   11447    case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
   11448                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11449                                      goto ok;
   11450    case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
   11451                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11452                                      goto ok;
   11453    case 0xb3a0: /* CELGBR */ goto unimplemented;
   11454    case 0xb3a1: /* CDLGBR */ goto unimplemented;
   11455    case 0xb3a2: /* CXLGBR */ goto unimplemented;
   11456    case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
   11457                                    ovl.fmt.RRE.r2);  goto ok;
   11458    case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
   11459                                    ovl.fmt.RRE.r2);  goto ok;
   11460    case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
   11461                                    ovl.fmt.RRE.r2);  goto ok;
   11462    case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
   11463                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11464                                      goto ok;
   11465    case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
   11466                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11467                                      goto ok;
   11468    case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
   11469                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
   11470                                      goto ok;
   11471    case 0xb3b4: /* CEFR */ goto unimplemented;
   11472    case 0xb3b5: /* CDFR */ goto unimplemented;
   11473    case 0xb3b6: /* CXFR */ goto unimplemented;
   11474    case 0xb3b8: /* CFER */ goto unimplemented;
   11475    case 0xb3b9: /* CFDR */ goto unimplemented;
   11476    case 0xb3ba: /* CFXR */ goto unimplemented;
   11477    case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
   11478                                    ovl.fmt.RRE.r2);  goto ok;
   11479    case 0xb3c4: /* CEGR */ goto unimplemented;
   11480    case 0xb3c5: /* CDGR */ goto unimplemented;
   11481    case 0xb3c6: /* CXGR */ goto unimplemented;
   11482    case 0xb3c8: /* CGER */ goto unimplemented;
   11483    case 0xb3c9: /* CGDR */ goto unimplemented;
   11484    case 0xb3ca: /* CGXR */ goto unimplemented;
   11485    case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
   11486                                    ovl.fmt.RRE.r2);  goto ok;
   11487    case 0xb3d0: /* MDTR */ goto unimplemented;
   11488    case 0xb3d1: /* DDTR */ goto unimplemented;
   11489    case 0xb3d2: /* ADTR */ goto unimplemented;
   11490    case 0xb3d3: /* SDTR */ goto unimplemented;
   11491    case 0xb3d4: /* LDETR */ goto unimplemented;
   11492    case 0xb3d5: /* LEDTR */ goto unimplemented;
   11493    case 0xb3d6: /* LTDTR */ goto unimplemented;
   11494    case 0xb3d7: /* FIDTR */ goto unimplemented;
   11495    case 0xb3d8: /* MXTR */ goto unimplemented;
   11496    case 0xb3d9: /* DXTR */ goto unimplemented;
   11497    case 0xb3da: /* AXTR */ goto unimplemented;
   11498    case 0xb3db: /* SXTR */ goto unimplemented;
   11499    case 0xb3dc: /* LXDTR */ goto unimplemented;
   11500    case 0xb3dd: /* LDXTR */ goto unimplemented;
   11501    case 0xb3de: /* LTXTR */ goto unimplemented;
   11502    case 0xb3df: /* FIXTR */ goto unimplemented;
   11503    case 0xb3e0: /* KDTR */ goto unimplemented;
   11504    case 0xb3e1: /* CGDTR */ goto unimplemented;
   11505    case 0xb3e2: /* CUDTR */ goto unimplemented;
   11506    case 0xb3e3: /* CSDTR */ goto unimplemented;
   11507    case 0xb3e4: /* CDTR */ goto unimplemented;
   11508    case 0xb3e5: /* EEDTR */ goto unimplemented;
   11509    case 0xb3e7: /* ESDTR */ goto unimplemented;
   11510    case 0xb3e8: /* KXTR */ goto unimplemented;
   11511    case 0xb3e9: /* CGXTR */ goto unimplemented;
   11512    case 0xb3ea: /* CUXTR */ goto unimplemented;
   11513    case 0xb3eb: /* CSXTR */ goto unimplemented;
   11514    case 0xb3ec: /* CXTR */ goto unimplemented;
   11515    case 0xb3ed: /* EEXTR */ goto unimplemented;
   11516    case 0xb3ef: /* ESXTR */ goto unimplemented;
   11517    case 0xb3f1: /* CDGTR */ goto unimplemented;
   11518    case 0xb3f2: /* CDUTR */ goto unimplemented;
   11519    case 0xb3f3: /* CDSTR */ goto unimplemented;
   11520    case 0xb3f4: /* CEDTR */ goto unimplemented;
   11521    case 0xb3f5: /* QADTR */ goto unimplemented;
   11522    case 0xb3f6: /* IEDTR */ goto unimplemented;
   11523    case 0xb3f7: /* RRDTR */ goto unimplemented;
   11524    case 0xb3f9: /* CXGTR */ goto unimplemented;
   11525    case 0xb3fa: /* CXUTR */ goto unimplemented;
   11526    case 0xb3fb: /* CXSTR */ goto unimplemented;
   11527    case 0xb3fc: /* CEXTR */ goto unimplemented;
   11528    case 0xb3fd: /* QAXTR */ goto unimplemented;
   11529    case 0xb3fe: /* IEXTR */ goto unimplemented;
   11530    case 0xb3ff: /* RRXTR */ goto unimplemented;
   11531    case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
   11532                                    ovl.fmt.RRE.r2);  goto ok;
   11533    case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
   11534                                    ovl.fmt.RRE.r2);  goto ok;
   11535    case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
   11536                                    ovl.fmt.RRE.r2);  goto ok;
   11537    case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
   11538                                    ovl.fmt.RRE.r2);  goto ok;
   11539    case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
   11540                                    ovl.fmt.RRE.r2);  goto ok;
   11541    case 0xb905: /* LURAG */ goto unimplemented;
   11542    case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
   11543                                    ovl.fmt.RRE.r2);  goto ok;
   11544    case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
   11545                                    ovl.fmt.RRE.r2);  goto ok;
   11546    case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
   11547                                    ovl.fmt.RRE.r2);  goto ok;
   11548    case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
   11549                                    ovl.fmt.RRE.r2);  goto ok;
   11550    case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
   11551                                    ovl.fmt.RRE.r2);  goto ok;
   11552    case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
   11553                                    ovl.fmt.RRE.r2);  goto ok;
   11554    case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
   11555                                    ovl.fmt.RRE.r2);  goto ok;
   11556    case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
   11557                                    ovl.fmt.RRE.r2);  goto ok;
   11558    case 0xb90e: /* EREGG */ goto unimplemented;
   11559    case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
   11560                                    ovl.fmt.RRE.r2);  goto ok;
   11561    case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
   11562                                    ovl.fmt.RRE.r2);  goto ok;
   11563    case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
   11564                                    ovl.fmt.RRE.r2);  goto ok;
   11565    case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
   11566                                    ovl.fmt.RRE.r2);  goto ok;
   11567    case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
   11568                                    ovl.fmt.RRE.r2);  goto ok;
   11569    case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
   11570                                    ovl.fmt.RRE.r2);  goto ok;
   11571    case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
   11572                                    ovl.fmt.RRE.r2);  goto ok;
   11573    case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
   11574                                    ovl.fmt.RRE.r2);  goto ok;
   11575    case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
   11576                                    ovl.fmt.RRE.r2);  goto ok;
   11577    case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
   11578                                    ovl.fmt.RRE.r2);  goto ok;
   11579    case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
   11580                                    ovl.fmt.RRE.r2);  goto ok;
   11581    case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
   11582                                    ovl.fmt.RRE.r2);  goto ok;
   11583    case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
   11584                                    ovl.fmt.RRE.r2);  goto ok;
   11585    case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
   11586                                    ovl.fmt.RRE.r2);  goto ok;
   11587    case 0xb91e: /* KMAC */ goto unimplemented;
   11588    case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
   11589                                    ovl.fmt.RRE.r2);  goto ok;
   11590    case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
   11591                                    ovl.fmt.RRE.r2);  goto ok;
   11592    case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
   11593                                    ovl.fmt.RRE.r2);  goto ok;
   11594    case 0xb925: /* STURG */ goto unimplemented;
   11595    case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
   11596                                    ovl.fmt.RRE.r2);  goto ok;
   11597    case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
   11598                                    ovl.fmt.RRE.r2);  goto ok;
   11599    case 0xb928: /* PCKMO */ goto unimplemented;
   11600    case 0xb92b: /* KMO */ goto unimplemented;
   11601    case 0xb92c: /* PCC */ goto unimplemented;
   11602    case 0xb92d: /* KMCTR */ goto unimplemented;
   11603    case 0xb92e: /* KM */ goto unimplemented;
   11604    case 0xb92f: /* KMC */ goto unimplemented;
   11605    case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
   11606                                    ovl.fmt.RRE.r2);  goto ok;
   11607    case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
   11608                                    ovl.fmt.RRE.r2);  goto ok;
   11609    case 0xb93e: /* KIMD */ goto unimplemented;
   11610    case 0xb93f: /* KLMD */ goto unimplemented;
   11611    case 0xb941: /* CFDTR */ goto unimplemented;
   11612    case 0xb942: /* CLGDTR */ goto unimplemented;
   11613    case 0xb943: /* CLFDTR */ goto unimplemented;
   11614    case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
   11615                                    ovl.fmt.RRE.r2);  goto ok;
   11616    case 0xb949: /* CFXTR */ goto unimplemented;
   11617    case 0xb94a: /* CLGXTR */ goto unimplemented;
   11618    case 0xb94b: /* CLFXTR */ goto unimplemented;
   11619    case 0xb951: /* CDFTR */ goto unimplemented;
   11620    case 0xb952: /* CDLGTR */ goto unimplemented;
   11621    case 0xb953: /* CDLFTR */ goto unimplemented;
   11622    case 0xb959: /* CXFTR */ goto unimplemented;
   11623    case 0xb95a: /* CXLGTR */ goto unimplemented;
   11624    case 0xb95b: /* CXLFTR */ goto unimplemented;
   11625    case 0xb960: /* CGRT */ goto unimplemented;
   11626    case 0xb961: /* CLGRT */ goto unimplemented;
   11627    case 0xb972: /* CRT */ goto unimplemented;
   11628    case 0xb973: /* CLRT */ goto unimplemented;
   11629    case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
   11630                                    ovl.fmt.RRE.r2);  goto ok;
   11631    case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
   11632                                    ovl.fmt.RRE.r2);  goto ok;
   11633    case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
   11634                                    ovl.fmt.RRE.r2);  goto ok;
   11635    case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
   11636                                    ovl.fmt.RRE.r2);  goto ok;
   11637    case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
   11638                                    ovl.fmt.RRE.r2);  goto ok;
   11639    case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
   11640                                    ovl.fmt.RRE.r2);  goto ok;
   11641    case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
   11642                                    ovl.fmt.RRE.r2);  goto ok;
   11643    case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
   11644                                    ovl.fmt.RRE.r2);  goto ok;
   11645    case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
   11646                                    ovl.fmt.RRE.r2);  goto ok;
   11647    case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
   11648                                    ovl.fmt.RRE.r2);  goto ok;
   11649    case 0xb98a: /* CSPG */ goto unimplemented;
   11650    case 0xb98d: /* EPSW */ goto unimplemented;
   11651    case 0xb98e: /* IDTE */ goto unimplemented;
   11652    case 0xb990: /* TRTT */ goto unimplemented;
   11653    case 0xb991: /* TRTO */ goto unimplemented;
   11654    case 0xb992: /* TROT */ goto unimplemented;
   11655    case 0xb993: /* TROO */ goto unimplemented;
   11656    case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
   11657                                    ovl.fmt.RRE.r2);  goto ok;
   11658    case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
   11659                                    ovl.fmt.RRE.r2);  goto ok;
   11660    case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
   11661                                    ovl.fmt.RRE.r2);  goto ok;
   11662    case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
   11663                                    ovl.fmt.RRE.r2);  goto ok;
   11664    case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
   11665                                    ovl.fmt.RRE.r2);  goto ok;
   11666    case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
   11667                                    ovl.fmt.RRE.r2);  goto ok;
   11668    case 0xb99a: /* EPAIR */ goto unimplemented;
   11669    case 0xb99b: /* ESAIR */ goto unimplemented;
   11670    case 0xb99d: /* ESEA */ goto unimplemented;
   11671    case 0xb99e: /* PTI */ goto unimplemented;
   11672    case 0xb99f: /* SSAIR */ goto unimplemented;
   11673    case 0xb9a2: /* PTF */ goto unimplemented;
   11674    case 0xb9aa: /* LPTEA */ goto unimplemented;
   11675    case 0xb9ae: /* RRBM */ goto unimplemented;
   11676    case 0xb9af: /* PFMF */ goto unimplemented;
   11677    case 0xb9b0: /* CU14 */ goto unimplemented;
   11678    case 0xb9b1: /* CU24 */ goto unimplemented;
   11679    case 0xb9b2: /* CU41 */ goto unimplemented;
   11680    case 0xb9b3: /* CU42 */ goto unimplemented;
   11681    case 0xb9bd: /* TRTRE */ goto unimplemented;
   11682    case 0xb9be: /* SRSTU */ goto unimplemented;
   11683    case 0xb9bf: /* TRTE */ goto unimplemented;
   11684    case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
   11685                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11686                                       goto ok;
   11687    case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
   11688                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11689                                       goto ok;
   11690    case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
   11691                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11692                                       goto ok;
   11693    case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
   11694                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11695                                       goto ok;
   11696    case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
   11697                                    ovl.fmt.RRE.r2);  goto ok;
   11698    case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
   11699                                    ovl.fmt.RRE.r2);  goto ok;
   11700    case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
   11701                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11702                                       goto ok;
   11703    case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
   11704                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11705                                       goto ok;
   11706    case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
   11707                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11708                                       goto ok;
   11709    case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
   11710                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11711                                       goto ok;
   11712    case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
   11713                                    ovl.fmt.RRE.r2);  goto ok;
   11714    case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
   11715                                    ovl.fmt.RRE.r2);  goto ok;
   11716    case 0xb9e1: /* POPCNT */ goto unimplemented;
   11717    case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
   11718                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
   11719                                      S390_XMNM_LOCGR);  goto ok;
   11720    case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
   11721                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11722                                       goto ok;
   11723    case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
   11724                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11725                                       goto ok;
   11726    case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
   11727                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11728                                       goto ok;
   11729    case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
   11730                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11731                                       goto ok;
   11732    case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
   11733                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11734                                       goto ok;
   11735    case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
   11736                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11737                                       goto ok;
   11738    case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
   11739                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11740                                       goto ok;
   11741    case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
   11742                                      ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
   11743                                      S390_XMNM_LOCR);  goto ok;
   11744    case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
   11745                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11746                                       goto ok;
   11747    case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
   11748                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11749                                       goto ok;
   11750    case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
   11751                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11752                                       goto ok;
   11753    case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
   11754                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11755                                       goto ok;
   11756    case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
   11757                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11758                                       goto ok;
   11759    case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
   11760                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11761                                       goto ok;
   11762    case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
   11763                                       ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
   11764                                       goto ok;
   11765    }
   11766 
   11767    switch ((ovl.value & 0xff000000) >> 24) {
   11768    case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11769                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11770    case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11771                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11772    case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11773                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11774    case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11775                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11776    case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11777                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11778    case 0x45: /* BAL */ goto unimplemented;
   11779    case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11780                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11781    case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11782                              ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11783    case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11784                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11785    case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11786                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11787    case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11788                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11789    case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11790                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11791    case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11792                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11793    case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11794                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11795    case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11796                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11797    case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11798                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11799    case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11800                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11801    case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11802                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11803    case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11804                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11805    case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11806                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11807    case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11808                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11809    case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11810                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11811    case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11812                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11813    case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11814                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11815    case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11816                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11817    case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11818                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11819    case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11820                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11821    case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11822                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11823    case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11824                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11825    case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11826                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11827    case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11828                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11829    case 0x67: /* MXD */ goto unimplemented;
   11830    case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11831                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11832    case 0x69: /* CD */ goto unimplemented;
   11833    case 0x6a: /* AD */ goto unimplemented;
   11834    case 0x6b: /* SD */ goto unimplemented;
   11835    case 0x6c: /* MD */ goto unimplemented;
   11836    case 0x6d: /* DD */ goto unimplemented;
   11837    case 0x6e: /* AW */ goto unimplemented;
   11838    case 0x6f: /* SW */ goto unimplemented;
   11839    case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11840                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11841    case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11842                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11843    case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
   11844                                   ovl.fmt.RX.b2, ovl.fmt.RX.d2);  goto ok;
   11845    case 0x79: /* CE */ goto unimplemented;
   11846    case 0x7a: /* AE */ goto unimplemented;
   11847    case 0x7b: /* SE */ goto unimplemented;
   11848    case 0x7c: /* MDE */ goto unimplemented;
   11849    case 0x7d: /* DE */ goto unimplemented;
   11850    case 0x7e: /* AU */ goto unimplemented;
   11851    case 0x7f: /* SU */ goto unimplemented;
   11852    case 0x83: /* DIAG */ goto unimplemented;
   11853    case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
   11854                                   ovl.fmt.RSI.r3, ovl.fmt.RSI.i2);  goto ok;
   11855    case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
   11856                                   ovl.fmt.RSI.r3, ovl.fmt.RSI.i2);  goto ok;
   11857    case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11858                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11859    case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11860                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11861    case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11862                                   ovl.fmt.RS.d2);  goto ok;
   11863    case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11864                                   ovl.fmt.RS.d2);  goto ok;
   11865    case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11866                                   ovl.fmt.RS.d2);  goto ok;
   11867    case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11868                                   ovl.fmt.RS.d2);  goto ok;
   11869    case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11870                                   ovl.fmt.RS.d2);  goto ok;
   11871    case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11872                                   ovl.fmt.RS.d2);  goto ok;
   11873    case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11874                                   ovl.fmt.RS.d2);  goto ok;
   11875    case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
   11876                                   ovl.fmt.RS.d2);  goto ok;
   11877    case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11878                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11879    case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11880                                  ovl.fmt.SI.d1);  goto ok;
   11881    case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11882                                  ovl.fmt.SI.d1);  goto ok;
   11883    case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11884                                  ovl.fmt.SI.d1);  goto ok;
   11885    case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11886                                  ovl.fmt.SI.d1);  goto ok;
   11887    case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11888                                  ovl.fmt.SI.d1);  goto ok;
   11889    case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
   11890                                  ovl.fmt.SI.d1);  goto ok;
   11891    case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11892                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11893    case 0x99: /* TRACE */ goto unimplemented;
   11894    case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11895                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11896    case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11897                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11898    case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
   11899                                   ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
   11900                                   goto ok;
   11901    case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
   11902                                   ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
   11903                                   goto ok;
   11904    case 0xac: /* STNSM */ goto unimplemented;
   11905    case 0xad: /* STOSM */ goto unimplemented;
   11906    case 0xae: /* SIGP */ goto unimplemented;
   11907    case 0xaf: /* MC */ goto unimplemented;
   11908    case 0xb1: /* LRA */ goto unimplemented;
   11909    case 0xb6: /* STCTL */ goto unimplemented;
   11910    case 0xb7: /* LCTL */ goto unimplemented;
   11911    case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11912                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11913    case 0xbb: /* CDS */ goto unimplemented;
   11914    case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11915                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11916    case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11917                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11918    case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
   11919                                   ovl.fmt.RS.b2, ovl.fmt.RS.d2);  goto ok;
   11920    }
   11921 
   11922    return S390_DECODE_UNKNOWN_INSN;
   11923 
   11924 ok:
   11925    return S390_DECODE_OK;
   11926 
   11927 unimplemented:
   11928    return S390_DECODE_UNIMPLEMENTED_INSN;
   11929 }
   11930 
   11931 static s390_decode_t
   11932 s390_decode_6byte_and_irgen(UChar *bytes)
   11933 {
   11934    typedef union {
   11935       struct {
   11936          unsigned int op1 :  8;
   11937          unsigned int r1  :  4;
   11938          unsigned int r3  :  4;
   11939          unsigned int i2  : 16;
   11940          unsigned int     :  8;
   11941          unsigned int op2 :  8;
   11942       } RIE;
   11943       struct {
   11944          unsigned int op1 :  8;
   11945          unsigned int r1  :  4;
   11946          unsigned int r2  :  4;
   11947          unsigned int i3  :  8;
   11948          unsigned int i4  :  8;
   11949          unsigned int i5  :  8;
   11950          unsigned int op2 :  8;
   11951       } RIE_RRUUU;
   11952       struct {
   11953          unsigned int op1 :  8;
   11954          unsigned int r1  :  4;
   11955          unsigned int     :  4;
   11956          unsigned int i2  : 16;
   11957          unsigned int m3  :  4;
   11958          unsigned int     :  4;
   11959          unsigned int op2 :  8;
   11960       } RIEv1;
   11961       struct {
   11962          unsigned int op1 :  8;
   11963          unsigned int r1  :  4;
   11964          unsigned int r2  :  4;
   11965          unsigned int i4  : 16;
   11966          unsigned int m3  :  4;
   11967          unsigned int     :  4;
   11968          unsigned int op2 :  8;
   11969       } RIE_RRPU;
   11970       struct {
   11971          unsigned int op1 :  8;
   11972          unsigned int r1  :  4;
   11973          unsigned int m3  :  4;
   11974          unsigned int i4  : 16;
   11975          unsigned int i2  :  8;
   11976          unsigned int op2 :  8;
   11977       } RIEv3;
   11978       struct {
   11979          unsigned int op1 :  8;
   11980          unsigned int r1  :  4;
   11981          unsigned int op2 :  4;
   11982          unsigned int i2  : 32;
   11983       } RIL;
   11984       struct {
   11985          unsigned int op1 :  8;
   11986          unsigned int r1  :  4;
   11987          unsigned int m3  :  4;
   11988          unsigned int b4  :  4;
   11989          unsigned int d4  : 12;
   11990          unsigned int i2  :  8;
   11991          unsigned int op2 :  8;
   11992       } RIS;
   11993       struct {
   11994          unsigned int op1 :  8;
   11995          unsigned int r1  :  4;
   11996          unsigned int r2  :  4;
   11997          unsigned int b4  :  4;
   11998          unsigned int d4  : 12;
   11999          unsigned int m3  :  4;
   12000          unsigned int     :  4;
   12001          unsigned int op2 :  8;
   12002       } RRS;
   12003       struct {
   12004          unsigned int op1 :  8;
   12005          unsigned int l1  :  4;
   12006          unsigned int     :  4;
   12007          unsigned int b1  :  4;
   12008          unsigned int d1  : 12;
   12009          unsigned int     :  8;
   12010          unsigned int op2 :  8;
   12011       } RSL;
   12012       struct {
   12013          unsigned int op1 :  8;
   12014          unsigned int r1  :  4;
   12015          unsigned int r3  :  4;
   12016          unsigned int b2  :  4;
   12017          unsigned int dl2 : 12;
   12018          unsigned int dh2 :  8;
   12019          unsigned int op2 :  8;
   12020       } RSY;
   12021       struct {
   12022          unsigned int op1 :  8;
   12023          unsigned int r1  :  4;
   12024          unsigned int x2  :  4;
   12025          unsigned int b2  :  4;
   12026          unsigned int d2  : 12;
   12027          unsigned int     :  8;
   12028          unsigned int op2 :  8;
   12029       } RXE;
   12030       struct {
   12031          unsigned int op1 :  8;
   12032          unsigned int r3  :  4;
   12033          unsigned int x2  :  4;
   12034          unsigned int b2  :  4;
   12035          unsigned int d2  : 12;
   12036          unsigned int r1  :  4;
   12037          unsigned int     :  4;
   12038          unsigned int op2 :  8;
   12039       } RXF;
   12040       struct {
   12041          unsigned int op1 :  8;
   12042          unsigned int r1  :  4;
   12043          unsigned int x2  :  4;
   12044          unsigned int b2  :  4;
   12045          unsigned int dl2 : 12;
   12046          unsigned int dh2 :  8;
   12047          unsigned int op2 :  8;
   12048       } RXY;
   12049       struct {
   12050          unsigned int op1 :  8;
   12051          unsigned int i2  :  8;
   12052          unsigned int b1  :  4;
   12053          unsigned int dl1 : 12;
   12054          unsigned int dh1 :  8;
   12055          unsigned int op2 :  8;
   12056       } SIY;
   12057       struct {
   12058          unsigned int op :  8;
   12059          unsigned int l  :  8;
   12060          unsigned int b1 :  4;
   12061          unsigned int d1 : 12;
   12062          unsigned int b2 :  4;
   12063          unsigned int d2 : 12;
   12064       } SS;
   12065       struct {
   12066          unsigned int op :  8;
   12067          unsigned int l1 :  4;
   12068          unsigned int l2 :  4;
   12069          unsigned int b1 :  4;
   12070          unsigned int d1 : 12;
   12071          unsigned int b2 :  4;
   12072          unsigned int d2 : 12;
   12073       } SS_LLRDRD;
   12074       struct {
   12075          unsigned int op :  8;
   12076          unsigned int r1 :  4;
   12077          unsigned int r3 :  4;
   12078          unsigned int b2 :  4;
   12079          unsigned int d2 : 12;
   12080          unsigned int b4 :  4;
   12081          unsigned int d4 : 12;
   12082       } SS_RRRDRD2;
   12083       struct {
   12084          unsigned int op : 16;
   12085          unsigned int b1 :  4;
   12086          unsigned int d1 : 12;
   12087          unsigned int b2 :  4;
   12088          unsigned int d2 : 12;
   12089       } SSE;
   12090       struct {
   12091          unsigned int op1 :  8;
   12092          unsigned int r3  :  4;
   12093          unsigned int op2 :  4;
   12094          unsigned int b1  :  4;
   12095          unsigned int d1  : 12;
   12096          unsigned int b2  :  4;
   12097          unsigned int d2  : 12;
   12098       } SSF;
   12099       struct {
   12100          unsigned int op : 16;
   12101          unsigned int b1 :  4;
   12102          unsigned int d1 : 12;
   12103          unsigned int i2 : 16;
   12104       } SIL;
   12105    } formats;
   12106    union {
   12107       formats fmt;
   12108       ULong value;
   12109    } ovl;
   12110 
   12111    vassert(sizeof(formats) == 6);
   12112 
   12113    ((char *)(&ovl.value))[0] = bytes[0];
   12114    ((char *)(&ovl.value))[1] = bytes[1];
   12115    ((char *)(&ovl.value))[2] = bytes[2];
   12116    ((char *)(&ovl.value))[3] = bytes[3];
   12117    ((char *)(&ovl.value))[4] = bytes[4];
   12118    ((char *)(&ovl.value))[5] = bytes[5];
   12119    ((char *)(&ovl.value))[6] = 0x0;
   12120    ((char *)(&ovl.value))[7] = 0x0;
   12121 
   12122    switch ((ovl.value >> 16) & 0xff00000000ffULL) {
   12123    case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
   12124                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12125                                                 ovl.fmt.RXY.dl2,
   12126                                                 ovl.fmt.RXY.dh2);  goto ok;
   12127    case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
   12128    case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
   12129                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12130                                                 ovl.fmt.RXY.dl2,
   12131                                                 ovl.fmt.RXY.dh2);  goto ok;
   12132    case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
   12133                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12134                                                 ovl.fmt.RXY.dl2,
   12135                                                 ovl.fmt.RXY.dh2);  goto ok;
   12136    case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
   12137                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12138                                                 ovl.fmt.RXY.dl2,
   12139                                                 ovl.fmt.RXY.dh2);  goto ok;
   12140    case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
   12141                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12142                                                 ovl.fmt.RXY.dl2,
   12143                                                 ovl.fmt.RXY.dh2);  goto ok;
   12144    case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
   12145                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12146                                                 ovl.fmt.RXY.dl2,
   12147                                                 ovl.fmt.RXY.dh2);  goto ok;
   12148    case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
   12149                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12150                                                 ovl.fmt.RXY.dl2,
   12151                                                 ovl.fmt.RXY.dh2);  goto ok;
   12152    case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
   12153                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12154                                                 ovl.fmt.RXY.dl2,
   12155                                                 ovl.fmt.RXY.dh2);  goto ok;
   12156    case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
   12157                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12158                                                 ovl.fmt.RXY.dl2,
   12159                                                 ovl.fmt.RXY.dh2);  goto ok;
   12160    case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
   12161    case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
   12162                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12163                                                 ovl.fmt.RXY.dl2,
   12164                                                 ovl.fmt.RXY.dh2);  goto ok;
   12165    case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
   12166                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12167                                                 ovl.fmt.RXY.dl2,
   12168                                                 ovl.fmt.RXY.dh2);  goto ok;
   12169    case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
   12170    case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
   12171                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12172                                                 ovl.fmt.RXY.dl2,
   12173                                                 ovl.fmt.RXY.dh2);  goto ok;
   12174    case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
   12175                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12176                                                 ovl.fmt.RXY.dl2,
   12177                                                 ovl.fmt.RXY.dh2);  goto ok;
   12178    case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
   12179                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12180                                                 ovl.fmt.RXY.dl2,
   12181                                                 ovl.fmt.RXY.dh2);  goto ok;
   12182    case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
   12183                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12184                                                 ovl.fmt.RXY.dl2,
   12185                                                 ovl.fmt.RXY.dh2);  goto ok;
   12186    case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
   12187                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12188                                                 ovl.fmt.RXY.dl2,
   12189                                                 ovl.fmt.RXY.dh2);  goto ok;
   12190    case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
   12191                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12192                                                 ovl.fmt.RXY.dl2,
   12193                                                 ovl.fmt.RXY.dh2);  goto ok;
   12194    case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
   12195                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12196                                                 ovl.fmt.RXY.dl2,
   12197                                                 ovl.fmt.RXY.dh2);  goto ok;
   12198    case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
   12199                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12200                                                 ovl.fmt.RXY.dl2,
   12201                                                 ovl.fmt.RXY.dh2);  goto ok;
   12202    case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
   12203                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12204                                                 ovl.fmt.RXY.dl2,
   12205                                                 ovl.fmt.RXY.dh2);  goto ok;
   12206    case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
   12207                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12208                                                 ovl.fmt.RXY.dl2,
   12209                                                 ovl.fmt.RXY.dh2);  goto ok;
   12210    case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
   12211                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12212                                                 ovl.fmt.RXY.dl2,
   12213                                                 ovl.fmt.RXY.dh2);  goto ok;
   12214    case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
   12215                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12216                                                 ovl.fmt.RXY.dl2,
   12217                                                 ovl.fmt.RXY.dh2);  goto ok;
   12218    case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
   12219                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12220                                                 ovl.fmt.RXY.dl2,
   12221                                                 ovl.fmt.RXY.dh2);  goto ok;
   12222    case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
   12223                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12224                                                 ovl.fmt.RXY.dl2,
   12225                                                 ovl.fmt.RXY.dh2);  goto ok;
   12226    case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
   12227                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12228                                                 ovl.fmt.RXY.dl2,
   12229                                                 ovl.fmt.RXY.dh2);  goto ok;
   12230    case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
   12231                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12232                                                 ovl.fmt.RXY.dl2,
   12233                                                 ovl.fmt.RXY.dh2);  goto ok;
   12234    case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
   12235    case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
   12236                                                 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
   12237                                                 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
   12238                                                 ovl.fmt.RXY.dh2);  goto ok;
   12239    case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
   12240                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12241                                                 ovl.fmt.RXY.dl2,
   12242                                                 ovl.fmt.RXY.dh2);  goto ok;
   12243    case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
   12244                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12245                                                 ovl.fmt.RXY.dl2,
   12246                                                 ovl.fmt.RXY.dh2);  goto ok;
   12247    case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
   12248                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12249                                                 ovl.fmt.RXY.dl2,
   12250                                                 ovl.fmt.RXY.dh2);  goto ok;
   12251    case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
   12252                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12253                                                 ovl.fmt.RXY.dl2,
   12254                                                 ovl.fmt.RXY.dh2);  goto ok;
   12255    case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
   12256                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12257                                                 ovl.fmt.RXY.dl2,
   12258                                                 ovl.fmt.RXY.dh2);  goto ok;
   12259    case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
   12260                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12261                                                 ovl.fmt.RXY.dl2,
   12262                                                 ovl.fmt.RXY.dh2);  goto ok;
   12263    case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
   12264                                                 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
   12265                                                 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
   12266                                                 ovl.fmt.RXY.dh2);  goto ok;
   12267    case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
   12268                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12269                                                 ovl.fmt.RXY.dl2,
   12270                                                 ovl.fmt.RXY.dh2);  goto ok;
   12271    case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
   12272                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12273                                                 ovl.fmt.RXY.dl2,
   12274                                                 ovl.fmt.RXY.dh2);  goto ok;
   12275    case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
   12276                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12277                                                 ovl.fmt.RXY.dl2,
   12278                                                 ovl.fmt.RXY.dh2);  goto ok;
   12279    case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
   12280                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12281                                                 ovl.fmt.RXY.dl2,
   12282                                                 ovl.fmt.RXY.dh2);  goto ok;
   12283    case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
   12284                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12285                                                 ovl.fmt.RXY.dl2,
   12286                                                 ovl.fmt.RXY.dh2);  goto ok;
   12287    case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
   12288                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12289                                                 ovl.fmt.RXY.dl2,
   12290                                                 ovl.fmt.RXY.dh2);  goto ok;
   12291    case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
   12292                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12293                                                 ovl.fmt.RXY.dl2,
   12294                                                 ovl.fmt.RXY.dh2);  goto ok;
   12295    case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
   12296                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12297                                                 ovl.fmt.RXY.dl2,
   12298                                                 ovl.fmt.RXY.dh2);  goto ok;
   12299    case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
   12300                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12301                                                 ovl.fmt.RXY.dl2,
   12302                                                 ovl.fmt.RXY.dh2);  goto ok;
   12303    case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
   12304                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12305                                                 ovl.fmt.RXY.dl2,
   12306                                                 ovl.fmt.RXY.dh2);  goto ok;
   12307    case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
   12308                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12309                                                 ovl.fmt.RXY.dl2,
   12310                                                 ovl.fmt.RXY.dh2);  goto ok;
   12311    case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
   12312                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12313                                                 ovl.fmt.RXY.dl2,
   12314                                                 ovl.fmt.RXY.dh2);  goto ok;
   12315    case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
   12316                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12317                                                 ovl.fmt.RXY.dl2,
   12318                                                 ovl.fmt.RXY.dh2);  goto ok;
   12319    case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
   12320                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12321                                                 ovl.fmt.RXY.dl2,
   12322                                                 ovl.fmt.RXY.dh2);  goto ok;
   12323    case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
   12324                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12325                                                 ovl.fmt.RXY.dl2,
   12326                                                 ovl.fmt.RXY.dh2);  goto ok;
   12327    case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
   12328                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12329                                                 ovl.fmt.RXY.dl2,
   12330                                                 ovl.fmt.RXY.dh2);  goto ok;
   12331    case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
   12332                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12333                                                 ovl.fmt.RXY.dl2,
   12334                                                 ovl.fmt.RXY.dh2);  goto ok;
   12335    case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
   12336                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12337                                                 ovl.fmt.RXY.dl2,
   12338                                                 ovl.fmt.RXY.dh2);  goto ok;
   12339    case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
   12340                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12341                                                 ovl.fmt.RXY.dl2,
   12342                                                 ovl.fmt.RXY.dh2);  goto ok;
   12343    case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
   12344                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12345                                                 ovl.fmt.RXY.dl2,
   12346                                                 ovl.fmt.RXY.dh2);  goto ok;
   12347    case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
   12348                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12349                                                 ovl.fmt.RXY.dl2,
   12350                                                 ovl.fmt.RXY.dh2);  goto ok;
   12351    case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
   12352                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12353                                                 ovl.fmt.RXY.dl2,
   12354                                                 ovl.fmt.RXY.dh2);  goto ok;
   12355    case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
   12356                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12357                                                 ovl.fmt.RXY.dl2,
   12358                                                 ovl.fmt.RXY.dh2);  goto ok;
   12359    case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
   12360                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12361                                                 ovl.fmt.RXY.dl2,
   12362                                                 ovl.fmt.RXY.dh2);  goto ok;
   12363    case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
   12364                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12365                                                 ovl.fmt.RXY.dl2,
   12366                                                 ovl.fmt.RXY.dh2);  goto ok;
   12367    case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
   12368                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12369                                                 ovl.fmt.RXY.dl2,
   12370                                                 ovl.fmt.RXY.dh2);  goto ok;
   12371    case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
   12372                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12373                                                 ovl.fmt.RXY.dl2,
   12374                                                 ovl.fmt.RXY.dh2);  goto ok;
   12375    case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
   12376                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12377                                                 ovl.fmt.RXY.dl2,
   12378                                                 ovl.fmt.RXY.dh2);  goto ok;
   12379    case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
   12380                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12381                                                 ovl.fmt.RXY.dl2,
   12382                                                 ovl.fmt.RXY.dh2);  goto ok;
   12383    case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
   12384                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12385                                                 ovl.fmt.RXY.dl2,
   12386                                                 ovl.fmt.RXY.dh2);  goto ok;
   12387    case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
   12388                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12389                                                 ovl.fmt.RXY.dl2,
   12390                                                 ovl.fmt.RXY.dh2);  goto ok;
   12391    case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
   12392                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12393                                                 ovl.fmt.RXY.dl2,
   12394                                                 ovl.fmt.RXY.dh2);  goto ok;
   12395    case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
   12396                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12397                                                 ovl.fmt.RXY.dl2,
   12398                                                 ovl.fmt.RXY.dh2);  goto ok;
   12399    case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
   12400                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12401                                                 ovl.fmt.RXY.dl2,
   12402                                                 ovl.fmt.RXY.dh2);  goto ok;
   12403    case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
   12404                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12405                                                 ovl.fmt.RXY.dl2,
   12406                                                 ovl.fmt.RXY.dh2);  goto ok;
   12407    case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
   12408                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12409                                                 ovl.fmt.RXY.dl2,
   12410                                                 ovl.fmt.RXY.dh2);  goto ok;
   12411    case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
   12412                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12413                                                 ovl.fmt.RXY.dl2,
   12414                                                 ovl.fmt.RXY.dh2);  goto ok;
   12415    case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
   12416                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12417                                                 ovl.fmt.RXY.dl2,
   12418                                                 ovl.fmt.RXY.dh2);  goto ok;
   12419    case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
   12420                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12421                                                 ovl.fmt.RXY.dl2,
   12422                                                 ovl.fmt.RXY.dh2);  goto ok;
   12423    case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
   12424                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12425                                                 ovl.fmt.RXY.dl2,
   12426                                                 ovl.fmt.RXY.dh2);  goto ok;
   12427    case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
   12428                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12429                                                 ovl.fmt.RXY.dl2,
   12430                                                 ovl.fmt.RXY.dh2);  goto ok;
   12431    case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
   12432                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12433                                                 ovl.fmt.RXY.dl2,
   12434                                                 ovl.fmt.RXY.dh2);  goto ok;
   12435    case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
   12436                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12437                                                 ovl.fmt.RXY.dl2,
   12438                                                 ovl.fmt.RXY.dh2);  goto ok;
   12439    case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
   12440                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12441                                                 ovl.fmt.RXY.dl2,
   12442                                                 ovl.fmt.RXY.dh2);  goto ok;
   12443    case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
   12444                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12445                                                 ovl.fmt.RXY.dl2,
   12446                                                 ovl.fmt.RXY.dh2);  goto ok;
   12447    case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
   12448                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12449                                                 ovl.fmt.RXY.dl2,
   12450                                                 ovl.fmt.RXY.dh2);  goto ok;
   12451    case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
   12452                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12453                                                 ovl.fmt.RXY.dl2,
   12454                                                 ovl.fmt.RXY.dh2);  goto ok;
   12455    case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
   12456                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12457                                                 ovl.fmt.RXY.dl2,
   12458                                                 ovl.fmt.RXY.dh2);  goto ok;
   12459    case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
   12460                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12461                                                 ovl.fmt.RXY.dl2,
   12462                                                 ovl.fmt.RXY.dh2);  goto ok;
   12463    case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
   12464                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12465                                                 ovl.fmt.RXY.dl2,
   12466                                                 ovl.fmt.RXY.dh2);  goto ok;
   12467    case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
   12468                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12469                                                 ovl.fmt.RXY.dl2,
   12470                                                 ovl.fmt.RXY.dh2);  goto ok;
   12471    case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
   12472                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12473                                                 ovl.fmt.RXY.dl2,
   12474                                                 ovl.fmt.RXY.dh2);  goto ok;
   12475    case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
   12476                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12477                                                 ovl.fmt.RXY.dl2,
   12478                                                 ovl.fmt.RXY.dh2);  goto ok;
   12479    case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
   12480                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12481                                                 ovl.fmt.RSY.dl2,
   12482                                                 ovl.fmt.RSY.dh2);  goto ok;
   12483    case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
   12484                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12485                                                 ovl.fmt.RSY.dl2,
   12486                                                 ovl.fmt.RSY.dh2);  goto ok;
   12487    case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
   12488                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12489                                                 ovl.fmt.RSY.dl2,
   12490                                                 ovl.fmt.RSY.dh2);  goto ok;
   12491    case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
   12492                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12493                                                 ovl.fmt.RSY.dl2,
   12494                                                 ovl.fmt.RSY.dh2);  goto ok;
   12495    case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
   12496                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12497                                                 ovl.fmt.RSY.dl2,
   12498                                                 ovl.fmt.RSY.dh2);  goto ok;
   12499    case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
   12500    case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
   12501                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12502                                                 ovl.fmt.RSY.dl2,
   12503                                                 ovl.fmt.RSY.dh2);  goto ok;
   12504    case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
   12505                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12506                                                 ovl.fmt.RSY.dl2,
   12507                                                 ovl.fmt.RSY.dh2);  goto ok;
   12508    case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
   12509                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12510                                                 ovl.fmt.RSY.dl2,
   12511                                                 ovl.fmt.RSY.dh2);  goto ok;
   12512    case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
   12513                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12514                                                 ovl.fmt.RSY.dl2,
   12515                                                 ovl.fmt.RSY.dh2);  goto ok;
   12516    case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
   12517                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12518                                                 ovl.fmt.RSY.dl2,
   12519                                                 ovl.fmt.RSY.dh2);  goto ok;
   12520    case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
   12521                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12522                                                 ovl.fmt.RSY.dl2,
   12523                                                 ovl.fmt.RSY.dh2);  goto ok;
   12524    case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
   12525    case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
   12526                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12527                                                 ovl.fmt.RSY.dl2,
   12528                                                 ovl.fmt.RSY.dh2);  goto ok;
   12529    case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
   12530                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12531                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12532                                                 ovl.fmt.RSY.dh2);  goto ok;
   12533    case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
   12534                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12535                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12536                                                 ovl.fmt.RSY.dh2);  goto ok;
   12537    case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
   12538    case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
   12539                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12540                                                 ovl.fmt.RSY.dl2,
   12541                                                 ovl.fmt.RSY.dh2);  goto ok;
   12542    case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
   12543    case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
   12544    case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
   12545                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12546                                                 ovl.fmt.RSY.dl2,
   12547                                                 ovl.fmt.RSY.dh2);  goto ok;
   12548    case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
   12549                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12550                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12551                                                 ovl.fmt.RSY.dh2);  goto ok;
   12552    case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
   12553    case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
   12554                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12555                                                ovl.fmt.SIY.dh1);  goto ok;
   12556    case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
   12557                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12558                                                ovl.fmt.SIY.dh1);  goto ok;
   12559    case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
   12560                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12561                                                ovl.fmt.SIY.dh1);  goto ok;
   12562    case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
   12563                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12564                                                ovl.fmt.SIY.dh1);  goto ok;
   12565    case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
   12566                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12567                                                ovl.fmt.SIY.dh1);  goto ok;
   12568    case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
   12569                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12570                                                ovl.fmt.SIY.dh1);  goto ok;
   12571    case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
   12572                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12573                                                ovl.fmt.SIY.dh1);  goto ok;
   12574    case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
   12575                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12576                                                ovl.fmt.SIY.dh1);  goto ok;
   12577    case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
   12578                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12579                                                ovl.fmt.SIY.dh1);  goto ok;
   12580    case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
   12581                                                ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
   12582                                                ovl.fmt.SIY.dh1);  goto ok;
   12583    case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
   12584                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12585                                                 ovl.fmt.RSY.dl2,
   12586                                                 ovl.fmt.RSY.dh2);  goto ok;
   12587    case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
   12588                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12589                                                 ovl.fmt.RSY.dl2,
   12590                                                 ovl.fmt.RSY.dh2);  goto ok;
   12591    case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
   12592    case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
   12593    case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
   12594                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12595                                                 ovl.fmt.RSY.dl2,
   12596                                                 ovl.fmt.RSY.dh2);  goto ok;
   12597    case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
   12598                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12599                                                 ovl.fmt.RSY.dl2,
   12600                                                 ovl.fmt.RSY.dh2);  goto ok;
   12601    case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
   12602                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12603                                                 ovl.fmt.RSY.dl2,
   12604                                                 ovl.fmt.RSY.dh2);  goto ok;
   12605    case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
   12606                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12607                                                 ovl.fmt.RSY.dl2,
   12608                                                 ovl.fmt.RSY.dh2);  goto ok;
   12609    case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
   12610                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12611                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12612                                                 ovl.fmt.RSY.dh2);  goto ok;
   12613    case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
   12614    case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
   12615                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12616                                                 ovl.fmt.RSY.dl2,
   12617                                                 ovl.fmt.RSY.dh2);  goto ok;
   12618    case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
   12619                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12620                                                 ovl.fmt.RSY.dl2,
   12621                                                 ovl.fmt.RSY.dh2);  goto ok;
   12622    case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
   12623                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12624                                                 ovl.fmt.RSY.dl2,
   12625                                                 ovl.fmt.RSY.dh2);  goto ok;
   12626    case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
   12627                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12628                                                 ovl.fmt.RSY.dl2,
   12629                                                 ovl.fmt.RSY.dh2);  goto ok;
   12630    case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
   12631                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12632                                                 ovl.fmt.RSY.dl2,
   12633                                                 ovl.fmt.RSY.dh2,
   12634                                                 S390_XMNM_LOCG);  goto ok;
   12635    case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
   12636                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12637                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12638                                                 ovl.fmt.RSY.dh2,
   12639                                                 S390_XMNM_STOCG);  goto ok;
   12640    case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
   12641                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12642                                                 ovl.fmt.RSY.dl2,
   12643                                                 ovl.fmt.RSY.dh2);  goto ok;
   12644    case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
   12645                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12646                                                 ovl.fmt.RSY.dl2,
   12647                                                 ovl.fmt.RSY.dh2);  goto ok;
   12648    case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
   12649                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12650                                                 ovl.fmt.RSY.dl2,
   12651                                                 ovl.fmt.RSY.dh2);  goto ok;
   12652    case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
   12653                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12654                                                 ovl.fmt.RSY.dl2,
   12655                                                 ovl.fmt.RSY.dh2);  goto ok;
   12656    case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
   12657                                                 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
   12658                                                 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
   12659                                                 ovl.fmt.RSY.dh2);  goto ok;
   12660    case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
   12661                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12662                                                 ovl.fmt.RSY.dl2,
   12663                                                 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
   12664                                                 goto ok;
   12665    case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
   12666                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12667                                                 ovl.fmt.RSY.dl2,
   12668                                                 ovl.fmt.RSY.dh2,
   12669                                                 S390_XMNM_STOC);  goto ok;
   12670    case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
   12671                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12672                                                 ovl.fmt.RSY.dl2,
   12673                                                 ovl.fmt.RSY.dh2);  goto ok;
   12674    case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
   12675                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12676                                                 ovl.fmt.RSY.dl2,
   12677                                                 ovl.fmt.RSY.dh2);  goto ok;
   12678    case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
   12679                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12680                                                 ovl.fmt.RSY.dl2,
   12681                                                 ovl.fmt.RSY.dh2);  goto ok;
   12682    case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
   12683                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12684                                                 ovl.fmt.RSY.dl2,
   12685                                                 ovl.fmt.RSY.dh2);  goto ok;
   12686    case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
   12687                                                 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
   12688                                                 ovl.fmt.RSY.dl2,
   12689                                                 ovl.fmt.RSY.dh2);  goto ok;
   12690    case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
   12691                                                ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
   12692                                                goto ok;
   12693    case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
   12694                                                ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
   12695                                                goto ok;
   12696    case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
   12697    case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
   12698                                                  ovl.fmt.RIE_RRUUU.r1,
   12699                                                  ovl.fmt.RIE_RRUUU.r2,
   12700                                                  ovl.fmt.RIE_RRUUU.i3,
   12701                                                  ovl.fmt.RIE_RRUUU.i4,
   12702                                                  ovl.fmt.RIE_RRUUU.i5);
   12703                                                  goto ok;
   12704    case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
   12705                                                  ovl.fmt.RIE_RRUUU.r1,
   12706                                                  ovl.fmt.RIE_RRUUU.r2,
   12707                                                  ovl.fmt.RIE_RRUUU.i3,
   12708                                                  ovl.fmt.RIE_RRUUU.i4,
   12709                                                  ovl.fmt.RIE_RRUUU.i5);
   12710                                                  goto ok;
   12711    case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
   12712                                                  ovl.fmt.RIE_RRUUU.r1,
   12713                                                  ovl.fmt.RIE_RRUUU.r2,
   12714                                                  ovl.fmt.RIE_RRUUU.i3,
   12715                                                  ovl.fmt.RIE_RRUUU.i4,
   12716                                                  ovl.fmt.RIE_RRUUU.i5);
   12717                                                  goto ok;
   12718    case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
   12719                                                  ovl.fmt.RIE_RRUUU.r1,
   12720                                                  ovl.fmt.RIE_RRUUU.r2,
   12721                                                  ovl.fmt.RIE_RRUUU.i3,
   12722                                                  ovl.fmt.RIE_RRUUU.i4,
   12723                                                  ovl.fmt.RIE_RRUUU.i5);
   12724                                                  goto ok;
   12725    case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
   12726    case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
   12727                                                 ovl.fmt.RIE_RRPU.r1,
   12728                                                 ovl.fmt.RIE_RRPU.r2,
   12729                                                 ovl.fmt.RIE_RRPU.i4,
   12730                                                 ovl.fmt.RIE_RRPU.m3);  goto ok;
   12731    case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
   12732                                                 ovl.fmt.RIE_RRPU.r1,
   12733                                                 ovl.fmt.RIE_RRPU.r2,
   12734                                                 ovl.fmt.RIE_RRPU.i4,
   12735                                                 ovl.fmt.RIE_RRPU.m3);  goto ok;
   12736    case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
   12737    case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
   12738    case 0xec0000000072ULL: /* CIT */ goto unimplemented;
   12739    case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
   12740    case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
   12741                                                 ovl.fmt.RIE_RRPU.r1,
   12742                                                 ovl.fmt.RIE_RRPU.r2,
   12743                                                 ovl.fmt.RIE_RRPU.i4,
   12744                                                 ovl.fmt.RIE_RRPU.m3);  goto ok;
   12745    case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
   12746                                                 ovl.fmt.RIE_RRPU.r1,
   12747                                                 ovl.fmt.RIE_RRPU.r2,
   12748                                                 ovl.fmt.RIE_RRPU.i4,
   12749                                                 ovl.fmt.RIE_RRPU.m3);  goto ok;
   12750    case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
   12751                                                 ovl.fmt.RIEv3.r1,
   12752                                                 ovl.fmt.RIEv3.m3,
   12753                                                 ovl.fmt.RIEv3.i4,
   12754                                                 ovl.fmt.RIEv3.i2);  goto ok;
   12755    case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
   12756                                                 ovl.fmt.RIEv3.r1,
   12757                                                 ovl.fmt.RIEv3.m3,
   12758                                                 ovl.fmt.RIEv3.i4,
   12759                                                 ovl.fmt.RIEv3.i2);  goto ok;
   12760    case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
   12761                                                 ovl.fmt.RIEv3.r1,
   12762                                                 ovl.fmt.RIEv3.m3,
   12763                                                 ovl.fmt.RIEv3.i4,
   12764                                                 ovl.fmt.RIEv3.i2);  goto ok;
   12765    case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
   12766                                                 ovl.fmt.RIEv3.r1,
   12767                                                 ovl.fmt.RIEv3.m3,
   12768                                                 ovl.fmt.RIEv3.i4,
   12769                                                 ovl.fmt.RIEv3.i2);  goto ok;
   12770    case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
   12771                                                 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
   12772                                                 goto ok;
   12773    case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
   12774                                                 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
   12775                                                 ovl.fmt.RIE.i2);  goto ok;
   12776    case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
   12777                                                 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
   12778                                                 ovl.fmt.RIE.i2);  goto ok;
   12779    case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
   12780                                                 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
   12781                                                 ovl.fmt.RIE.i2);  goto ok;
   12782    case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
   12783                                            ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
   12784                                            ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
   12785                                            goto ok;
   12786    case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
   12787                                            ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
   12788                                            ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
   12789                                            goto ok;
   12790    case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
   12791                                            ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
   12792                                            ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
   12793                                            goto ok;
   12794    case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
   12795                                            ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
   12796                                            ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
   12797                                            goto ok;
   12798    case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
   12799                                                  ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
   12800                                                  ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
   12801                                                  ovl.fmt.RIS.i2);  goto ok;
   12802    case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
   12803                                                  ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
   12804                                                  ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
   12805                                                  ovl.fmt.RIS.i2);  goto ok;
   12806    case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
   12807                                                  ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
   12808                                                  ovl.fmt.RIS.d4,
   12809                                                  ovl.fmt.RIS.i2);  goto ok;
   12810    case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
   12811                                                  ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
   12812                                                  ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
   12813                                                  ovl.fmt.RIS.i2);  goto ok;
   12814    case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
   12815                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12816                                                 ovl.fmt.RXE.d2);  goto ok;
   12817    case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
   12818                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12819                                                 ovl.fmt.RXE.d2);  goto ok;
   12820    case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
   12821                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12822                                                 ovl.fmt.RXE.d2);  goto ok;
   12823    case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
   12824    case 0xed0000000008ULL: /* KEB */ goto unimplemented;
   12825    case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
   12826                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12827                                                 ovl.fmt.RXE.d2);  goto ok;
   12828    case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
   12829                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12830                                                 ovl.fmt.RXE.d2);  goto ok;
   12831    case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
   12832                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12833                                                 ovl.fmt.RXE.d2);  goto ok;
   12834    case 0xed000000000cULL: /* MDEB */ goto unimplemented;
   12835    case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
   12836                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12837                                                 ovl.fmt.RXE.d2);  goto ok;
   12838    case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
   12839                                                  ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
   12840                                                  ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
   12841                                                  ovl.fmt.RXF.r1);  goto ok;
   12842    case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
   12843                                                  ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
   12844                                                  ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
   12845                                                  ovl.fmt.RXF.r1);  goto ok;
   12846    case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
   12847                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12848                                                 ovl.fmt.RXE.d2);  goto ok;
   12849    case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
   12850                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12851                                                 ovl.fmt.RXE.d2);  goto ok;
   12852    case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
   12853                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12854                                                 ovl.fmt.RXE.d2);  goto ok;
   12855    case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
   12856                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12857                                                 ovl.fmt.RXE.d2);  goto ok;
   12858    case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
   12859                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12860                                                 ovl.fmt.RXE.d2);  goto ok;
   12861    case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
   12862                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12863                                                 ovl.fmt.RXE.d2);  goto ok;
   12864    case 0xed0000000018ULL: /* KDB */ goto unimplemented;
   12865    case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
   12866                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12867                                                 ovl.fmt.RXE.d2);  goto ok;
   12868    case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
   12869                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12870                                                 ovl.fmt.RXE.d2);  goto ok;
   12871    case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
   12872                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12873                                                 ovl.fmt.RXE.d2);  goto ok;
   12874    case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
   12875                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12876                                                 ovl.fmt.RXE.d2);  goto ok;
   12877    case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
   12878                                                 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
   12879                                                 ovl.fmt.RXE.d2);  goto ok;
   12880    case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
   12881                                                  ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
   12882                                                  ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
   12883                                                  ovl.fmt.RXF.r1);  goto ok;
   12884    case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
   12885                                                  ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
   12886                                                  ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
   12887                                                  ovl.fmt.RXF.r1);  goto ok;
   12888    case 0xed0000000024ULL: /* LDE */ goto unimplemented;
   12889    case 0xed0000000025ULL: /* LXD */ goto unimplemented;
   12890    case 0xed0000000026ULL: /* LXE */ goto unimplemented;
   12891    case 0xed000000002eULL: /* MAE */ goto unimplemented;
   12892    case 0xed000000002fULL: /* MSE */ goto unimplemented;
   12893    case 0xed0000000034ULL: /* SQE */ goto unimplemented;
   12894    case 0xed0000000035ULL: /* SQD */ goto unimplemented;
   12895    case 0xed0000000037ULL: /* MEE */ goto unimplemented;
   12896    case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
   12897    case 0xed0000000039ULL: /* MYL */ goto unimplemented;
   12898    case 0xed000000003aULL: /* MAY */ goto unimplemented;
   12899    case 0xed000000003bULL: /* MY */ goto unimplemented;
   12900    case 0xed000000003cULL: /* MAYH */ goto unimplemented;
   12901    case 0xed000000003dULL: /* MYH */ goto unimplemented;
   12902    case 0xed000000003eULL: /* MAD */ goto unimplemented;
   12903    case 0xed000000003fULL: /* MSD */ goto unimplemented;
   12904    case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
   12905    case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
   12906    case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
   12907    case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
   12908    case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
   12909    case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
   12910    case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
   12911    case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
   12912    case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
   12913    case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
   12914    case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
   12915                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12916                                                 ovl.fmt.RXY.dl2,
   12917                                                 ovl.fmt.RXY.dh2);  goto ok;
   12918    case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
   12919                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12920                                                 ovl.fmt.RXY.dl2,
   12921                                                 ovl.fmt.RXY.dh2);  goto ok;
   12922    case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
   12923                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12924                                                 ovl.fmt.RXY.dl2,
   12925                                                 ovl.fmt.RXY.dh2);  goto ok;
   12926    case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
   12927                                                 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
   12928                                                 ovl.fmt.RXY.dl2,
   12929                                                 ovl.fmt.RXY.dh2);  goto ok;
   12930    }
   12931 
   12932    switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
   12933    case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
   12934                                       ovl.fmt.RIL.i2);  goto ok;
   12935    case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
   12936                                       ovl.fmt.RIL.i2);  goto ok;
   12937    case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
   12938                                    ovl.fmt.RIL.i2);  goto ok;
   12939    case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
   12940                                       ovl.fmt.RIL.i2);  goto ok;
   12941    case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
   12942                                       ovl.fmt.RIL.i2);  goto ok;
   12943    case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
   12944                                       ovl.fmt.RIL.i2);  goto ok;
   12945    case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
   12946                                       ovl.fmt.RIL.i2);  goto ok;
   12947    case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
   12948                                       ovl.fmt.RIL.i2);  goto ok;
   12949    case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
   12950                                       ovl.fmt.RIL.i2);  goto ok;
   12951    case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
   12952                                       ovl.fmt.RIL.i2);  goto ok;
   12953    case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
   12954                                       ovl.fmt.RIL.i2);  goto ok;
   12955    case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
   12956                                       ovl.fmt.RIL.i2);  goto ok;
   12957    case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
   12958                                       ovl.fmt.RIL.i2);  goto ok;
   12959    case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
   12960                                       ovl.fmt.RIL.i2);  goto ok;
   12961    case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
   12962                                       ovl.fmt.RIL.i2);  goto ok;
   12963    case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
   12964                                       ovl.fmt.RIL.i2);  goto ok;
   12965    case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
   12966                                       ovl.fmt.RIL.i2);  goto ok;
   12967    case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
   12968                                       ovl.fmt.RIL.i2);  goto ok;
   12969    case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
   12970                                       ovl.fmt.RIL.i2);  goto ok;
   12971    case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
   12972                                       ovl.fmt.RIL.i2);  goto ok;
   12973    case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
   12974                                       ovl.fmt.RIL.i2);  goto ok;
   12975    case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
   12976                                       ovl.fmt.RIL.i2);  goto ok;
   12977    case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
   12978                                       ovl.fmt.RIL.i2);  goto ok;
   12979    case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
   12980                                       ovl.fmt.RIL.i2);  goto ok;
   12981    case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
   12982                                       ovl.fmt.RIL.i2);  goto ok;
   12983    case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
   12984                                       ovl.fmt.RIL.i2);  goto ok;
   12985    case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
   12986                                       ovl.fmt.RIL.i2);  goto ok;
   12987    case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
   12988                                       ovl.fmt.RIL.i2);  goto ok;
   12989    case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
   12990                                       ovl.fmt.RIL.i2);  goto ok;
   12991    case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
   12992                                       ovl.fmt.RIL.i2);  goto ok;
   12993    case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
   12994                                       ovl.fmt.RIL.i2);  goto ok;
   12995    case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
   12996                                       ovl.fmt.RIL.i2);  goto ok;
   12997    case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
   12998                                       ovl.fmt.RIL.i2);  goto ok;
   12999    case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
   13000                                       ovl.fmt.RIL.i2);  goto ok;
   13001    case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
   13002                                       ovl.fmt.RIL.i2);  goto ok;
   13003    case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
   13004                                       ovl.fmt.RIL.i2);  goto ok;
   13005    case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
   13006                                       ovl.fmt.RIL.i2);  goto ok;
   13007    case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
   13008                                       ovl.fmt.RIL.i2);  goto ok;
   13009    case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
   13010                                       ovl.fmt.RIL.i2);  goto ok;
   13011    case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
   13012                                       ovl.fmt.RIL.i2);  goto ok;
   13013    case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
   13014                                       ovl.fmt.RIL.i2);  goto ok;
   13015    case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
   13016                                       ovl.fmt.RIL.i2);  goto ok;
   13017    case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
   13018                                       ovl.fmt.RIL.i2);  goto ok;
   13019    case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
   13020                                       ovl.fmt.RIL.i2);  goto ok;
   13021    case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
   13022                                       ovl.fmt.RIL.i2);  goto ok;
   13023    case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
   13024                                       ovl.fmt.RIL.i2);  goto ok;
   13025    case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
   13026                                       ovl.fmt.RIL.i2);  goto ok;
   13027    case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
   13028                                       ovl.fmt.RIL.i2);  goto ok;
   13029    case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
   13030                                       ovl.fmt.RIL.i2);  goto ok;
   13031    case 0xc800ULL: /* MVCOS */ goto unimplemented;
   13032    case 0xc801ULL: /* ECTG */ goto unimplemented;
   13033    case 0xc802ULL: /* CSST */ goto unimplemented;
   13034    case 0xc804ULL: /* LPD */ goto unimplemented;
   13035    case 0xc805ULL: /* LPDG */ goto unimplemented;
   13036    case 0xcc06ULL: /* BRCTH */ goto unimplemented;
   13037    case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
   13038                                       ovl.fmt.RIL.i2);  goto ok;
   13039    case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
   13040                                       ovl.fmt.RIL.i2);  goto ok;
   13041    case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
   13042                                       ovl.fmt.RIL.i2);  goto ok;
   13043    case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
   13044                                       ovl.fmt.RIL.i2);  goto ok;
   13045    case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
   13046                                       ovl.fmt.RIL.i2);  goto ok;
   13047    }
   13048 
   13049    switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
   13050    case 0xd0ULL: /* TRTR */ goto unimplemented;
   13051    case 0xd1ULL: /* MVN */ goto unimplemented;
   13052    case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
   13053                                        ovl.fmt.SS.b1, ovl.fmt.SS.d1,
   13054                                        ovl.fmt.SS.b2, ovl.fmt.SS.d2);  goto ok;
   13055    case 0xd3ULL: /* MVZ */ goto unimplemented;
   13056    case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
   13057                                        ovl.fmt.SS.b1, ovl.fmt.SS.d1,
   13058                                        ovl.fmt.SS.b2, ovl.fmt.SS.d2);  goto ok;
   13059    case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
   13060                                        ovl.fmt.SS.b1, ovl.fmt.SS.d1,
   13061                                        ovl.fmt.SS.b2, ovl.fmt.SS.d2);  goto ok;
   13062    case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
   13063                                        ovl.fmt.SS.b1, ovl.fmt.SS.d1,
   13064                                        ovl.fmt.SS.b2, ovl.fmt.SS.d2);  goto ok;
   13065    case 0xd7ULL:
   13066       if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
   13067          s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
   13068       else
   13069         s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
   13070                               ovl.fmt.SS.b1, ovl.fmt.SS.d1,
   13071                               ovl.fmt.SS.b2, ovl.fmt.SS.d2);
   13072       goto ok;
   13073    case 0xd9ULL: /* MVCK */ goto unimplemented;
   13074    case 0xdaULL: /* MVCP */ goto unimplemented;
   13075    case 0xdbULL: /* MVCS */ goto unimplemented;
   13076    case 0xdcULL: /* TR */ goto unimplemented;
   13077    case 0xddULL: /* TRT */ goto unimplemented;
   13078    case 0xdeULL: /* ED */ goto unimplemented;
   13079    case 0xdfULL: /* EDMK */ goto unimplemented;
   13080    case 0xe1ULL: /* PKU */ goto unimplemented;
   13081    case 0xe2ULL: /* UNPKU */ goto unimplemented;
   13082    case 0xe8ULL: /* MVCIN */ goto unimplemented;
   13083    case 0xe9ULL: /* PKA */ goto unimplemented;
   13084    case 0xeaULL: /* UNPKA */ goto unimplemented;
   13085    case 0xeeULL: /* PLO */ goto unimplemented;
   13086    case 0xefULL: /* LMD */ goto unimplemented;
   13087    case 0xf0ULL: /* SRP */ goto unimplemented;
   13088    case 0xf1ULL: /* MVO */ goto unimplemented;
   13089    case 0xf2ULL: /* PACK */ goto unimplemented;
   13090    case 0xf3ULL: /* UNPK */ goto unimplemented;
   13091    case 0xf8ULL: /* ZAP */ goto unimplemented;
   13092    case 0xf9ULL: /* CP */ goto unimplemented;
   13093    case 0xfaULL: /* AP */ goto unimplemented;
   13094    case 0xfbULL: /* SP */ goto unimplemented;
   13095    case 0xfcULL: /* MP */ goto unimplemented;
   13096    case 0xfdULL: /* DP */ goto unimplemented;
   13097    }
   13098 
   13099    switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
   13100    case 0xe500ULL: /* LASP */ goto unimplemented;
   13101    case 0xe501ULL: /* TPROT */ goto unimplemented;
   13102    case 0xe502ULL: /* STRAG */ goto unimplemented;
   13103    case 0xe50eULL: /* MVCSK */ goto unimplemented;
   13104    case 0xe50fULL: /* MVCDK */ goto unimplemented;
   13105    case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
   13106                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13107                                        goto ok;
   13108    case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
   13109                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13110                                        goto ok;
   13111    case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
   13112                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13113                                        goto ok;
   13114    case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
   13115                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13116                                        goto ok;
   13117    case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
   13118                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13119                                        goto ok;
   13120    case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
   13121                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13122                                        goto ok;
   13123    case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
   13124                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13125                                        goto ok;
   13126    case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
   13127                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13128                                        goto ok;
   13129    case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
   13130                                        ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
   13131                                        goto ok;
   13132    }
   13133 
   13134    return S390_DECODE_UNKNOWN_INSN;
   13135 
   13136 ok:
   13137    return S390_DECODE_OK;
   13138 
   13139 unimplemented:
   13140    return S390_DECODE_UNIMPLEMENTED_INSN;
   13141 }
   13142 
   13143 /* Handle "special" instructions. */
   13144 static s390_decode_t
   13145 s390_decode_special_and_irgen(UChar *bytes)
   13146 {
   13147    s390_decode_t status = S390_DECODE_OK;
   13148 
   13149    /* Got a "Special" instruction preamble.  Which one is it? */
   13150    if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
   13151       s390_irgen_client_request();
   13152    } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
   13153       s390_irgen_guest_NRADDR();
   13154    } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
   13155       s390_irgen_call_noredir();
   13156    } else {
   13157       /* We don't know what it is. */
   13158       return S390_DECODE_UNKNOWN_SPECIAL_INSN;
   13159    }
   13160 
   13161    dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
   13162 
   13163    return status;
   13164 }
   13165 
   13166 
   13167 /* Function returns # bytes that were decoded or 0 in case of failure */
   13168 static UInt
   13169 s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
   13170 {
   13171    s390_decode_t status;
   13172 
   13173    dis_res = dres;
   13174 
   13175    /* Spot the 8-byte preamble:   18ff lr r15,r15
   13176                                   1811 lr r1,r1
   13177                                   1822 lr r2,r2
   13178                                   1833 lr r3,r3 */
   13179    if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
   13180        bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
   13181        bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
   13182 
   13183       /* Handle special instruction that follows that preamble. */
   13184       if (0) vex_printf("special function handling...\n");
   13185 
   13186       insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
   13187       guest_IA_next_instr = guest_IA_curr_instr + insn_length;
   13188 
   13189       status =
   13190          s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
   13191    } else {
   13192       /* Handle normal instructions. */
   13193       switch (insn_length) {
   13194       case 2:
   13195          status = s390_decode_2byte_and_irgen(bytes);
   13196          break;
   13197 
   13198       case 4:
   13199          status = s390_decode_4byte_and_irgen(bytes);
   13200          break;
   13201 
   13202       case 6:
   13203          status = s390_decode_6byte_and_irgen(bytes);
   13204          break;
   13205 
   13206       default:
   13207         status = S390_DECODE_ERROR;
   13208         break;
   13209       }
   13210    }
   13211    /* If next instruction is execute, stop here */
   13212    if (irsb->next == NULL && dis_res->whatNext == Dis_Continue
   13213        && bytes[insn_length] == 0x44) {
   13214       irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
   13215       dis_res->whatNext = Dis_StopHere;
   13216       dis_res->continueAt = 0;
   13217    }
   13218 
   13219    if (status == S390_DECODE_OK) return insn_length;  /* OK */
   13220 
   13221    /* Decoding failed somehow */
   13222    vex_printf("vex s390->IR: ");
   13223    switch (status) {
   13224    case S390_DECODE_UNKNOWN_INSN:
   13225       vex_printf("unknown insn: ");
   13226       break;
   13227 
   13228    case S390_DECODE_UNIMPLEMENTED_INSN:
   13229       vex_printf("unimplemented insn: ");
   13230       break;
   13231 
   13232    case S390_DECODE_UNKNOWN_SPECIAL_INSN:
   13233       vex_printf("unimplemented special insn: ");
   13234       break;
   13235 
   13236    default:
   13237    case S390_DECODE_ERROR:
   13238       vex_printf("decoding error: ");
   13239       break;
   13240    }
   13241 
   13242    vex_printf("%02x%02x", bytes[0], bytes[1]);
   13243    if (insn_length > 2) {
   13244       vex_printf(" %02x%02x", bytes[2], bytes[3]);
   13245    }
   13246    if (insn_length > 4) {
   13247       vex_printf(" %02x%02x", bytes[4], bytes[5]);
   13248    }
   13249    vex_printf("\n");
   13250 
   13251    return 0;  /* Failed */
   13252 }
   13253 
   13254 
   13255 /* Generate an IRExpr for an address. */
   13256 static __inline__ IRExpr *
   13257 mkaddr_expr(Addr64 addr)
   13258 {
   13259    return IRExpr_Const(IRConst_U64(addr));
   13260 }
   13261 
   13262 
   13263 /* Disassemble a single instruction INSN into IR. */
   13264 static DisResult
   13265 disInstr_S390_WRK(UChar *insn)
   13266 {
   13267    UChar byte;
   13268    UInt  insn_length;
   13269    DisResult dres;
   13270 
   13271    /* ---------------------------------------------------- */
   13272    /* --- Compute instruction length                    -- */
   13273    /* ---------------------------------------------------- */
   13274 
   13275    /* Get the first byte of the insn. */
   13276    byte = insn[0];
   13277 
   13278    /* The leftmost two bits (0:1) encode the length of the insn in bytes.
   13279       00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
   13280    insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
   13281 
   13282    guest_IA_next_instr = guest_IA_curr_instr + insn_length;
   13283 
   13284    /* ---------------------------------------------------- */
   13285    /* --- Initialise the DisResult data                 -- */
   13286    /* ---------------------------------------------------- */
   13287    dres.whatNext   = Dis_Continue;
   13288    dres.len        = insn_length;
   13289    dres.continueAt = 0;
   13290 
   13291    /* fixs390: consider chasing of conditional jumps */
   13292 
   13293    /* Normal and special instruction handling starts here. */
   13294    if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
   13295       /* All decode failures end up here. The decoder has already issued an
   13296          error message.
   13297          Tell the dispatcher that this insn cannot be decoded, and so has
   13298          not been executed, and (is currently) the next to be executed.
   13299          IA should be up-to-date since it made so at the start of each
   13300          insn, but nevertheless be paranoid and update it again right
   13301          now. */
   13302       addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
   13303                                      mkaddr_expr(guest_IA_curr_instr)));
   13304 
   13305       irsb->next = mkaddr_expr(guest_IA_next_instr);
   13306       irsb->jumpkind = Ijk_NoDecode;
   13307       dres.whatNext = Dis_StopHere;
   13308       dres.len = 0;
   13309    }
   13310 
   13311    return dres;
   13312 }
   13313 
   13314 
   13315 /*------------------------------------------------------------*/
   13316 /*--- Top-level fn                                         ---*/
   13317 /*------------------------------------------------------------*/
   13318 
   13319 /* Disassemble a single instruction into IR.  The instruction
   13320    is located in host memory at &guest_code[delta]. */
   13321 
   13322 DisResult
   13323 disInstr_S390(IRSB        *irsb_IN,
   13324               Bool         put_IP,
   13325               Bool       (*resteerOkFn)(void *, Addr64),
   13326               Bool         resteerCisOk,
   13327               void        *callback_opaque,
   13328               UChar       *guest_code,
   13329               Long         delta,
   13330               Addr64       guest_IP,
   13331               VexArch      guest_arch,
   13332               VexArchInfo *archinfo,
   13333               VexAbiInfo  *abiinfo,
   13334               Bool         host_bigendian)
   13335 {
   13336    vassert(guest_arch == VexArchS390X);
   13337 
   13338    /* The instruction decoder requires a big-endian machine. */
   13339    vassert(host_bigendian == True);
   13340 
   13341    /* Set globals (see top of this file) */
   13342    guest_IA_curr_instr = guest_IP;
   13343    irsb = irsb_IN;
   13344    resteer_fn = resteerOkFn;
   13345    resteer_data = callback_opaque;
   13346 
   13347    /* We may be asked to update the guest IA before going further. */
   13348    if (put_IP)
   13349       addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
   13350                                      mkaddr_expr(guest_IA_curr_instr)));
   13351 
   13352    return disInstr_S390_WRK(guest_code + delta);
   13353 }
   13354 
   13355 /*---------------------------------------------------------------*/
   13356 /*--- end                                   guest_s390_toIR.c ---*/
   13357 /*---------------------------------------------------------------*/
   13358