| /external/llvm/lib/CodeGen/ |
| DFAPacketizer.cpp | 108 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
116 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
118 ScheduleDAGInstrs(MF, MLI, MDT, IsPostRA) {
129 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
133 VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, MDT, IsPostRA);
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| CodePlacementOpt.cpp | 33 const MachineLoopInfo *MLI;
364 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end();
385 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end();
410 MLI = &getAnalysis<MachineLoopInfo>();
411 if (MLI->empty())
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| PHIElimination.cpp | 73 LiveVariables &LV, MachineLoopInfo *MLI);
122 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
124 Changed |= SplitPHIEdges(MF, *I, *LV, MLI);
422 MachineLoopInfo *MLI) {
426 const MachineLoop *CurLoop = MLI ? MLI->getLoopFor(&MBB) : 0;
443 const MachineLoop *PreLoop = MLI ? MLI->getLoopFor(PreMBB) : 0;
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| UnreachableBlockElim.cpp | 129 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
148 if (MLI) MLI->removeBlock(BB);
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| PostRASchedulerList.cpp | 134 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
197 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
201 : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), Topo(SUnits), AA(AA),
257 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
291 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode,
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| MachineBasicBlock.cpp | 760 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
761 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
764 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
767 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
770 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
773 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
782 P->addBasicBlockToLoop(NMBB, MLI->getBase());
[all...] |
| MachineBlockPlacement.cpp | 168 const MachineLoopInfo *MLI;
678 if (MachineLoop *ExitLoop = MLI->getLoopFor(*SI)) {
[all...] |
| MachineLICM.cpp | 74 MachineLoopInfo *MLI; // Current MachineLoopInfo
351 MLI = &getAnalysis<MachineLoopInfo>();
355 SmallVector<MachineLoop *, 8> Worklist(MLI->begin(), MLI->end());
511 const MachineLoop *ML = MLI->getLoopFor(BB);
705 const MachineLoop *ML = MLI->getLoopFor(BB);
[all...] |
| MachineScheduler.cpp | 58 MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {
182 MLI = &getAnalysis<MachineLoopInfo>();
361 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
[all...] |
| ScheduleDAGInstrs.cpp | 43 const MachineLoopInfo &mli,
47 : ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
139 if (MachineLoop *ML = MLI.getLoopFor(BB))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineScheduler.h | 45 const MachineLoopInfo *MLI;
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| DFAPacketizer.h | 111 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
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| ScheduleDAGInstrs.h | 176 const MachineLoopInfo &MLI;
249 const MachineLoopInfo &mli,
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.h | 229 const MachineLoopInfo *MLI;
232 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
235 CurrentBottom(), BotRPTracker(BotPressure), MLI(C->MLI) {
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| HexagonHardwareLoops.cpp | 56 MachineLoopInfo *MLI;
228 MLI = &getAnalysis<MachineLoopInfo>();
234 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end();
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| HexagonVLIWPacketizer.cpp | 101 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
158 MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT)
159 : VLIWPacketizerList(MF, MLI, MDT, true){
164 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
168 HexagonPacketizerList Packetizer(Fn, MLI, MDT);
[all...] |
| HexagonMachineScheduler.cpp | 343 << " at loop depth " << MLI->getLoopDepth(BB)
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| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 60 MachineLoopInfo *MLI;
206 MLI = &getAnalysis<MachineLoopInfo>();
212 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end();
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