| /external/llvm/lib/MC/ |
| MCCodeGenInfo.cpp | 19 CodeGenOpt::Level OL) {
22 OptLevel = OL;
|
| /external/llvm/lib/Target/Sparc/ |
| SparcTargetMachine.cpp | 32 CodeGenOpt::Level OL,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
84 CodeGenOpt::Level OL)
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
96 CodeGenOpt::Level OL)
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| SparcTargetMachine.h | 39 CodeGenOpt::Level OL, bool is64bit);
70 CodeGenOpt::Level OL);
82 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.cpp | 42 CodeGenOpt::Level OL,
44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
65 CodeGenOpt::Level OL)
66 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
74 CodeGenOpt::Level OL)
75 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
|
| MipsTargetMachine.h | 46 CodeGenOpt::Level OL,
91 CodeGenOpt::Level OL);
102 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXTargetMachine.cpp | 70 CodeGenOpt::Level OL,
72 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
87 CodeGenOpt::Level OL)
88 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
97 CodeGenOpt::Level OL)
98 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| NVPTXTargetMachine.h | 110 CodeGenOpt::Level OL);
119 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.cpp | 39 CodeGenOpt::Level OL,
41 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
59 CodeGenOpt::Level OL)
60 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
69 CodeGenOpt::Level OL)
70 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| PPCTargetMachine.h | 44 CodeGenOpt::Level OL, bool is64Bit);
81 CodeGenOpt::Level OL);
92 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430TargetMachine.cpp | 33 CodeGenOpt::Level OL)
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/lib/Target/XCore/ |
| XCoreTargetMachine.cpp | 27 CodeGenOpt::Level OL)
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/include/llvm/MC/ |
| MCCodeGenInfo.h | 38 CodeGenOpt::Level OL = CodeGenOpt::Default);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.cpp | 44 CodeGenOpt::Level OL)
45 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
60 CodeGenOpt::Level OL)
61 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
86 CodeGenOpt::Level OL)
87 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| ARMTargetMachine.h | 46 CodeGenOpt::Level OL);
75 CodeGenOpt::Level OL);
118 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/ |
| TargetMachineC.cpp | 101 CodeGenOpt::Level OL;
105 OL = CodeGenOpt::None;
108 OL = CodeGenOpt::Less;
111 OL = CodeGenOpt::Aggressive;
114 OL = CodeGenOpt::Default;
120 CM, OL));
|
| /external/llvm/lib/Target/X86/ |
| X86TargetMachine.cpp | 37 CodeGenOpt::Level OL)
38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false),
60 CodeGenOpt::Level OL)
61 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true),
76 CodeGenOpt::Level OL,
78 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/lib/Target/CppBackend/ |
| CPPTargetMachine.h | 28 CodeGenOpt::Level OL)
|
| /external/llvm/lib/Target/CellSPU/MCTargetDesc/ |
| SPUMCTargetDesc.cpp | 67 CodeGenOpt::Level OL) {
71 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUTargetMachine.cpp | 38 CodeGenOpt::Level OL)
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCTargetDesc.cpp | 68 CodeGenOpt::Level OL) {
72 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeTargetMachine.cpp | 38 CodeGenOpt::Level OL)
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430MCTargetDesc.cpp | 55 CodeGenOpt::Level OL) {
57 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| NVPTXMCTargetDesc.cpp | 56 CodeGenOpt::Level OL) {
58 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCTargetDesc.cpp | 55 CodeGenOpt::Level OL) {
57 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/XCore/MCTargetDesc/ |
| XCoreMCTargetDesc.cpp | 66 CodeGenOpt::Level OL) {
68 X->InitMCCodeGenInfo(RM, CM, OL);
|
