1 //===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides Hexagon specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "HexagonMCTargetDesc.h" 15 #include "HexagonMCAsmInfo.h" 16 #include "llvm/MC/MachineLocation.h" 17 #include "llvm/MC/MCCodeGenInfo.h" 18 #include "llvm/MC/MCInstrInfo.h" 19 #include "llvm/MC/MCRegisterInfo.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/TargetRegistry.h" 23 24 #define GET_INSTRINFO_MC_DESC 25 #include "HexagonGenInstrInfo.inc" 26 27 #define GET_SUBTARGETINFO_MC_DESC 28 #include "HexagonGenSubtargetInfo.inc" 29 30 #define GET_REGINFO_MC_DESC 31 #include "HexagonGenRegisterInfo.inc" 32 33 using namespace llvm; 34 35 static MCInstrInfo *createHexagonMCInstrInfo() { 36 MCInstrInfo *X = new MCInstrInfo(); 37 InitHexagonMCInstrInfo(X); 38 return X; 39 } 40 41 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) { 42 MCRegisterInfo *X = new MCRegisterInfo(); 43 InitHexagonMCRegisterInfo(X, Hexagon::R0); 44 return X; 45 } 46 47 static MCSubtargetInfo *createHexagonMCSubtargetInfo(StringRef TT, 48 StringRef CPU, 49 StringRef FS) { 50 MCSubtargetInfo *X = new MCSubtargetInfo(); 51 InitHexagonMCSubtargetInfo(X, TT, CPU, FS); 52 return X; 53 } 54 55 static MCAsmInfo *createHexagonMCAsmInfo(const Target &T, StringRef TT) { 56 MCAsmInfo *MAI = new HexagonMCAsmInfo(T, TT); 57 58 // VirtualFP = (R30 + #0). 59 MachineLocation Dst(MachineLocation::VirtualFP); 60 MachineLocation Src(Hexagon::R30, 0); 61 MAI->addInitialFrameState(0, Dst, Src); 62 63 return MAI; 64 } 65 66 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, 67 CodeModel::Model CM, 68 CodeGenOpt::Level OL) { 69 MCCodeGenInfo *X = new MCCodeGenInfo(); 70 // For the time being, use static relocations, since there's really no 71 // support for PIC yet. 72 X->InitMCCodeGenInfo(Reloc::Static, CM, OL); 73 return X; 74 } 75 76 // Force static initialization. 77 extern "C" void LLVMInitializeHexagonTargetMC() { 78 // Register the MC asm info. 79 RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo); 80 81 // Register the MC codegen info. 82 TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget, 83 createHexagonMCCodeGenInfo); 84 85 // Register the MC instruction info. 86 TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget, createHexagonMCInstrInfo); 87 88 // Register the MC register info. 89 TargetRegistry::RegisterMCRegInfo(TheHexagonTarget, 90 createHexagonMCRegisterInfo); 91 92 // Register the MC subtarget info. 93 TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget, 94 createHexagonMCSubtargetInfo); 95 } 96
