| /external/llvm/lib/MC/ |
| MCRegisterInfo.cpp | 46 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
50 DwarfLLVMRegPair Key = { RegNum, 0 };
52 if (I == M+Size || I->FromReg != RegNum)
57 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
61 DwarfLLVMRegPair Key = { RegNum, 0 };
63 assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
67 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
68 const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
69 if (I == L2SEHRegs.end()) return (int)RegNum;
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 88 int matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic);
142 unsigned RegNum;
200 return Reg.RegNum;
227 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
229 Op->Reg.RegNum = RegNum;
416 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum,StringRef Mnemonic) {
420 if (RegNum != 29)
425 if (RegNum > 31)
428 return getReg(Mips::CPURegsRegClassID,RegNum);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 65 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
|
| NVPTXRegisterInfo.cpp | 305 getDwarfRegNum(unsigned RegNum, bool isEH) const {
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 70 int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const;
|
| X86CodeEmitter.cpp | [all...] |
| X86RegisterInfo.cpp | 88 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const {
89 switch (getLLVMRegNum(RegNum, isEH)) {
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 347 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
351 int getLLVMRegNum(unsigned RegNum, bool isEH) const;
355 int getSEHRegNum(unsigned RegNum) const;
|
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 96 unsigned RegNum;
147 return Reg.RegNum;
234 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
236 Op->Reg.RegNum = RegNum;
415 unsigned regNum;
416 if (String.substr(4).getAsInteger(10,regNum))
419 return regNum;
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 148 unsigned RegNum = getMipsRegisterNumbering(Reg);
150 FPUBitmask |= (3 << RegNum);
156 FPUBitmask |= (1 << RegNum);
163 unsigned RegNum = getMipsRegisterNumbering(Reg);
164 CPUBitmask |= (1 << RegNum);
|
| /external/clang/lib/Basic/ |
| TargetInfo.cpp | 246 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
299 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg);
139 CPUBitmask |= (1 << RegNum);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 122 unsigned RegNum;
124 Values(unsigned r) : RegNum(r) {}
141 return Contents.RegNum;
144 Contents.RegNum = Val;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 135 unsigned RegNum;
137 Values(unsigned r) : RegNum(r) {}
154 return Contents.RegNum;
157 Contents.RegNum = Val;
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 346 unsigned RegNum;
351 unsigned RegNum;
380 unsigned RegNum;
510 return Reg.RegNum;
[all...] |
| /external/clang/include/clang/Basic/ |
| TargetInfo.h | 537 const unsigned RegNum;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg);
491 ((isNotVFP && RegNum > PRegNum) ||
492 ((Count < Limit) && RegNum == PRegNum+1))) {
494 PRegNum = RegNum;
[all...] |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 853 if (unsigned RegNum = MO2.getReg())
854 O << ", " << getRegisterName(RegNum);
[all...] |
