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    Searched refs:isCommutable (Results 1 - 15 of 15) sorted by null

  /external/llvm/include/llvm/CodeGen/
ScheduleDAG.h 278 bool isCommutable : 1; // Is a commutable instruction.
308 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
322 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
335 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
MachineInstr.h 479 /// isCommutable - Return true if this may be a 2- or 3-address
489 bool isCommutable(QueryType Type = IgnoreBundle) const {
    [all...]
  /external/llvm/include/llvm/MC/
MCInstrDesc.h 358 /// isCommutable - Return true if this may be a 2- or 3-address
368 bool isCommutable() const {
  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp 97 SU->isCommutable = Old->isCommutable;
441 if (MCID.isCommutable())
442 SU->isCommutable = true;
    [all...]
ScheduleDAGFast.cpp 259 if (MCID.isCommutable())
260 NewSU->isCommutable = true;
ScheduleDAGRRList.cpp     [all...]
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 235 bool isCommutable;
InstrInfoEmitter.cpp 331 if (Inst.isCommutable) OS << "|(1<<MCID::Commutable)";
CodeGenInstruction.cpp 307 isCommutable = R->getValueAsBit("isCommutable");
  /external/llvm/lib/CodeGen/
ScheduleDAGInstrs.cpp 732 SU->isCommutable = MI->isCommutable();
    [all...]
MachineCSE.cpp 445 if (!FoundCSE && MI->isCommutable()) {
TargetInstrInfoImpl.cpp 129 if (!MCID.isCommutable())
RegisterCoalescer.cpp 565 if (!DefMI->isCommutable())
    [all...]
TwoAddressInstructionPass.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp     [all...]

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