/dalvik/vm/compiler/codegen/arm/FP/ |
ThumbPortableFP.cpp | 20 RegLocation rlSrc2); 24 RegLocation rlSrc2); 37 RegLocation rlSrc2) 39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 44 RegLocation rlSrc2) 46 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 55 RegLocation rlSrc1, RegLocation rlSrc2) 65 loadValueDirectFixed(cUnit, rlSrc2, r1); 71 loadValueDirectFixed(cUnit, rlSrc2, r1); 77 loadValueDirectWideFixed(cUnit, rlSrc2, r2, r3) [all...] |
Thumb2VFP.cpp | 19 RegLocation rlSrc2) 49 rlSrc2); 55 rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg); 58 rlSrc2.lowReg); 65 RegLocation rlSrc2) 91 rlSrc2); 99 rlSrc2 = loadValueWide(cUnit, rlSrc2, kFPReg); 100 assert(rlSrc2.wide) [all...] |
ThumbVFP.cpp | 66 RegLocation rlSrc2) 94 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 101 loadValueAddressDirect(cUnit, rlSrc2, r2); 112 RegLocation rlSrc2) 137 rlSrc2); 144 loadValueAddressDirect(cUnit, rlSrc2, r2); 227 RegLocation rlSrc1, RegLocation rlSrc2) 252 loadValueAddressDirect(cUnit, rlSrc2, r1);
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/dalvik/vm/compiler/codegen/mips/Mips32/ |
Gen.cpp | 105 RegLocation rlSrc1, RegLocation rlSrc2) 109 loadValueDirectWideFixed(cUnit, rlSrc2, r_ARG2, r_ARG3); 122 RegLocation rlSrc2, int sltuSrc1, int sltuSrc2) 125 newLIR3(cUnit, opc, rlDest.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); 127 newLIR3(cUnit, opc, rlDest.highReg, rlSrc1.highReg, rlSrc2.highReg); 134 RegLocation rlSrc1, RegLocation rlSrc2) 139 if (partialOverlap(rlSrc1.sRegLow,rlSrc2.sRegLow) || 141 partialOverlap(rlSrc2.sRegLow,rlDest.sRegLow)) { 146 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg) [all...] |
/dalvik/vm/compiler/codegen/mips/FP/ |
MipsFP.cpp | 69 RegLocation rlSrc2) 99 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 105 rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg); 107 newLIR3(cUnit, (MipsOpCode)op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); 138 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 147 loadValueAddress(cUnit, rlSrc2, r_A2); 159 RegLocation rlSrc2) 185 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 192 rlSrc2 = loadValueWide(cUnit, rlSrc2, kFPReg) [all...] |
/dalvik/vm/compiler/codegen/arm/ |
Codegen.h | 40 RegLocation rlSrc2); 44 RegLocation rlSrc2);
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CodegenDriver.cpp | 83 RegLocation rlSrc2) 118 loadValueDirectFixed(cUnit, rlSrc2, r1); 129 RegLocation rlSrc2) 165 loadValueDirectWideFixed(cUnit, rlSrc2, r2, r3); 667 RegLocation rlSrc2) 679 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg); 681 opRegReg(cUnit, kOpMvn, rlResult.lowReg, rlSrc2.lowReg); 682 opRegReg(cUnit, kOpMvn, rlResult.highReg, rlSrc2.highReg); 698 genMulLong(cUnit, rlDest, rlSrc1, rlSrc2); [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb/ |
Gen.cpp | 109 RegLocation rlSrc1, RegLocation rlSrc2) 113 loadValueDirectWideFixed(cUnit, rlSrc2, r2, r3); 126 RegLocation rlSrc1, RegLocation rlSrc2) 129 if (partialOverlap(rlSrc1.sRegLow,rlSrc2.sRegLow) || 131 partialOverlap(rlSrc2.sRegLow,rlDest.sRegLow)) { 137 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg); 138 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg); 139 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg); 141 } else if (rlDest.sRegLow == rlSrc2.sRegLow) [all...] |
/dalvik/vm/compiler/codegen/mips/ |
Codegen.h | 40 RegLocation rlSrc2); 44 RegLocation rlSrc2);
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CodegenDriver.cpp | 126 RegLocation rlSrc2) 163 loadValueDirectFixed(cUnit, rlSrc2, r_F14); 166 loadValueDirectFixed(cUnit, rlSrc2, r_A1); 183 RegLocation rlSrc2) 220 loadValueDirectWideFixed(cUnit, rlSrc2, r_F14, r_F15); 223 loadValueDirectWideFixed(cUnit, rlSrc2, r_ARG2, r_ARG3); 728 RegLocation rlSrc2) 738 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg); 740 opRegReg(cUnit, kOpMvn, rlResult.lowReg, rlSrc2.lowReg) [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb2/ |
Gen.cpp | 103 RegLocation rlSrc1, RegLocation rlSrc2) 111 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg); 113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg); 114 newLIR4(cUnit, kThumb2Umull, resLo, resHi, rlSrc2.lowReg, rlSrc1.lowReg); 115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1); 127 RegLocation rlSrc1, RegLocation rlSrc2) 131 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg); 133 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg) [all...] |