1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 //===----------------------------------------------------------------------===// 11 // 12 // PowerPC instruction formats 13 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 15 : Instruction { 16 field bits<32> Inst; 17 18 bit PPC64 = 0; // Default value, override with isPPC64 19 20 let Namespace = "PPC"; 21 let Inst{0-5} = opcode; 22 let OutOperandList = OOL; 23 let InOperandList = IOL; 24 let AsmString = asmstr; 25 let Itinerary = itin; 26 27 bits<1> PPC970_First = 0; 28 bits<1> PPC970_Single = 0; 29 bits<1> PPC970_Cracked = 0; 30 bits<3> PPC970_Unit = 0; 31 32 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 33 /// these must be reflected there! See comments there for what these are. 34 let TSFlags{0} = PPC970_First; 35 let TSFlags{1} = PPC970_Single; 36 let TSFlags{2} = PPC970_Cracked; 37 let TSFlags{5-3} = PPC970_Unit; 38 } 39 40 class PPC970_DGroup_First { bits<1> PPC970_First = 1; } 41 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; } 42 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; } 43 class PPC970_MicroCode; 44 45 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; } 46 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; } 47 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; } 48 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; } 49 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; } 50 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; } 51 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } 52 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } 53 54 // Two joined instructions; used to emit two adjacent instructions as one. 55 // The itinerary from the first instruction is used for scheduling and 56 // classification. 57 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 58 InstrItinClass itin> 59 : Instruction { 60 field bits<64> Inst; 61 62 bit PPC64 = 0; // Default value, override with isPPC64 63 64 let Namespace = "PPC"; 65 let Inst{0-5} = opcode1; 66 let Inst{32-37} = opcode2; 67 let OutOperandList = OOL; 68 let InOperandList = IOL; 69 let AsmString = asmstr; 70 let Itinerary = itin; 71 72 bits<1> PPC970_First = 0; 73 bits<1> PPC970_Single = 0; 74 bits<1> PPC970_Cracked = 0; 75 bits<3> PPC970_Unit = 0; 76 77 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 78 /// these must be reflected there! See comments there for what these are. 79 let TSFlags{0} = PPC970_First; 80 let TSFlags{1} = PPC970_Single; 81 let TSFlags{2} = PPC970_Cracked; 82 let TSFlags{5-3} = PPC970_Unit; 83 } 84 85 // 1.7.1 I-Form 86 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 87 InstrItinClass itin, list<dag> pattern> 88 : I<opcode, OOL, IOL, asmstr, itin> { 89 let Pattern = pattern; 90 bits<24> LI; 91 92 let Inst{6-29} = LI; 93 let Inst{30} = aa; 94 let Inst{31} = lk; 95 } 96 97 class IForm_ext<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL, 98 string asmstr, InstrItinClass itin, list<dag> pattern> 99 : IForm<opcode, aa, lk, OOL, IOL, asmstr, itin, pattern> { 100 let LI{0-4} = bo; 101 } 102 103 // 1.7.2 B-Form 104 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 105 : I<opcode, OOL, IOL, asmstr, BrB> { 106 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 107 bits<3> CR; 108 bits<14> BD; 109 110 bits<5> BI; 111 let BI{0-1} = BIBO{5-6}; 112 let BI{2-4} = CR{0-2}; 113 114 let Inst{6-10} = BIBO{4-0}; 115 let Inst{11-15} = BI; 116 let Inst{16-29} = BD; 117 let Inst{30} = aa; 118 let Inst{31} = lk; 119 } 120 121 122 // 1.7.4 D-Form 123 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 124 InstrItinClass itin, list<dag> pattern> 125 : I<opcode, OOL, IOL, asmstr, itin> { 126 bits<5> A; 127 bits<5> B; 128 bits<16> C; 129 130 let Pattern = pattern; 131 132 let Inst{6-10} = A; 133 let Inst{11-15} = B; 134 let Inst{16-31} = C; 135 } 136 137 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 138 InstrItinClass itin, list<dag> pattern> 139 : I<opcode, OOL, IOL, asmstr, itin> { 140 bits<5> A; 141 bits<21> Addr; 142 143 let Pattern = pattern; 144 145 let Inst{6-10} = A; 146 let Inst{11-15} = Addr{20-16}; // Base Reg 147 let Inst{16-31} = Addr{15-0}; // Displacement 148 } 149 150 class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr, 151 InstrItinClass itin, list<dag> pattern> 152 : I<opcode, OOL, IOL, asmstr, itin> { 153 bits<5> A; 154 bits<16> C; 155 bits<5> B; 156 157 let Pattern = pattern; 158 159 let Inst{6-10} = A; 160 let Inst{11-15} = B; 161 let Inst{16-31} = C; 162 } 163 164 165 class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 166 InstrItinClass itin, list<dag> pattern> 167 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>; 168 169 class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr, 170 InstrItinClass itin, list<dag> pattern> 171 : I<opcode, OOL, IOL, asmstr, itin> { 172 bits<5> A; 173 bits<16> B; 174 175 let Pattern = pattern; 176 177 let Inst{6-10} = A; 178 let Inst{11-15} = 0; 179 let Inst{16-31} = B; 180 } 181 182 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr, 183 InstrItinClass itin, list<dag> pattern> 184 : I<opcode, OOL, IOL, asmstr, itin> { 185 bits<5> B; 186 bits<5> A; 187 bits<16> C; 188 189 let Pattern = pattern; 190 191 let Inst{6-10} = A; 192 let Inst{11-15} = B; 193 let Inst{16-31} = C; 194 } 195 196 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr, 197 InstrItinClass itin, list<dag> pattern> 198 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 199 let A = 0; 200 let Addr = 0; 201 } 202 203 class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 204 dag OOL, dag IOL, string asmstr, 205 InstrItinClass itin, list<dag> pattern> 206 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> { 207 bits<5> A; 208 bits<21> Addr; 209 210 let Pattern = pattern; 211 bits<24> LI; 212 213 let Inst{6-29} = LI; 214 let Inst{30} = aa; 215 let Inst{31} = lk; 216 217 let Inst{38-42} = A; 218 let Inst{43-47} = Addr{20-16}; // Base Reg 219 let Inst{48-63} = Addr{15-0}; // Displacement 220 } 221 222 // This is used to emit BL8+NOP. 223 class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 224 dag OOL, dag IOL, string asmstr, 225 InstrItinClass itin, list<dag> pattern> 226 : IForm_and_DForm_1<opcode1, aa, lk, opcode2, 227 OOL, IOL, asmstr, itin, pattern> { 228 let A = 0; 229 let Addr = 0; 230 } 231 232 class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr, 233 InstrItinClass itin> 234 : I<opcode, OOL, IOL, asmstr, itin> { 235 bits<3> BF; 236 bits<1> L; 237 bits<5> RA; 238 bits<16> I; 239 240 let Inst{6-8} = BF; 241 let Inst{9} = 0; 242 let Inst{10} = L; 243 let Inst{11-15} = RA; 244 let Inst{16-31} = I; 245 } 246 247 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 248 InstrItinClass itin> 249 : DForm_5<opcode, OOL, IOL, asmstr, itin> { 250 let L = PPC64; 251 } 252 253 class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr, 254 InstrItinClass itin> 255 : DForm_5<opcode, OOL, IOL, asmstr, itin>; 256 257 class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 258 InstrItinClass itin> 259 : DForm_6<opcode, OOL, IOL, asmstr, itin> { 260 let L = PPC64; 261 } 262 263 264 // 1.7.5 DS-Form 265 class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 266 InstrItinClass itin, list<dag> pattern> 267 : I<opcode, OOL, IOL, asmstr, itin> { 268 bits<5> RST; 269 bits<19> DS_RA; 270 271 let Pattern = pattern; 272 273 let Inst{6-10} = RST; 274 let Inst{11-15} = DS_RA{18-14}; // Register # 275 let Inst{16-29} = DS_RA{13-0}; // Displacement. 276 let Inst{30-31} = xo; 277 } 278 279 class DSForm_1a<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 280 InstrItinClass itin, list<dag> pattern> 281 : I<opcode, OOL, IOL, asmstr, itin> { 282 bits<5> RST; 283 bits<14> DS; 284 bits<5> RA; 285 286 let Pattern = pattern; 287 288 let Inst{6-10} = RST; 289 let Inst{11-15} = RA; 290 let Inst{16-29} = DS; 291 let Inst{30-31} = xo; 292 } 293 294 // 1.7.6 X-Form 295 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 296 InstrItinClass itin, list<dag> pattern> 297 : I<opcode, OOL, IOL, asmstr, itin> { 298 bits<5> RST; 299 bits<5> A; 300 bits<5> B; 301 302 let Pattern = pattern; 303 304 bit RC = 0; // set by isDOT 305 306 let Inst{6-10} = RST; 307 let Inst{11-15} = A; 308 let Inst{16-20} = B; 309 let Inst{21-30} = xo; 310 let Inst{31} = RC; 311 } 312 313 // This is the same as XForm_base_r3xo, but the first two operands are swapped 314 // when code is emitted. 315 class XForm_base_r3xo_swapped 316 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 317 InstrItinClass itin> 318 : I<opcode, OOL, IOL, asmstr, itin> { 319 bits<5> A; 320 bits<5> RST; 321 bits<5> B; 322 323 bit RC = 0; // set by isDOT 324 325 let Inst{6-10} = RST; 326 let Inst{11-15} = A; 327 let Inst{16-20} = B; 328 let Inst{21-30} = xo; 329 let Inst{31} = RC; 330 } 331 332 333 class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 334 InstrItinClass itin, list<dag> pattern> 335 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 336 337 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 338 InstrItinClass itin, list<dag> pattern> 339 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 340 let Pattern = pattern; 341 } 342 343 class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 344 InstrItinClass itin, list<dag> pattern> 345 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 346 347 class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 348 InstrItinClass itin, list<dag> pattern> 349 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 350 let Pattern = pattern; 351 } 352 353 class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 354 InstrItinClass itin, list<dag> pattern> 355 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 356 let B = 0; 357 let Pattern = pattern; 358 } 359 360 class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 361 InstrItinClass itin> 362 : I<opcode, OOL, IOL, asmstr, itin> { 363 bits<3> BF; 364 bits<1> L; 365 bits<5> RA; 366 bits<5> RB; 367 368 let Inst{6-8} = BF; 369 let Inst{9} = 0; 370 let Inst{10} = L; 371 let Inst{11-15} = RA; 372 let Inst{16-20} = RB; 373 let Inst{21-30} = xo; 374 let Inst{31} = 0; 375 } 376 377 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 378 InstrItinClass itin> 379 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> { 380 let L = PPC64; 381 } 382 383 class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 384 InstrItinClass itin> 385 : I<opcode, OOL, IOL, asmstr, itin> { 386 bits<3> BF; 387 bits<5> FRA; 388 bits<5> FRB; 389 390 let Inst{6-8} = BF; 391 let Inst{9-10} = 0; 392 let Inst{11-15} = FRA; 393 let Inst{16-20} = FRB; 394 let Inst{21-30} = xo; 395 let Inst{31} = 0; 396 } 397 398 class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 399 InstrItinClass itin, list<dag> pattern> 400 : I<opcode, OOL, IOL, asmstr, itin> { 401 let Pattern = pattern; 402 let Inst{6-10} = 31; 403 let Inst{11-15} = 0; 404 let Inst{16-20} = 0; 405 let Inst{21-30} = xo; 406 let Inst{31} = 0; 407 } 408 409 class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 410 string asmstr, InstrItinClass itin, list<dag> pattern> 411 : I<opcode, OOL, IOL, asmstr, itin> { 412 let Pattern = pattern; 413 let Inst{6-10} = 0; 414 let Inst{11-15} = 0; 415 let Inst{16-20} = 0; 416 let Inst{21-30} = xo; 417 let Inst{31} = 0; 418 } 419 420 class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 421 InstrItinClass itin, list<dag> pattern> 422 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 423 } 424 425 class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 426 InstrItinClass itin, list<dag> pattern> 427 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 428 let A = 0; 429 } 430 431 class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 432 InstrItinClass itin, list<dag> pattern> 433 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 434 } 435 436 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of 437 // numbers presumably relates to some document, but I haven't found it. 438 class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 439 InstrItinClass itin, list<dag> pattern> 440 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 441 let Pattern = pattern; 442 443 bit RC = 0; // set by isDOT 444 445 let Inst{6-10} = RST; 446 let Inst{11-20} = 0; 447 let Inst{21-30} = xo; 448 let Inst{31} = RC; 449 } 450 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 451 InstrItinClass itin, list<dag> pattern> 452 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 453 let Pattern = pattern; 454 bits<5> FM; 455 456 bit RC = 0; // set by isDOT 457 458 let Inst{6-10} = FM; 459 let Inst{11-20} = 0; 460 let Inst{21-30} = xo; 461 let Inst{31} = RC; 462 } 463 464 // DCB_Form - Form X instruction, used for dcb* instructions. 465 class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 466 InstrItinClass itin, list<dag> pattern> 467 : I<31, OOL, IOL, asmstr, itin> { 468 bits<5> A; 469 bits<5> B; 470 471 let Pattern = pattern; 472 473 let Inst{6-10} = immfield; 474 let Inst{11-15} = A; 475 let Inst{16-20} = B; 476 let Inst{21-30} = xo; 477 let Inst{31} = 0; 478 } 479 480 481 // DSS_Form - Form X instruction, used for altivec dss* instructions. 482 class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr, 483 InstrItinClass itin, list<dag> pattern> 484 : I<31, OOL, IOL, asmstr, itin> { 485 bits<1> T; 486 bits<2> STRM; 487 bits<5> A; 488 bits<5> B; 489 490 let Pattern = pattern; 491 492 let Inst{6} = T; 493 let Inst{7-8} = 0; 494 let Inst{9-10} = STRM; 495 let Inst{11-15} = A; 496 let Inst{16-20} = B; 497 let Inst{21-30} = xo; 498 let Inst{31} = 0; 499 } 500 501 // 1.7.7 XL-Form 502 class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 503 InstrItinClass itin, list<dag> pattern> 504 : I<opcode, OOL, IOL, asmstr, itin> { 505 bits<5> CRD; 506 bits<5> CRA; 507 bits<5> CRB; 508 509 let Pattern = pattern; 510 511 let Inst{6-10} = CRD; 512 let Inst{11-15} = CRA; 513 let Inst{16-20} = CRB; 514 let Inst{21-30} = xo; 515 let Inst{31} = 0; 516 } 517 518 class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 519 InstrItinClass itin, list<dag> pattern> 520 : I<opcode, OOL, IOL, asmstr, itin> { 521 bits<5> CRD; 522 523 let Pattern = pattern; 524 525 let Inst{6-10} = CRD; 526 let Inst{11-15} = CRD; 527 let Inst{16-20} = CRD; 528 let Inst{21-30} = xo; 529 let Inst{31} = 0; 530 } 531 532 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 533 InstrItinClass itin, list<dag> pattern> 534 : I<opcode, OOL, IOL, asmstr, itin> { 535 bits<5> BO; 536 bits<5> BI; 537 bits<2> BH; 538 539 let Pattern = pattern; 540 541 let Inst{6-10} = BO; 542 let Inst{11-15} = BI; 543 let Inst{16-18} = 0; 544 let Inst{19-20} = BH; 545 let Inst{21-30} = xo; 546 let Inst{31} = lk; 547 } 548 549 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk, 550 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 551 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 552 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 553 bits<3> CR; 554 555 let BO = BIBO{2-6}; 556 let BI{0-1} = BIBO{0-1}; 557 let BI{2-4} = CR; 558 let BH = 0; 559 } 560 561 562 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk, 563 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 564 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 565 let BO = bo; 566 let BI = bi; 567 let BH = 0; 568 } 569 570 class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 571 InstrItinClass itin> 572 : I<opcode, OOL, IOL, asmstr, itin> { 573 bits<3> BF; 574 bits<3> BFA; 575 576 let Inst{6-8} = BF; 577 let Inst{9-10} = 0; 578 let Inst{11-13} = BFA; 579 let Inst{14-15} = 0; 580 let Inst{16-20} = 0; 581 let Inst{21-30} = xo; 582 let Inst{31} = 0; 583 } 584 585 // 1.7.8 XFX-Form 586 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 587 InstrItinClass itin> 588 : I<opcode, OOL, IOL, asmstr, itin> { 589 bits<5> RT; 590 bits<10> SPR; 591 592 let Inst{6-10} = RT; 593 let Inst{11} = SPR{4}; 594 let Inst{12} = SPR{3}; 595 let Inst{13} = SPR{2}; 596 let Inst{14} = SPR{1}; 597 let Inst{15} = SPR{0}; 598 let Inst{16} = SPR{9}; 599 let Inst{17} = SPR{8}; 600 let Inst{18} = SPR{7}; 601 let Inst{19} = SPR{6}; 602 let Inst{20} = SPR{5}; 603 let Inst{21-30} = xo; 604 let Inst{31} = 0; 605 } 606 607 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 608 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 609 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> { 610 let SPR = spr; 611 } 612 613 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 614 InstrItinClass itin> 615 : I<opcode, OOL, IOL, asmstr, itin> { 616 bits<5> RT; 617 618 let Inst{6-10} = RT; 619 let Inst{11-20} = 0; 620 let Inst{21-30} = xo; 621 let Inst{31} = 0; 622 } 623 624 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 625 InstrItinClass itin> 626 : I<opcode, OOL, IOL, asmstr, itin> { 627 bits<8> FXM; 628 bits<5> ST; 629 630 let Inst{6-10} = ST; 631 let Inst{11} = 0; 632 let Inst{12-19} = FXM; 633 let Inst{20} = 0; 634 let Inst{21-30} = xo; 635 let Inst{31} = 0; 636 } 637 638 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 639 InstrItinClass itin> 640 : I<opcode, OOL, IOL, asmstr, itin> { 641 bits<5> ST; 642 bits<8> FXM; 643 644 let Inst{6-10} = ST; 645 let Inst{11} = 1; 646 let Inst{12-19} = FXM; 647 let Inst{20} = 0; 648 let Inst{21-30} = xo; 649 let Inst{31} = 0; 650 } 651 652 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 653 InstrItinClass itin> 654 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>; 655 656 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 657 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 658 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> { 659 let SPR = spr; 660 } 661 662 // XFL-Form - MTFSF 663 // This is probably 1.7.9, but I don't have the reference that uses this 664 // numbering scheme... 665 class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 666 string cstr, InstrItinClass itin, list<dag>pattern> 667 : I<opcode, OOL, IOL, asmstr, itin> { 668 bits<8> FM; 669 bits<5> RT; 670 671 bit RC = 0; // set by isDOT 672 let Pattern = pattern; 673 let Constraints = cstr; 674 675 let Inst{6} = 0; 676 let Inst{7-14} = FM; 677 let Inst{15} = 0; 678 let Inst{16-20} = RT; 679 let Inst{21-30} = xo; 680 let Inst{31} = RC; 681 } 682 683 // 1.7.10 XS-Form - SRADI. 684 class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 685 InstrItinClass itin, list<dag> pattern> 686 : I<opcode, OOL, IOL, asmstr, itin> { 687 bits<5> A; 688 bits<5> RS; 689 bits<6> SH; 690 691 bit RC = 0; // set by isDOT 692 let Pattern = pattern; 693 694 let Inst{6-10} = RS; 695 let Inst{11-15} = A; 696 let Inst{16-20} = SH{4,3,2,1,0}; 697 let Inst{21-29} = xo; 698 let Inst{30} = SH{5}; 699 let Inst{31} = RC; 700 } 701 702 // 1.7.11 XO-Form 703 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr, 704 InstrItinClass itin, list<dag> pattern> 705 : I<opcode, OOL, IOL, asmstr, itin> { 706 bits<5> RT; 707 bits<5> RA; 708 bits<5> RB; 709 710 let Pattern = pattern; 711 712 bit RC = 0; // set by isDOT 713 714 let Inst{6-10} = RT; 715 let Inst{11-15} = RA; 716 let Inst{16-20} = RB; 717 let Inst{21} = oe; 718 let Inst{22-30} = xo; 719 let Inst{31} = RC; 720 } 721 722 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 723 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 724 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> { 725 let RB = 0; 726 } 727 728 // 1.7.12 A-Form 729 class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 730 InstrItinClass itin, list<dag> pattern> 731 : I<opcode, OOL, IOL, asmstr, itin> { 732 bits<5> FRT; 733 bits<5> FRA; 734 bits<5> FRC; 735 bits<5> FRB; 736 737 let Pattern = pattern; 738 739 bit RC = 0; // set by isDOT 740 741 let Inst{6-10} = FRT; 742 let Inst{11-15} = FRA; 743 let Inst{16-20} = FRB; 744 let Inst{21-25} = FRC; 745 let Inst{26-30} = xo; 746 let Inst{31} = RC; 747 } 748 749 class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 750 InstrItinClass itin, list<dag> pattern> 751 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 752 let FRC = 0; 753 } 754 755 class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 756 InstrItinClass itin, list<dag> pattern> 757 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 758 let FRB = 0; 759 } 760 761 // 1.7.13 M-Form 762 class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 763 InstrItinClass itin, list<dag> pattern> 764 : I<opcode, OOL, IOL, asmstr, itin> { 765 bits<5> RA; 766 bits<5> RS; 767 bits<5> RB; 768 bits<5> MB; 769 bits<5> ME; 770 771 let Pattern = pattern; 772 773 bit RC = 0; // set by isDOT 774 775 let Inst{6-10} = RS; 776 let Inst{11-15} = RA; 777 let Inst{16-20} = RB; 778 let Inst{21-25} = MB; 779 let Inst{26-30} = ME; 780 let Inst{31} = RC; 781 } 782 783 class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 784 InstrItinClass itin, list<dag> pattern> 785 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 786 } 787 788 // 1.7.14 MD-Form 789 class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, 790 InstrItinClass itin, list<dag> pattern> 791 : I<opcode, OOL, IOL, asmstr, itin> { 792 bits<5> RA; 793 bits<5> RS; 794 bits<6> SH; 795 bits<6> MBE; 796 797 let Pattern = pattern; 798 799 bit RC = 0; // set by isDOT 800 801 let Inst{6-10} = RS; 802 let Inst{11-15} = RA; 803 let Inst{16-20} = SH{4,3,2,1,0}; 804 let Inst{21-26} = MBE{4,3,2,1,0,5}; 805 let Inst{27-29} = xo; 806 let Inst{30} = SH{5}; 807 let Inst{31} = RC; 808 } 809 810 811 812 // E-1 VA-Form 813 814 // VAForm_1 - DACB ordering. 815 class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr, 816 InstrItinClass itin, list<dag> pattern> 817 : I<4, OOL, IOL, asmstr, itin> { 818 bits<5> VD; 819 bits<5> VA; 820 bits<5> VC; 821 bits<5> VB; 822 823 let Pattern = pattern; 824 825 let Inst{6-10} = VD; 826 let Inst{11-15} = VA; 827 let Inst{16-20} = VB; 828 let Inst{21-25} = VC; 829 let Inst{26-31} = xo; 830 } 831 832 // VAForm_1a - DABC ordering. 833 class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr, 834 InstrItinClass itin, list<dag> pattern> 835 : I<4, OOL, IOL, asmstr, itin> { 836 bits<5> VD; 837 bits<5> VA; 838 bits<5> VB; 839 bits<5> VC; 840 841 let Pattern = pattern; 842 843 let Inst{6-10} = VD; 844 let Inst{11-15} = VA; 845 let Inst{16-20} = VB; 846 let Inst{21-25} = VC; 847 let Inst{26-31} = xo; 848 } 849 850 class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr, 851 InstrItinClass itin, list<dag> pattern> 852 : I<4, OOL, IOL, asmstr, itin> { 853 bits<5> VD; 854 bits<5> VA; 855 bits<5> VB; 856 bits<4> SH; 857 858 let Pattern = pattern; 859 860 let Inst{6-10} = VD; 861 let Inst{11-15} = VA; 862 let Inst{16-20} = VB; 863 let Inst{21} = 0; 864 let Inst{22-25} = SH; 865 let Inst{26-31} = xo; 866 } 867 868 // E-2 VX-Form 869 class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr, 870 InstrItinClass itin, list<dag> pattern> 871 : I<4, OOL, IOL, asmstr, itin> { 872 bits<5> VD; 873 bits<5> VA; 874 bits<5> VB; 875 876 let Pattern = pattern; 877 878 let Inst{6-10} = VD; 879 let Inst{11-15} = VA; 880 let Inst{16-20} = VB; 881 let Inst{21-31} = xo; 882 } 883 884 class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr, 885 InstrItinClass itin, list<dag> pattern> 886 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> { 887 let VA = VD; 888 let VB = VD; 889 } 890 891 892 class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr, 893 InstrItinClass itin, list<dag> pattern> 894 : I<4, OOL, IOL, asmstr, itin> { 895 bits<5> VD; 896 bits<5> VB; 897 898 let Pattern = pattern; 899 900 let Inst{6-10} = VD; 901 let Inst{11-15} = 0; 902 let Inst{16-20} = VB; 903 let Inst{21-31} = xo; 904 } 905 906 class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr, 907 InstrItinClass itin, list<dag> pattern> 908 : I<4, OOL, IOL, asmstr, itin> { 909 bits<5> VD; 910 bits<5> IMM; 911 912 let Pattern = pattern; 913 914 let Inst{6-10} = VD; 915 let Inst{11-15} = IMM; 916 let Inst{16-20} = 0; 917 let Inst{21-31} = xo; 918 } 919 920 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. 921 class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr, 922 InstrItinClass itin, list<dag> pattern> 923 : I<4, OOL, IOL, asmstr, itin> { 924 bits<5> VD; 925 926 let Pattern = pattern; 927 928 let Inst{6-10} = VD; 929 let Inst{11-15} = 0; 930 let Inst{16-20} = 0; 931 let Inst{21-31} = xo; 932 } 933 934 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. 935 class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr, 936 InstrItinClass itin, list<dag> pattern> 937 : I<4, OOL, IOL, asmstr, itin> { 938 bits<5> VB; 939 940 let Pattern = pattern; 941 942 let Inst{6-10} = 0; 943 let Inst{11-15} = 0; 944 let Inst{16-20} = VB; 945 let Inst{21-31} = xo; 946 } 947 948 // E-4 VXR-Form 949 class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr, 950 InstrItinClass itin, list<dag> pattern> 951 : I<4, OOL, IOL, asmstr, itin> { 952 bits<5> VD; 953 bits<5> VA; 954 bits<5> VB; 955 bit RC = 0; 956 957 let Pattern = pattern; 958 959 let Inst{6-10} = VD; 960 let Inst{11-15} = VA; 961 let Inst{16-20} = VB; 962 let Inst{21} = RC; 963 let Inst{22-31} = xo; 964 } 965 966 //===----------------------------------------------------------------------===// 967 class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> 968 : I<0, OOL, IOL, asmstr, NoItinerary> { 969 let PPC64 = 0; 970 let Pattern = pattern; 971 let Inst{31-0} = 0; 972 } 973
