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      1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the SplitAnalysis class as well as mutator functions for
     11 // live range splitting.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #define DEBUG_TYPE "regalloc"
     16 #include "SplitKit.h"
     17 #include "llvm/ADT/Statistic.h"
     18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
     19 #include "llvm/CodeGen/LiveRangeEdit.h"
     20 #include "llvm/CodeGen/MachineDominators.h"
     21 #include "llvm/CodeGen/MachineInstrBuilder.h"
     22 #include "llvm/CodeGen/MachineLoopInfo.h"
     23 #include "llvm/CodeGen/MachineRegisterInfo.h"
     24 #include "llvm/CodeGen/VirtRegMap.h"
     25 #include "llvm/Support/Debug.h"
     26 #include "llvm/Support/raw_ostream.h"
     27 #include "llvm/Target/TargetInstrInfo.h"
     28 #include "llvm/Target/TargetMachine.h"
     29 
     30 using namespace llvm;
     31 
     32 STATISTIC(NumFinished, "Number of splits finished");
     33 STATISTIC(NumSimple,   "Number of splits that were simple");
     34 STATISTIC(NumCopies,   "Number of copies inserted for splitting");
     35 STATISTIC(NumRemats,   "Number of rematerialized defs for splitting");
     36 STATISTIC(NumRepairs,  "Number of invalid live ranges repaired");
     37 
     38 //===----------------------------------------------------------------------===//
     39 //                                 Split Analysis
     40 //===----------------------------------------------------------------------===//
     41 
     42 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
     43                              const LiveIntervals &lis,
     44                              const MachineLoopInfo &mli)
     45   : MF(vrm.getMachineFunction()),
     46     VRM(vrm),
     47     LIS(lis),
     48     Loops(mli),
     49     TII(*MF.getTarget().getInstrInfo()),
     50     CurLI(0),
     51     LastSplitPoint(MF.getNumBlockIDs()) {}
     52 
     53 void SplitAnalysis::clear() {
     54   UseSlots.clear();
     55   UseBlocks.clear();
     56   ThroughBlocks.clear();
     57   CurLI = 0;
     58   DidRepairRange = false;
     59 }
     60 
     61 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
     62   const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
     63   const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
     64   std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
     65   SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB);
     66 
     67   // Compute split points on the first call. The pair is independent of the
     68   // current live interval.
     69   if (!LSP.first.isValid()) {
     70     MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
     71     if (FirstTerm == MBB->end())
     72       LSP.first = MBBEnd;
     73     else
     74       LSP.first = LIS.getInstructionIndex(FirstTerm);
     75 
     76     // If there is a landing pad successor, also find the call instruction.
     77     if (!LPad)
     78       return LSP.first;
     79     // There may not be a call instruction (?) in which case we ignore LPad.
     80     LSP.second = LSP.first;
     81     for (MachineBasicBlock::const_iterator I = MBB->end(), E = MBB->begin();
     82          I != E;) {
     83       --I;
     84       if (I->isCall()) {
     85         LSP.second = LIS.getInstructionIndex(I);
     86         break;
     87       }
     88     }
     89   }
     90 
     91   // If CurLI is live into a landing pad successor, move the last split point
     92   // back to the call that may throw.
     93   if (!LPad || !LSP.second || !LIS.isLiveInToMBB(*CurLI, LPad))
     94     return LSP.first;
     95 
     96   // Find the value leaving MBB.
     97   const VNInfo *VNI = CurLI->getVNInfoBefore(MBBEnd);
     98   if (!VNI)
     99     return LSP.first;
    100 
    101   // If the value leaving MBB was defined after the call in MBB, it can't
    102   // really be live-in to the landing pad.  This can happen if the landing pad
    103   // has a PHI, and this register is undef on the exceptional edge.
    104   // <rdar://problem/10664933>
    105   if (!SlotIndex::isEarlierInstr(VNI->def, LSP.second) && VNI->def < MBBEnd)
    106     return LSP.first;
    107 
    108   // Value is properly live-in to the landing pad.
    109   // Only allow splits before the call.
    110   return LSP.second;
    111 }
    112 
    113 MachineBasicBlock::iterator
    114 SplitAnalysis::getLastSplitPointIter(MachineBasicBlock *MBB) {
    115   SlotIndex LSP = getLastSplitPoint(MBB->getNumber());
    116   if (LSP == LIS.getMBBEndIdx(MBB))
    117     return MBB->end();
    118   return LIS.getInstructionFromIndex(LSP);
    119 }
    120 
    121 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
    122 void SplitAnalysis::analyzeUses() {
    123   assert(UseSlots.empty() && "Call clear first");
    124 
    125   // First get all the defs from the interval values. This provides the correct
    126   // slots for early clobbers.
    127   for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
    128        E = CurLI->vni_end(); I != E; ++I)
    129     if (!(*I)->isPHIDef() && !(*I)->isUnused())
    130       UseSlots.push_back((*I)->def);
    131 
    132   // Get use slots form the use-def chain.
    133   const MachineRegisterInfo &MRI = MF.getRegInfo();
    134   for (MachineRegisterInfo::use_nodbg_iterator
    135        I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
    136        ++I)
    137     if (!I.getOperand().isUndef())
    138       UseSlots.push_back(LIS.getInstructionIndex(&*I).getRegSlot());
    139 
    140   array_pod_sort(UseSlots.begin(), UseSlots.end());
    141 
    142   // Remove duplicates, keeping the smaller slot for each instruction.
    143   // That is what we want for early clobbers.
    144   UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
    145                              SlotIndex::isSameInstr),
    146                  UseSlots.end());
    147 
    148   // Compute per-live block info.
    149   if (!calcLiveBlockInfo()) {
    150     // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
    151     // I am looking at you, RegisterCoalescer!
    152     DidRepairRange = true;
    153     ++NumRepairs;
    154     DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
    155     const_cast<LiveIntervals&>(LIS)
    156       .shrinkToUses(const_cast<LiveInterval*>(CurLI));
    157     UseBlocks.clear();
    158     ThroughBlocks.clear();
    159     bool fixed = calcLiveBlockInfo();
    160     (void)fixed;
    161     assert(fixed && "Couldn't fix broken live interval");
    162   }
    163 
    164   DEBUG(dbgs() << "Analyze counted "
    165                << UseSlots.size() << " instrs in "
    166                << UseBlocks.size() << " blocks, through "
    167                << NumThroughBlocks << " blocks.\n");
    168 }
    169 
    170 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
    171 /// where CurLI is live.
    172 bool SplitAnalysis::calcLiveBlockInfo() {
    173   ThroughBlocks.resize(MF.getNumBlockIDs());
    174   NumThroughBlocks = NumGapBlocks = 0;
    175   if (CurLI->empty())
    176     return true;
    177 
    178   LiveInterval::const_iterator LVI = CurLI->begin();
    179   LiveInterval::const_iterator LVE = CurLI->end();
    180 
    181   SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
    182   UseI = UseSlots.begin();
    183   UseE = UseSlots.end();
    184 
    185   // Loop over basic blocks where CurLI is live.
    186   MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
    187   for (;;) {
    188     BlockInfo BI;
    189     BI.MBB = MFI;
    190     SlotIndex Start, Stop;
    191     tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
    192 
    193     // If the block contains no uses, the range must be live through. At one
    194     // point, RegisterCoalescer could create dangling ranges that ended
    195     // mid-block.
    196     if (UseI == UseE || *UseI >= Stop) {
    197       ++NumThroughBlocks;
    198       ThroughBlocks.set(BI.MBB->getNumber());
    199       // The range shouldn't end mid-block if there are no uses. This shouldn't
    200       // happen.
    201       if (LVI->end < Stop)
    202         return false;
    203     } else {
    204       // This block has uses. Find the first and last uses in the block.
    205       BI.FirstInstr = *UseI;
    206       assert(BI.FirstInstr >= Start);
    207       do ++UseI;
    208       while (UseI != UseE && *UseI < Stop);
    209       BI.LastInstr = UseI[-1];
    210       assert(BI.LastInstr < Stop);
    211 
    212       // LVI is the first live segment overlapping MBB.
    213       BI.LiveIn = LVI->start <= Start;
    214 
    215       // When not live in, the first use should be a def.
    216       if (!BI.LiveIn) {
    217         assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
    218         assert(LVI->start == BI.FirstInstr && "First instr should be a def");
    219         BI.FirstDef = BI.FirstInstr;
    220       }
    221 
    222       // Look for gaps in the live range.
    223       BI.LiveOut = true;
    224       while (LVI->end < Stop) {
    225         SlotIndex LastStop = LVI->end;
    226         if (++LVI == LVE || LVI->start >= Stop) {
    227           BI.LiveOut = false;
    228           BI.LastInstr = LastStop;
    229           break;
    230         }
    231 
    232         if (LastStop < LVI->start) {
    233           // There is a gap in the live range. Create duplicate entries for the
    234           // live-in snippet and the live-out snippet.
    235           ++NumGapBlocks;
    236 
    237           // Push the Live-in part.
    238           BI.LiveOut = false;
    239           UseBlocks.push_back(BI);
    240           UseBlocks.back().LastInstr = LastStop;
    241 
    242           // Set up BI for the live-out part.
    243           BI.LiveIn = false;
    244           BI.LiveOut = true;
    245           BI.FirstInstr = BI.FirstDef = LVI->start;
    246         }
    247 
    248         // A LiveRange that starts in the middle of the block must be a def.
    249         assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
    250         if (!BI.FirstDef)
    251           BI.FirstDef = LVI->start;
    252       }
    253 
    254       UseBlocks.push_back(BI);
    255 
    256       // LVI is now at LVE or LVI->end >= Stop.
    257       if (LVI == LVE)
    258         break;
    259     }
    260 
    261     // Live segment ends exactly at Stop. Move to the next segment.
    262     if (LVI->end == Stop && ++LVI == LVE)
    263       break;
    264 
    265     // Pick the next basic block.
    266     if (LVI->start < Stop)
    267       ++MFI;
    268     else
    269       MFI = LIS.getMBBFromIndex(LVI->start);
    270   }
    271 
    272   assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count");
    273   return true;
    274 }
    275 
    276 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
    277   if (cli->empty())
    278     return 0;
    279   LiveInterval *li = const_cast<LiveInterval*>(cli);
    280   LiveInterval::iterator LVI = li->begin();
    281   LiveInterval::iterator LVE = li->end();
    282   unsigned Count = 0;
    283 
    284   // Loop over basic blocks where li is live.
    285   MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
    286   SlotIndex Stop = LIS.getMBBEndIdx(MFI);
    287   for (;;) {
    288     ++Count;
    289     LVI = li->advanceTo(LVI, Stop);
    290     if (LVI == LVE)
    291       return Count;
    292     do {
    293       ++MFI;
    294       Stop = LIS.getMBBEndIdx(MFI);
    295     } while (Stop <= LVI->start);
    296   }
    297 }
    298 
    299 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
    300   unsigned OrigReg = VRM.getOriginal(CurLI->reg);
    301   const LiveInterval &Orig = LIS.getInterval(OrigReg);
    302   assert(!Orig.empty() && "Splitting empty interval?");
    303   LiveInterval::const_iterator I = Orig.find(Idx);
    304 
    305   // Range containing Idx should begin at Idx.
    306   if (I != Orig.end() && I->start <= Idx)
    307     return I->start == Idx;
    308 
    309   // Range does not contain Idx, previous must end at Idx.
    310   return I != Orig.begin() && (--I)->end == Idx;
    311 }
    312 
    313 void SplitAnalysis::analyze(const LiveInterval *li) {
    314   clear();
    315   CurLI = li;
    316   analyzeUses();
    317 }
    318 
    319 
    320 //===----------------------------------------------------------------------===//
    321 //                               Split Editor
    322 //===----------------------------------------------------------------------===//
    323 
    324 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
    325 SplitEditor::SplitEditor(SplitAnalysis &sa,
    326                          LiveIntervals &lis,
    327                          VirtRegMap &vrm,
    328                          MachineDominatorTree &mdt)
    329   : SA(sa), LIS(lis), VRM(vrm),
    330     MRI(vrm.getMachineFunction().getRegInfo()),
    331     MDT(mdt),
    332     TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
    333     TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
    334     Edit(0),
    335     OpenIdx(0),
    336     SpillMode(SM_Partition),
    337     RegAssign(Allocator)
    338 {}
    339 
    340 void SplitEditor::reset(LiveRangeEdit &LRE, ComplementSpillMode SM) {
    341   Edit = &LRE;
    342   SpillMode = SM;
    343   OpenIdx = 0;
    344   RegAssign.clear();
    345   Values.clear();
    346 
    347   // Reset the LiveRangeCalc instances needed for this spill mode.
    348   LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT,
    349                   &LIS.getVNInfoAllocator());
    350   if (SpillMode)
    351     LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT,
    352                     &LIS.getVNInfoAllocator());
    353 
    354   // We don't need an AliasAnalysis since we will only be performing
    355   // cheap-as-a-copy remats anyway.
    356   Edit->anyRematerializable(0);
    357 }
    358 
    359 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
    360 void SplitEditor::dump() const {
    361   if (RegAssign.empty()) {
    362     dbgs() << " empty\n";
    363     return;
    364   }
    365 
    366   for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
    367     dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
    368   dbgs() << '\n';
    369 }
    370 #endif
    371 
    372 VNInfo *SplitEditor::defValue(unsigned RegIdx,
    373                               const VNInfo *ParentVNI,
    374                               SlotIndex Idx) {
    375   assert(ParentVNI && "Mapping  NULL value");
    376   assert(Idx.isValid() && "Invalid SlotIndex");
    377   assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
    378   LiveInterval *LI = Edit->get(RegIdx);
    379 
    380   // Create a new value.
    381   VNInfo *VNI = LI->getNextValue(Idx, LIS.getVNInfoAllocator());
    382 
    383   // Use insert for lookup, so we can add missing values with a second lookup.
    384   std::pair<ValueMap::iterator, bool> InsP =
    385     Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
    386                                  ValueForcePair(VNI, false)));
    387 
    388   // This was the first time (RegIdx, ParentVNI) was mapped.
    389   // Keep it as a simple def without any liveness.
    390   if (InsP.second)
    391     return VNI;
    392 
    393   // If the previous value was a simple mapping, add liveness for it now.
    394   if (VNInfo *OldVNI = InsP.first->second.getPointer()) {
    395     SlotIndex Def = OldVNI->def;
    396     LI->addRange(LiveRange(Def, Def.getDeadSlot(), OldVNI));
    397     // No longer a simple mapping.  Switch to a complex, non-forced mapping.
    398     InsP.first->second = ValueForcePair();
    399   }
    400 
    401   // This is a complex mapping, add liveness for VNI
    402   SlotIndex Def = VNI->def;
    403   LI->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
    404 
    405   return VNI;
    406 }
    407 
    408 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
    409   assert(ParentVNI && "Mapping  NULL value");
    410   ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
    411   VNInfo *VNI = VFP.getPointer();
    412 
    413   // ParentVNI was either unmapped or already complex mapped. Either way, just
    414   // set the force bit.
    415   if (!VNI) {
    416     VFP.setInt(true);
    417     return;
    418   }
    419 
    420   // This was previously a single mapping. Make sure the old def is represented
    421   // by a trivial live range.
    422   SlotIndex Def = VNI->def;
    423   Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
    424   // Mark as complex mapped, forced.
    425   VFP = ValueForcePair(0, true);
    426 }
    427 
    428 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
    429                                    VNInfo *ParentVNI,
    430                                    SlotIndex UseIdx,
    431                                    MachineBasicBlock &MBB,
    432                                    MachineBasicBlock::iterator I) {
    433   MachineInstr *CopyMI = 0;
    434   SlotIndex Def;
    435   LiveInterval *LI = Edit->get(RegIdx);
    436 
    437   // We may be trying to avoid interference that ends at a deleted instruction,
    438   // so always begin RegIdx 0 early and all others late.
    439   bool Late = RegIdx != 0;
    440 
    441   // Attempt cheap-as-a-copy rematerialization.
    442   LiveRangeEdit::Remat RM(ParentVNI);
    443   if (Edit->canRematerializeAt(RM, UseIdx, true)) {
    444     Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, TRI, Late);
    445     ++NumRemats;
    446   } else {
    447     // Can't remat, just insert a copy from parent.
    448     CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
    449                .addReg(Edit->getReg());
    450     Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
    451             .getRegSlot();
    452     ++NumCopies;
    453   }
    454 
    455   // Define the value in Reg.
    456   return defValue(RegIdx, ParentVNI, Def);
    457 }
    458 
    459 /// Create a new virtual register and live interval.
    460 unsigned SplitEditor::openIntv() {
    461   // Create the complement as index 0.
    462   if (Edit->empty())
    463     Edit->create();
    464 
    465   // Create the open interval.
    466   OpenIdx = Edit->size();
    467   Edit->create();
    468   return OpenIdx;
    469 }
    470 
    471 void SplitEditor::selectIntv(unsigned Idx) {
    472   assert(Idx != 0 && "Cannot select the complement interval");
    473   assert(Idx < Edit->size() && "Can only select previously opened interval");
    474   DEBUG(dbgs() << "    selectIntv " << OpenIdx << " -> " << Idx << '\n');
    475   OpenIdx = Idx;
    476 }
    477 
    478 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
    479   assert(OpenIdx && "openIntv not called before enterIntvBefore");
    480   DEBUG(dbgs() << "    enterIntvBefore " << Idx);
    481   Idx = Idx.getBaseIndex();
    482   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
    483   if (!ParentVNI) {
    484     DEBUG(dbgs() << ": not live\n");
    485     return Idx;
    486   }
    487   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
    488   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
    489   assert(MI && "enterIntvBefore called with invalid index");
    490 
    491   VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
    492   return VNI->def;
    493 }
    494 
    495 SlotIndex SplitEditor::enterIntvAfter(SlotIndex Idx) {
    496   assert(OpenIdx && "openIntv not called before enterIntvAfter");
    497   DEBUG(dbgs() << "    enterIntvAfter " << Idx);
    498   Idx = Idx.getBoundaryIndex();
    499   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
    500   if (!ParentVNI) {
    501     DEBUG(dbgs() << ": not live\n");
    502     return Idx;
    503   }
    504   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
    505   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
    506   assert(MI && "enterIntvAfter called with invalid index");
    507 
    508   VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(),
    509                               llvm::next(MachineBasicBlock::iterator(MI)));
    510   return VNI->def;
    511 }
    512 
    513 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
    514   assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
    515   SlotIndex End = LIS.getMBBEndIdx(&MBB);
    516   SlotIndex Last = End.getPrevSlot();
    517   DEBUG(dbgs() << "    enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
    518   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
    519   if (!ParentVNI) {
    520     DEBUG(dbgs() << ": not live\n");
    521     return End;
    522   }
    523   DEBUG(dbgs() << ": valno " << ParentVNI->id);
    524   VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
    525                               SA.getLastSplitPointIter(&MBB));
    526   RegAssign.insert(VNI->def, End, OpenIdx);
    527   DEBUG(dump());
    528   return VNI->def;
    529 }
    530 
    531 /// useIntv - indicate that all instructions in MBB should use OpenLI.
    532 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
    533   useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
    534 }
    535 
    536 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
    537   assert(OpenIdx && "openIntv not called before useIntv");
    538   DEBUG(dbgs() << "    useIntv [" << Start << ';' << End << "):");
    539   RegAssign.insert(Start, End, OpenIdx);
    540   DEBUG(dump());
    541 }
    542 
    543 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
    544   assert(OpenIdx && "openIntv not called before leaveIntvAfter");
    545   DEBUG(dbgs() << "    leaveIntvAfter " << Idx);
    546 
    547   // The interval must be live beyond the instruction at Idx.
    548   SlotIndex Boundary = Idx.getBoundaryIndex();
    549   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Boundary);
    550   if (!ParentVNI) {
    551     DEBUG(dbgs() << ": not live\n");
    552     return Boundary.getNextSlot();
    553   }
    554   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
    555   MachineInstr *MI = LIS.getInstructionFromIndex(Boundary);
    556   assert(MI && "No instruction at index");
    557 
    558   // In spill mode, make live ranges as short as possible by inserting the copy
    559   // before MI.  This is only possible if that instruction doesn't redefine the
    560   // value.  The inserted COPY is not a kill, and we don't need to recompute
    561   // the source live range.  The spiller also won't try to hoist this copy.
    562   if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) &&
    563       MI->readsVirtualRegister(Edit->getReg())) {
    564     forceRecompute(0, ParentVNI);
    565     defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
    566     return Idx;
    567   }
    568 
    569   VNInfo *VNI = defFromParent(0, ParentVNI, Boundary, *MI->getParent(),
    570                               llvm::next(MachineBasicBlock::iterator(MI)));
    571   return VNI->def;
    572 }
    573 
    574 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
    575   assert(OpenIdx && "openIntv not called before leaveIntvBefore");
    576   DEBUG(dbgs() << "    leaveIntvBefore " << Idx);
    577 
    578   // The interval must be live into the instruction at Idx.
    579   Idx = Idx.getBaseIndex();
    580   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
    581   if (!ParentVNI) {
    582     DEBUG(dbgs() << ": not live\n");
    583     return Idx.getNextSlot();
    584   }
    585   DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
    586 
    587   MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
    588   assert(MI && "No instruction at index");
    589   VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
    590   return VNI->def;
    591 }
    592 
    593 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
    594   assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
    595   SlotIndex Start = LIS.getMBBStartIdx(&MBB);
    596   DEBUG(dbgs() << "    leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
    597 
    598   VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
    599   if (!ParentVNI) {
    600     DEBUG(dbgs() << ": not live\n");
    601     return Start;
    602   }
    603 
    604   VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
    605                               MBB.SkipPHIsAndLabels(MBB.begin()));
    606   RegAssign.insert(Start, VNI->def, OpenIdx);
    607   DEBUG(dump());
    608   return VNI->def;
    609 }
    610 
    611 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
    612   assert(OpenIdx && "openIntv not called before overlapIntv");
    613   const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
    614   assert(ParentVNI == Edit->getParent().getVNInfoBefore(End) &&
    615          "Parent changes value in extended range");
    616   assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
    617          "Range cannot span basic blocks");
    618 
    619   // The complement interval will be extended as needed by LRCalc.extend().
    620   if (ParentVNI)
    621     forceRecompute(0, ParentVNI);
    622   DEBUG(dbgs() << "    overlapIntv [" << Start << ';' << End << "):");
    623   RegAssign.insert(Start, End, OpenIdx);
    624   DEBUG(dump());
    625 }
    626 
    627 //===----------------------------------------------------------------------===//
    628 //                                  Spill modes
    629 //===----------------------------------------------------------------------===//
    630 
    631 void SplitEditor::removeBackCopies(SmallVectorImpl<VNInfo*> &Copies) {
    632   LiveInterval *LI = Edit->get(0);
    633   DEBUG(dbgs() << "Removing " << Copies.size() << " back-copies.\n");
    634   RegAssignMap::iterator AssignI;
    635   AssignI.setMap(RegAssign);
    636 
    637   for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
    638     VNInfo *VNI = Copies[i];
    639     SlotIndex Def = VNI->def;
    640     MachineInstr *MI = LIS.getInstructionFromIndex(Def);
    641     assert(MI && "No instruction for back-copy");
    642 
    643     MachineBasicBlock *MBB = MI->getParent();
    644     MachineBasicBlock::iterator MBBI(MI);
    645     bool AtBegin;
    646     do AtBegin = MBBI == MBB->begin();
    647     while (!AtBegin && (--MBBI)->isDebugValue());
    648 
    649     DEBUG(dbgs() << "Removing " << Def << '\t' << *MI);
    650     LI->removeValNo(VNI);
    651     LIS.RemoveMachineInstrFromMaps(MI);
    652     MI->eraseFromParent();
    653 
    654     // Adjust RegAssign if a register assignment is killed at VNI->def.  We
    655     // want to avoid calculating the live range of the source register if
    656     // possible.
    657     AssignI.find(Def.getPrevSlot());
    658     if (!AssignI.valid() || AssignI.start() >= Def)
    659       continue;
    660     // If MI doesn't kill the assigned register, just leave it.
    661     if (AssignI.stop() != Def)
    662       continue;
    663     unsigned RegIdx = AssignI.value();
    664     if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) {
    665       DEBUG(dbgs() << "  cannot find simple kill of RegIdx " << RegIdx << '\n');
    666       forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
    667     } else {
    668       SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot();
    669       DEBUG(dbgs() << "  move kill to " << Kill << '\t' << *MBBI);
    670       AssignI.setStop(Kill);
    671     }
    672   }
    673 }
    674 
    675 MachineBasicBlock*
    676 SplitEditor::findShallowDominator(MachineBasicBlock *MBB,
    677                                   MachineBasicBlock *DefMBB) {
    678   if (MBB == DefMBB)
    679     return MBB;
    680   assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def.");
    681 
    682   const MachineLoopInfo &Loops = SA.Loops;
    683   const MachineLoop *DefLoop = Loops.getLoopFor(DefMBB);
    684   MachineDomTreeNode *DefDomNode = MDT[DefMBB];
    685 
    686   // Best candidate so far.
    687   MachineBasicBlock *BestMBB = MBB;
    688   unsigned BestDepth = UINT_MAX;
    689 
    690   for (;;) {
    691     const MachineLoop *Loop = Loops.getLoopFor(MBB);
    692 
    693     // MBB isn't in a loop, it doesn't get any better.  All dominators have a
    694     // higher frequency by definition.
    695     if (!Loop) {
    696       DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
    697                    << MBB->getNumber() << " at depth 0\n");
    698       return MBB;
    699     }
    700 
    701     // We'll never be able to exit the DefLoop.
    702     if (Loop == DefLoop) {
    703       DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
    704                    << MBB->getNumber() << " in the same loop\n");
    705       return MBB;
    706     }
    707 
    708     // Least busy dominator seen so far.
    709     unsigned Depth = Loop->getLoopDepth();
    710     if (Depth < BestDepth) {
    711       BestMBB = MBB;
    712       BestDepth = Depth;
    713       DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
    714                    << MBB->getNumber() << " at depth " << Depth << '\n');
    715     }
    716 
    717     // Leave loop by going to the immediate dominator of the loop header.
    718     // This is a bigger stride than simply walking up the dominator tree.
    719     MachineDomTreeNode *IDom = MDT[Loop->getHeader()]->getIDom();
    720 
    721     // Too far up the dominator tree?
    722     if (!IDom || !MDT.dominates(DefDomNode, IDom))
    723       return BestMBB;
    724 
    725     MBB = IDom->getBlock();
    726   }
    727 }
    728 
    729 void SplitEditor::hoistCopiesForSize() {
    730   // Get the complement interval, always RegIdx 0.
    731   LiveInterval *LI = Edit->get(0);
    732   LiveInterval *Parent = &Edit->getParent();
    733 
    734   // Track the nearest common dominator for all back-copies for each ParentVNI,
    735   // indexed by ParentVNI->id.
    736   typedef std::pair<MachineBasicBlock*, SlotIndex> DomPair;
    737   SmallVector<DomPair, 8> NearestDom(Parent->getNumValNums());
    738 
    739   // Find the nearest common dominator for parent values with multiple
    740   // back-copies.  If a single back-copy dominates, put it in DomPair.second.
    741   for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end();
    742        VI != VE; ++VI) {
    743     VNInfo *VNI = *VI;
    744     if (VNI->isUnused())
    745       continue;
    746     VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
    747     assert(ParentVNI && "Parent not live at complement def");
    748 
    749     // Don't hoist remats.  The complement is probably going to disappear
    750     // completely anyway.
    751     if (Edit->didRematerialize(ParentVNI))
    752       continue;
    753 
    754     MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def);
    755     DomPair &Dom = NearestDom[ParentVNI->id];
    756 
    757     // Keep directly defined parent values.  This is either a PHI or an
    758     // instruction in the complement range.  All other copies of ParentVNI
    759     // should be eliminated.
    760     if (VNI->def == ParentVNI->def) {
    761       DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n');
    762       Dom = DomPair(ValMBB, VNI->def);
    763       continue;
    764     }
    765     // Skip the singly mapped values.  There is nothing to gain from hoisting a
    766     // single back-copy.
    767     if (Values.lookup(std::make_pair(0, ParentVNI->id)).getPointer()) {
    768       DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n');
    769       continue;
    770     }
    771 
    772     if (!Dom.first) {
    773       // First time we see ParentVNI.  VNI dominates itself.
    774       Dom = DomPair(ValMBB, VNI->def);
    775     } else if (Dom.first == ValMBB) {
    776       // Two defs in the same block.  Pick the earlier def.
    777       if (!Dom.second.isValid() || VNI->def < Dom.second)
    778         Dom.second = VNI->def;
    779     } else {
    780       // Different basic blocks. Check if one dominates.
    781       MachineBasicBlock *Near =
    782         MDT.findNearestCommonDominator(Dom.first, ValMBB);
    783       if (Near == ValMBB)
    784         // Def ValMBB dominates.
    785         Dom = DomPair(ValMBB, VNI->def);
    786       else if (Near != Dom.first)
    787         // None dominate. Hoist to common dominator, need new def.
    788         Dom = DomPair(Near, SlotIndex());
    789     }
    790 
    791     DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def
    792                  << " for parent " << ParentVNI->id << '@' << ParentVNI->def
    793                  << " hoist to BB#" << Dom.first->getNumber() << ' '
    794                  << Dom.second << '\n');
    795   }
    796 
    797   // Insert the hoisted copies.
    798   for (unsigned i = 0, e = Parent->getNumValNums(); i != e; ++i) {
    799     DomPair &Dom = NearestDom[i];
    800     if (!Dom.first || Dom.second.isValid())
    801       continue;
    802     // This value needs a hoisted copy inserted at the end of Dom.first.
    803     VNInfo *ParentVNI = Parent->getValNumInfo(i);
    804     MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def);
    805     // Get a less loopy dominator than Dom.first.
    806     Dom.first = findShallowDominator(Dom.first, DefMBB);
    807     SlotIndex Last = LIS.getMBBEndIdx(Dom.first).getPrevSlot();
    808     Dom.second =
    809       defFromParent(0, ParentVNI, Last, *Dom.first,
    810                     SA.getLastSplitPointIter(Dom.first))->def;
    811   }
    812 
    813   // Remove redundant back-copies that are now known to be dominated by another
    814   // def with the same value.
    815   SmallVector<VNInfo*, 8> BackCopies;
    816   for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end();
    817        VI != VE; ++VI) {
    818     VNInfo *VNI = *VI;
    819     if (VNI->isUnused())
    820       continue;
    821     VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
    822     const DomPair &Dom = NearestDom[ParentVNI->id];
    823     if (!Dom.first || Dom.second == VNI->def)
    824       continue;
    825     BackCopies.push_back(VNI);
    826     forceRecompute(0, ParentVNI);
    827   }
    828   removeBackCopies(BackCopies);
    829 }
    830 
    831 
    832 /// transferValues - Transfer all possible values to the new live ranges.
    833 /// Values that were rematerialized are left alone, they need LRCalc.extend().
    834 bool SplitEditor::transferValues() {
    835   bool Skipped = false;
    836   RegAssignMap::const_iterator AssignI = RegAssign.begin();
    837   for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
    838          ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
    839     DEBUG(dbgs() << "  blit " << *ParentI << ':');
    840     VNInfo *ParentVNI = ParentI->valno;
    841     // RegAssign has holes where RegIdx 0 should be used.
    842     SlotIndex Start = ParentI->start;
    843     AssignI.advanceTo(Start);
    844     do {
    845       unsigned RegIdx;
    846       SlotIndex End = ParentI->end;
    847       if (!AssignI.valid()) {
    848         RegIdx = 0;
    849       } else if (AssignI.start() <= Start) {
    850         RegIdx = AssignI.value();
    851         if (AssignI.stop() < End) {
    852           End = AssignI.stop();
    853           ++AssignI;
    854         }
    855       } else {
    856         RegIdx = 0;
    857         End = std::min(End, AssignI.start());
    858       }
    859 
    860       // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
    861       DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
    862       LiveInterval *LI = Edit->get(RegIdx);
    863 
    864       // Check for a simply defined value that can be blitted directly.
    865       ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
    866       if (VNInfo *VNI = VFP.getPointer()) {
    867         DEBUG(dbgs() << ':' << VNI->id);
    868         LI->addRange(LiveRange(Start, End, VNI));
    869         Start = End;
    870         continue;
    871       }
    872 
    873       // Skip values with forced recomputation.
    874       if (VFP.getInt()) {
    875         DEBUG(dbgs() << "(recalc)");
    876         Skipped = true;
    877         Start = End;
    878         continue;
    879       }
    880 
    881       LiveRangeCalc &LRC = getLRCalc(RegIdx);
    882 
    883       // This value has multiple defs in RegIdx, but it wasn't rematerialized,
    884       // so the live range is accurate. Add live-in blocks in [Start;End) to the
    885       // LiveInBlocks.
    886       MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
    887       SlotIndex BlockStart, BlockEnd;
    888       tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
    889 
    890       // The first block may be live-in, or it may have its own def.
    891       if (Start != BlockStart) {
    892         VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
    893         assert(VNI && "Missing def for complex mapped value");
    894         DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
    895         // MBB has its own def. Is it also live-out?
    896         if (BlockEnd <= End)
    897           LRC.setLiveOutValue(MBB, VNI);
    898 
    899         // Skip to the next block for live-in.
    900         ++MBB;
    901         BlockStart = BlockEnd;
    902       }
    903 
    904       // Handle the live-in blocks covered by [Start;End).
    905       assert(Start <= BlockStart && "Expected live-in block");
    906       while (BlockStart < End) {
    907         DEBUG(dbgs() << ">BB#" << MBB->getNumber());
    908         BlockEnd = LIS.getMBBEndIdx(MBB);
    909         if (BlockStart == ParentVNI->def) {
    910           // This block has the def of a parent PHI, so it isn't live-in.
    911           assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
    912           VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
    913           assert(VNI && "Missing def for complex mapped parent PHI");
    914           if (End >= BlockEnd)
    915             LRC.setLiveOutValue(MBB, VNI); // Live-out as well.
    916         } else {
    917           // This block needs a live-in value.  The last block covered may not
    918           // be live-out.
    919           if (End < BlockEnd)
    920             LRC.addLiveInBlock(LI, MDT[MBB], End);
    921           else {
    922             // Live-through, and we don't know the value.
    923             LRC.addLiveInBlock(LI, MDT[MBB]);
    924             LRC.setLiveOutValue(MBB, 0);
    925           }
    926         }
    927         BlockStart = BlockEnd;
    928         ++MBB;
    929       }
    930       Start = End;
    931     } while (Start != ParentI->end);
    932     DEBUG(dbgs() << '\n');
    933   }
    934 
    935   LRCalc[0].calculateValues();
    936   if (SpillMode)
    937     LRCalc[1].calculateValues();
    938 
    939   return Skipped;
    940 }
    941 
    942 void SplitEditor::extendPHIKillRanges() {
    943     // Extend live ranges to be live-out for successor PHI values.
    944   for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
    945        E = Edit->getParent().vni_end(); I != E; ++I) {
    946     const VNInfo *PHIVNI = *I;
    947     if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
    948       continue;
    949     unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
    950     LiveInterval *LI = Edit->get(RegIdx);
    951     LiveRangeCalc &LRC = getLRCalc(RegIdx);
    952     MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
    953     for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
    954          PE = MBB->pred_end(); PI != PE; ++PI) {
    955       SlotIndex End = LIS.getMBBEndIdx(*PI);
    956       SlotIndex LastUse = End.getPrevSlot();
    957       // The predecessor may not have a live-out value. That is OK, like an
    958       // undef PHI operand.
    959       if (Edit->getParent().liveAt(LastUse)) {
    960         assert(RegAssign.lookup(LastUse) == RegIdx &&
    961                "Different register assignment in phi predecessor");
    962         LRC.extend(LI, End);
    963       }
    964     }
    965   }
    966 }
    967 
    968 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
    969 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
    970   for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
    971        RE = MRI.reg_end(); RI != RE;) {
    972     MachineOperand &MO = RI.getOperand();
    973     MachineInstr *MI = MO.getParent();
    974     ++RI;
    975     // LiveDebugVariables should have handled all DBG_VALUE instructions.
    976     if (MI->isDebugValue()) {
    977       DEBUG(dbgs() << "Zapping " << *MI);
    978       MO.setReg(0);
    979       continue;
    980     }
    981 
    982     // <undef> operands don't really read the register, so it doesn't matter
    983     // which register we choose.  When the use operand is tied to a def, we must
    984     // use the same register as the def, so just do that always.
    985     SlotIndex Idx = LIS.getInstructionIndex(MI);
    986     if (MO.isDef() || MO.isUndef())
    987       Idx = Idx.getRegSlot(MO.isEarlyClobber());
    988 
    989     // Rewrite to the mapped register at Idx.
    990     unsigned RegIdx = RegAssign.lookup(Idx);
    991     LiveInterval *LI = Edit->get(RegIdx);
    992     MO.setReg(LI->reg);
    993     DEBUG(dbgs() << "  rewr BB#" << MI->getParent()->getNumber() << '\t'
    994                  << Idx << ':' << RegIdx << '\t' << *MI);
    995 
    996     // Extend liveness to Idx if the instruction reads reg.
    997     if (!ExtendRanges || MO.isUndef())
    998       continue;
    999 
   1000     // Skip instructions that don't read Reg.
   1001     if (MO.isDef()) {
   1002       if (!MO.getSubReg() && !MO.isEarlyClobber())
   1003         continue;
   1004       // We may wan't to extend a live range for a partial redef, or for a use
   1005       // tied to an early clobber.
   1006       Idx = Idx.getPrevSlot();
   1007       if (!Edit->getParent().liveAt(Idx))
   1008         continue;
   1009     } else
   1010       Idx = Idx.getRegSlot(true);
   1011 
   1012     getLRCalc(RegIdx).extend(LI, Idx.getNextSlot());
   1013   }
   1014 }
   1015 
   1016 void SplitEditor::deleteRematVictims() {
   1017   SmallVector<MachineInstr*, 8> Dead;
   1018   for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
   1019     LiveInterval *LI = *I;
   1020     for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
   1021            LII != LIE; ++LII) {
   1022       // Dead defs end at the dead slot.
   1023       if (LII->end != LII->valno->def.getDeadSlot())
   1024         continue;
   1025       MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
   1026       assert(MI && "Missing instruction for dead def");
   1027       MI->addRegisterDead(LI->reg, &TRI);
   1028 
   1029       if (!MI->allDefsAreDead())
   1030         continue;
   1031 
   1032       DEBUG(dbgs() << "All defs dead: " << *MI);
   1033       Dead.push_back(MI);
   1034     }
   1035   }
   1036 
   1037   if (Dead.empty())
   1038     return;
   1039 
   1040   Edit->eliminateDeadDefs(Dead);
   1041 }
   1042 
   1043 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
   1044   ++NumFinished;
   1045 
   1046   // At this point, the live intervals in Edit contain VNInfos corresponding to
   1047   // the inserted copies.
   1048 
   1049   // Add the original defs from the parent interval.
   1050   for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
   1051          E = Edit->getParent().vni_end(); I != E; ++I) {
   1052     const VNInfo *ParentVNI = *I;
   1053     if (ParentVNI->isUnused())
   1054       continue;
   1055     unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
   1056     defValue(RegIdx, ParentVNI, ParentVNI->def);
   1057 
   1058     // Force rematted values to be recomputed everywhere.
   1059     // The new live ranges may be truncated.
   1060     if (Edit->didRematerialize(ParentVNI))
   1061       for (unsigned i = 0, e = Edit->size(); i != e; ++i)
   1062         forceRecompute(i, ParentVNI);
   1063   }
   1064 
   1065   // Hoist back-copies to the complement interval when in spill mode.
   1066   switch (SpillMode) {
   1067   case SM_Partition:
   1068     // Leave all back-copies as is.
   1069     break;
   1070   case SM_Size:
   1071     hoistCopiesForSize();
   1072     break;
   1073   case SM_Speed:
   1074     llvm_unreachable("Spill mode 'speed' not implemented yet");
   1075   }
   1076 
   1077   // Transfer the simply mapped values, check if any are skipped.
   1078   bool Skipped = transferValues();
   1079   if (Skipped)
   1080     extendPHIKillRanges();
   1081   else
   1082     ++NumSimple;
   1083 
   1084   // Rewrite virtual registers, possibly extending ranges.
   1085   rewriteAssigned(Skipped);
   1086 
   1087   // Delete defs that were rematted everywhere.
   1088   if (Skipped)
   1089     deleteRematVictims();
   1090 
   1091   // Get rid of unused values and set phi-kill flags.
   1092   for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
   1093     (*I)->RenumberValues(LIS);
   1094 
   1095   // Provide a reverse mapping from original indices to Edit ranges.
   1096   if (LRMap) {
   1097     LRMap->clear();
   1098     for (unsigned i = 0, e = Edit->size(); i != e; ++i)
   1099       LRMap->push_back(i);
   1100   }
   1101 
   1102   // Now check if any registers were separated into multiple components.
   1103   ConnectedVNInfoEqClasses ConEQ(LIS);
   1104   for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
   1105     // Don't use iterators, they are invalidated by create() below.
   1106     LiveInterval *li = Edit->get(i);
   1107     unsigned NumComp = ConEQ.Classify(li);
   1108     if (NumComp <= 1)
   1109       continue;
   1110     DEBUG(dbgs() << "  " << NumComp << " components: " << *li << '\n');
   1111     SmallVector<LiveInterval*, 8> dups;
   1112     dups.push_back(li);
   1113     for (unsigned j = 1; j != NumComp; ++j)
   1114       dups.push_back(&Edit->create());
   1115     ConEQ.Distribute(&dups[0], MRI);
   1116     // The new intervals all map back to i.
   1117     if (LRMap)
   1118       LRMap->resize(Edit->size(), i);
   1119   }
   1120 
   1121   // Calculate spill weight and allocation hints for new intervals.
   1122   Edit->calculateRegClassAndHint(VRM.getMachineFunction(), SA.Loops);
   1123 
   1124   assert(!LRMap || LRMap->size() == Edit->size());
   1125 }
   1126 
   1127 
   1128 //===----------------------------------------------------------------------===//
   1129 //                            Single Block Splitting
   1130 //===----------------------------------------------------------------------===//
   1131 
   1132 bool SplitAnalysis::shouldSplitSingleBlock(const BlockInfo &BI,
   1133                                            bool SingleInstrs) const {
   1134   // Always split for multiple instructions.
   1135   if (!BI.isOneInstr())
   1136     return true;
   1137   // Don't split for single instructions unless explicitly requested.
   1138   if (!SingleInstrs)
   1139     return false;
   1140   // Splitting a live-through range always makes progress.
   1141   if (BI.LiveIn && BI.LiveOut)
   1142     return true;
   1143   // No point in isolating a copy. It has no register class constraints.
   1144   if (LIS.getInstructionFromIndex(BI.FirstInstr)->isCopyLike())
   1145     return false;
   1146   // Finally, don't isolate an end point that was created by earlier splits.
   1147   return isOriginalEndpoint(BI.FirstInstr);
   1148 }
   1149 
   1150 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
   1151   openIntv();
   1152   SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
   1153   SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstInstr,
   1154     LastSplitPoint));
   1155   if (!BI.LiveOut || BI.LastInstr < LastSplitPoint) {
   1156     useIntv(SegStart, leaveIntvAfter(BI.LastInstr));
   1157   } else {
   1158       // The last use is after the last valid split point.
   1159     SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
   1160     useIntv(SegStart, SegStop);
   1161     overlapIntv(SegStop, BI.LastInstr);
   1162   }
   1163 }
   1164 
   1165 
   1166 //===----------------------------------------------------------------------===//
   1167 //                    Global Live Range Splitting Support
   1168 //===----------------------------------------------------------------------===//
   1169 
   1170 // These methods support a method of global live range splitting that uses a
   1171 // global algorithm to decide intervals for CFG edges. They will insert split
   1172 // points and color intervals in basic blocks while avoiding interference.
   1173 //
   1174 // Note that splitSingleBlock is also useful for blocks where both CFG edges
   1175 // are on the stack.
   1176 
   1177 void SplitEditor::splitLiveThroughBlock(unsigned MBBNum,
   1178                                         unsigned IntvIn, SlotIndex LeaveBefore,
   1179                                         unsigned IntvOut, SlotIndex EnterAfter){
   1180   SlotIndex Start, Stop;
   1181   tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum);
   1182 
   1183   DEBUG(dbgs() << "BB#" << MBBNum << " [" << Start << ';' << Stop
   1184                << ") intf " << LeaveBefore << '-' << EnterAfter
   1185                << ", live-through " << IntvIn << " -> " << IntvOut);
   1186 
   1187   assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks");
   1188 
   1189   assert((!LeaveBefore || LeaveBefore < Stop) && "Interference after block");
   1190   assert((!IntvIn || !LeaveBefore || LeaveBefore > Start) && "Impossible intf");
   1191   assert((!EnterAfter || EnterAfter >= Start) && "Interference before block");
   1192 
   1193   MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum);
   1194 
   1195   if (!IntvOut) {
   1196     DEBUG(dbgs() << ", spill on entry.\n");
   1197     //
   1198     //        <<<<<<<<<    Possible LeaveBefore interference.
   1199     //    |-----------|    Live through.
   1200     //    -____________    Spill on entry.
   1201     //
   1202     selectIntv(IntvIn);
   1203     SlotIndex Idx = leaveIntvAtTop(*MBB);
   1204     assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
   1205     (void)Idx;
   1206     return;
   1207   }
   1208 
   1209   if (!IntvIn) {
   1210     DEBUG(dbgs() << ", reload on exit.\n");
   1211     //
   1212     //    >>>>>>>          Possible EnterAfter interference.
   1213     //    |-----------|    Live through.
   1214     //    ___________--    Reload on exit.
   1215     //
   1216     selectIntv(IntvOut);
   1217     SlotIndex Idx = enterIntvAtEnd(*MBB);
   1218     assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
   1219     (void)Idx;
   1220     return;
   1221   }
   1222 
   1223   if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) {
   1224     DEBUG(dbgs() << ", straight through.\n");
   1225     //
   1226     //    |-----------|    Live through.
   1227     //    -------------    Straight through, same intv, no interference.
   1228     //
   1229     selectIntv(IntvOut);
   1230     useIntv(Start, Stop);
   1231     return;
   1232   }
   1233 
   1234   // We cannot legally insert splits after LSP.
   1235   SlotIndex LSP = SA.getLastSplitPoint(MBBNum);
   1236   assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf");
   1237 
   1238   if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter ||
   1239                   LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) {
   1240     DEBUG(dbgs() << ", switch avoiding interference.\n");
   1241     //
   1242     //    >>>>     <<<<    Non-overlapping EnterAfter/LeaveBefore interference.
   1243     //    |-----------|    Live through.
   1244     //    ------=======    Switch intervals between interference.
   1245     //
   1246     selectIntv(IntvOut);
   1247     SlotIndex Idx;
   1248     if (LeaveBefore && LeaveBefore < LSP) {
   1249       Idx = enterIntvBefore(LeaveBefore);
   1250       useIntv(Idx, Stop);
   1251     } else {
   1252       Idx = enterIntvAtEnd(*MBB);
   1253     }
   1254     selectIntv(IntvIn);
   1255     useIntv(Start, Idx);
   1256     assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
   1257     assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
   1258     return;
   1259   }
   1260 
   1261   DEBUG(dbgs() << ", create local intv for interference.\n");
   1262   //
   1263   //    >>><><><><<<<    Overlapping EnterAfter/LeaveBefore interference.
   1264   //    |-----------|    Live through.
   1265   //    ==---------==    Switch intervals before/after interference.
   1266   //
   1267   assert(LeaveBefore <= EnterAfter && "Missed case");
   1268 
   1269   selectIntv(IntvOut);
   1270   SlotIndex Idx = enterIntvAfter(EnterAfter);
   1271   useIntv(Idx, Stop);
   1272   assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
   1273 
   1274   selectIntv(IntvIn);
   1275   Idx = leaveIntvBefore(LeaveBefore);
   1276   useIntv(Start, Idx);
   1277   assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
   1278 }
   1279 
   1280 
   1281 void SplitEditor::splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
   1282                                   unsigned IntvIn, SlotIndex LeaveBefore) {
   1283   SlotIndex Start, Stop;
   1284   tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
   1285 
   1286   DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
   1287                << "), uses " << BI.FirstInstr << '-' << BI.LastInstr
   1288                << ", reg-in " << IntvIn << ", leave before " << LeaveBefore
   1289                << (BI.LiveOut ? ", stack-out" : ", killed in block"));
   1290 
   1291   assert(IntvIn && "Must have register in");
   1292   assert(BI.LiveIn && "Must be live-in");
   1293   assert((!LeaveBefore || LeaveBefore > Start) && "Bad interference");
   1294 
   1295   if (!BI.LiveOut && (!LeaveBefore || LeaveBefore >= BI.LastInstr)) {
   1296     DEBUG(dbgs() << " before interference.\n");
   1297     //
   1298     //               <<<    Interference after kill.
   1299     //     |---o---x   |    Killed in block.
   1300     //     =========        Use IntvIn everywhere.
   1301     //
   1302     selectIntv(IntvIn);
   1303     useIntv(Start, BI.LastInstr);
   1304     return;
   1305   }
   1306 
   1307   SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber());
   1308 
   1309   if (!LeaveBefore || LeaveBefore > BI.LastInstr.getBoundaryIndex()) {
   1310     //
   1311     //               <<<    Possible interference after last use.
   1312     //     |---o---o---|    Live-out on stack.
   1313     //     =========____    Leave IntvIn after last use.
   1314     //
   1315     //                 <    Interference after last use.
   1316     //     |---o---o--o|    Live-out on stack, late last use.
   1317     //     ============     Copy to stack after LSP, overlap IntvIn.
   1318     //            \_____    Stack interval is live-out.
   1319     //
   1320     if (BI.LastInstr < LSP) {
   1321       DEBUG(dbgs() << ", spill after last use before interference.\n");
   1322       selectIntv(IntvIn);
   1323       SlotIndex Idx = leaveIntvAfter(BI.LastInstr);
   1324       useIntv(Start, Idx);
   1325       assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
   1326     } else {
   1327       DEBUG(dbgs() << ", spill before last split point.\n");
   1328       selectIntv(IntvIn);
   1329       SlotIndex Idx = leaveIntvBefore(LSP);
   1330       overlapIntv(Idx, BI.LastInstr);
   1331       useIntv(Start, Idx);
   1332       assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
   1333     }
   1334     return;
   1335   }
   1336 
   1337   // The interference is overlapping somewhere we wanted to use IntvIn. That
   1338   // means we need to create a local interval that can be allocated a
   1339   // different register.
   1340   unsigned LocalIntv = openIntv();
   1341   (void)LocalIntv;
   1342   DEBUG(dbgs() << ", creating local interval " << LocalIntv << ".\n");
   1343 
   1344   if (!BI.LiveOut || BI.LastInstr < LSP) {
   1345     //
   1346     //           <<<<<<<    Interference overlapping uses.
   1347     //     |---o---o---|    Live-out on stack.
   1348     //     =====----____    Leave IntvIn before interference, then spill.
   1349     //
   1350     SlotIndex To = leaveIntvAfter(BI.LastInstr);
   1351     SlotIndex From = enterIntvBefore(LeaveBefore);
   1352     useIntv(From, To);
   1353     selectIntv(IntvIn);
   1354     useIntv(Start, From);
   1355     assert((!LeaveBefore || From <= LeaveBefore) && "Interference");
   1356     return;
   1357   }
   1358 
   1359   //           <<<<<<<    Interference overlapping uses.
   1360   //     |---o---o--o|    Live-out on stack, late last use.
   1361   //     =====-------     Copy to stack before LSP, overlap LocalIntv.
   1362   //            \_____    Stack interval is live-out.
   1363   //
   1364   SlotIndex To = leaveIntvBefore(LSP);
   1365   overlapIntv(To, BI.LastInstr);
   1366   SlotIndex From = enterIntvBefore(std::min(To, LeaveBefore));
   1367   useIntv(From, To);
   1368   selectIntv(IntvIn);
   1369   useIntv(Start, From);
   1370   assert((!LeaveBefore || From <= LeaveBefore) && "Interference");
   1371 }
   1372 
   1373 void SplitEditor::splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
   1374                                    unsigned IntvOut, SlotIndex EnterAfter) {
   1375   SlotIndex Start, Stop;
   1376   tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
   1377 
   1378   DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
   1379                << "), uses " << BI.FirstInstr << '-' << BI.LastInstr
   1380                << ", reg-out " << IntvOut << ", enter after " << EnterAfter
   1381                << (BI.LiveIn ? ", stack-in" : ", defined in block"));
   1382 
   1383   SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber());
   1384 
   1385   assert(IntvOut && "Must have register out");
   1386   assert(BI.LiveOut && "Must be live-out");
   1387   assert((!EnterAfter || EnterAfter < LSP) && "Bad interference");
   1388 
   1389   if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) {
   1390     DEBUG(dbgs() << " after interference.\n");
   1391     //
   1392     //    >>>>             Interference before def.
   1393     //    |   o---o---|    Defined in block.
   1394     //        =========    Use IntvOut everywhere.
   1395     //
   1396     selectIntv(IntvOut);
   1397     useIntv(BI.FirstInstr, Stop);
   1398     return;
   1399   }
   1400 
   1401   if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) {
   1402     DEBUG(dbgs() << ", reload after interference.\n");
   1403     //
   1404     //    >>>>             Interference before def.
   1405     //    |---o---o---|    Live-through, stack-in.
   1406     //    ____=========    Enter IntvOut before first use.
   1407     //
   1408     selectIntv(IntvOut);
   1409     SlotIndex Idx = enterIntvBefore(std::min(LSP, BI.FirstInstr));
   1410     useIntv(Idx, Stop);
   1411     assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
   1412     return;
   1413   }
   1414 
   1415   // The interference is overlapping somewhere we wanted to use IntvOut. That
   1416   // means we need to create a local interval that can be allocated a
   1417   // different register.
   1418   DEBUG(dbgs() << ", interference overlaps uses.\n");
   1419   //
   1420   //    >>>>>>>          Interference overlapping uses.
   1421   //    |---o---o---|    Live-through, stack-in.
   1422   //    ____---======    Create local interval for interference range.
   1423   //
   1424   selectIntv(IntvOut);
   1425   SlotIndex Idx = enterIntvAfter(EnterAfter);
   1426   useIntv(Idx, Stop);
   1427   assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
   1428 
   1429   openIntv();
   1430   SlotIndex From = enterIntvBefore(std::min(Idx, BI.FirstInstr));
   1431   useIntv(From, Idx);
   1432 }
   1433