| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.h | 36 MachineBasicBlock::iterator &UseMI,
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| Mips16RegisterInfo.cpp | 66 MachineBasicBlock::iterator &UseMI,
71 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
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| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 162 MachineInstr *DefMI = 0, *UseMI = 0;
176 if (UseMI && UseMI != MI)
181 UseMI = MI;
184 if (!DefMI || !UseMI)
191 LIS.getInstructionIndex(UseMI)))
195 // Assume there are stores between DefMI and UseMI.
201 << " into single use: " << *UseMI);
204 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
207 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI)
[all...] |
| RegisterScavenging.cpp | 249 /// longest after StargMII. UseMI is set to the instruction where the search
257 MachineBasicBlock::iterator &UseMI) {
315 UseMI = RestorePointMI;
354 MachineBasicBlock::iterator UseMI;
355 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
371 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
382 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI);
383 II = prior(UseMI);
389 ScavengeRestore = prior(UseMI);
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| TargetSchedule.cpp | 178 const MachineInstr *UseMI, unsigned UseOperIdx,
187 if (UseMI) {
189 TII->getOperandLatency(&InstrItins, DefMI, DefOperIdx, UseMI, UseOperIdx);
221 if (!UseMI)
225 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI);
228 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx);
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| PeepholeOptimizer.cpp | 196 MachineInstr *UseMI = &*UI;
197 if (UseMI == MI)
200 if (UseMI->isPHI()) {
226 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
229 MachineBasicBlock *UseMBB = UseMI->getParent();
232 if (!LocalMIs.count(UseMI))
272 MachineInstr *UseMI = UseMO->getParent();
273 MachineBasicBlock *UseMBB = UseMI->getParent();
284 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc()
[all...] |
| DeadMachineInstructionElim.cpp | 135 MachineInstr *UseMI = Use.getParent();
136 if (UseMI==MI)
139 UseMI->getOperand(0).setReg(0U);
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| OptimizePHIs.cpp | 144 MachineInstr *UseMI = &*I;
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
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| MachineTraceMetrics.cpp | 544 // Get the input data dependencies that must be ready before UseMI can issue.
545 // Return true if UseMI has any physreg operands.
546 static bool getDataDeps(const MachineInstr *UseMI,
550 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) {
570 static void getPHIDeps(const MachineInstr *UseMI,
577 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI");
578 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) {
579 if (UseMI->getOperand(i + 1).getMBB() == Pred) {
580 unsigned Reg = UseMI->getOperand(i).getReg()
[all...] |
| RegisterCoalescer.cpp | 629 MachineInstr *UseMI = &*UI;
630 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
635 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
674 MachineInstr *UseMI = &*UI;
676 if (UseMI->isDebugValue()) {
682 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
692 if (UseMI == CopyMI)
694 if (!UseMI->isCopy())
696 if (UseMI->getOperand(0).getReg() != IntB.reg ||
697 UseMI->getOperand(0).getSubReg()
[all...] |
| MachineSSAUpdater.cpp | 221 MachineInstr *UseMI = U.getParent();
223 if (UseMI->isPHI()) {
224 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
227 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
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| MachineLICM.cpp | [all...] |
| TailDuplication.cpp | 256 MachineInstr *UseMI = &*UI;
258 if (UseMI->isDebugValue()) {
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
333 MachineInstr *UseMI = &*UI;
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
[all...] |
| TargetInstrInfo.cpp | 656 /// Both DefMI and UseMI must be valid. By default, call directly to the
661 const MachineInstr *UseMI, unsigned UseIdx) const {
663 unsigned UseClass = UseMI->getDesc().getSchedClass();
699 /// dependent def and use when the operand indices are already known. UseMI may
712 const MachineInstr *UseMI, unsigned UseIdx,
722 if (UseMI)
723 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
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| TwoAddressInstructionPass.cpp | 456 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg);
457 if (UseMI.getParent() != MBB)
461 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) {
463 return &UseMI;
466 if (isTwoAddrUse(UseMI, Reg, DstReg)) {
468 return &UseMI;
664 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy,
666 if (IsCopy && !Processed.insert(UseMI))
669 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
[all...] |
| LiveIntervalAnalysis.cpp | 319 MachineInstr *UseMI = I.skipInstruction();) {
320 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
322 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
329 DEBUG(dbgs() << Idx << '\t' << *UseMI
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.h | 56 MachineBasicBlock::iterator &UseMI,
|
| MLxExpansionPass.cpp | 123 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg);
124 if (UseMI->getParent() != MBB)
127 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
128 Reg = UseMI->getOperand(0).getReg();
132 UseMI = &*MRI->use_nodbg_begin(Reg);
133 if (UseMI->getParent() != MBB)
|
| ARMBaseInstrInfo.h | 217 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
226 const MachineInstr *UseMI, unsigned UseIdx) const;
279 const MachineInstr *UseMI, unsigned UseIdx) const;
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| ARMBaseInstrInfo.cpp | [all...] |
| Thumb1RegisterInfo.cpp | 508 MachineBasicBlock::iterator &UseMI,
521 // The UseMI is where we would like to restore the register. If there's
523 // before that instead and adjust the UseMI.
525 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) {
532 UseMI = II;
540 UseMI = II;
547 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
|
| /external/llvm/include/llvm/CodeGen/ |
| TargetSchedule.h | 137 /// when the operand indices are already known. UseMI may be NULL for an
144 const MachineInstr *UseMI, unsigned UseOperIdx,
|
| RegisterScavenging.h | 156 /// longest after StartMI. UseMI is set to the instruction where the search
163 MachineBasicBlock::iterator &UseMI);
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 538 MachineInstr *UseMI = Use.getParent();
540 if (MI != UseMI) {
581 MachineInstr *UseMI = Use.getParent();
582 if (UseMI==MI)
586 UseMI->getOperand(0).setReg(0U);
|
