| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 120 AArch64InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, int FrameIx,
123 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AArch64::DBG_VALUE))
386 MachineFunction &MF = *MBB.getParent();
387 MachineFrameInfo &MFI = *MF.getFrameInfo();
391 = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx),
432 MachineFunction &MF = *MBB.getParent();
433 MachineFrameInfo &MFI = *MF.getFrameInfo();
437 = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx),
469 unsigned AArch64InstrInfo::estimateRSStackLimit(MachineFunction &MF) const {
471 for (MachineFunction::iterator BB = MF.begin(),E = MF.end(); BB != E; ++BB)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 54 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
57 if (MF) {
58 const Function *F = MF->getFunction();
83 getReservedRegs(const MachineFunction &MF) const {
84 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
91 if (TFI->hasFP(MF))
93 if (hasBasePointer(MF))
134 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind)
148 MachineFunction &MF) const {
149 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering()
[all...] |
| ARMExpandPseudoInsts.cpp | [all...] |
| ARMFrameLowering.cpp | 42 bool ARMFrameLowering::hasFP(const MachineFunction &MF) const {
43 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
49 const MachineFrameInfo *MFI = MF.getFrameInfo();
51 return ((MF.getTarget().Options.DisableFramePointerElim(MF) &&
53 RegInfo->needsStackRealignment(MF) ||
63 bool ARMFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
64 const MachineFrameInfo *FFI = MF.getFrameInfo();
73 return !MF.getFrameInfo()->hasVarSizedObjects();
81 ARMFrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 91 void setUnallocatableRegs(const MachineFunction &MF);
259 MachineFunction *MF = Filler->getParent()->getParent();
263 MIBundleBuilder(I->second).append(MF->CloneMachineInstr(&*Filler));
266 I->first->insert(I->first->end(), MF->CloneMachineInstr(&*Filler));
281 const MachineFunction &MF = *MBB.getParent();
282 assert(MF.getTarget().getRegisterInfo()->getAllocatableSet(MF).test(R) &&
329 void RegDefsUses::setUnallocatableRegs(const MachineFunction &MF) {
330 BitVector AllocSet = TRI.getAllocatableSet(MF);
|
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 90 MachineFunction &MF = DAG.getMachineFunction();
91 FunctionType *FType = MF.getFunction()->getFunctionType();
92 SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
169 Reg = MF.addLiveIn(Reg, &AMDGPU::SReg_64RegClass);
176 Reg = MF.addLiveIn(Reg, RC);
190 Reg = MF.addLiveIn(Reg, RC);
|
| R600ISelLowering.cpp | 103 MachineFunction * MF = BB->getParent();
104 MachineRegisterInfo &MRI = MF->getRegInfo();
292 R600MachineFunctionInfo *MFI = MF->getInfo<R600MachineFunctionInfo>();
293 MachineInstrBuilder MIB(*MF, MI);
327 MachineFunction &MF = DAG.getMachineFunction();
328 R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
494 MachineFunction &MF = DAG.getMachineFunction();
502 unsigned Offset = TFL->getFrameIndexOffset(MF, FrameIndex);
503 return DAG.getConstant(Offset * 4 * TFL->getStackWidth(MF), MVT::i32);
744 const MachineFunction &MF = DAG.getMachineFunction()
[all...] |
| /external/smack/src/org/xbill/DNS/ |
| Type.java | 25 public static final int MF = 4;
230 types.add(MF, "MF", new MFRecord());
|
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 136 MachineFunction *MF;
231 void init(MachineFunction &mf, const TargetTransformInfo *TTI);
238 MachineFunction &getMachineFunction() const { return *MF; }
[all...] |
| SelectionDAGISel.h | 50 MachineFunction *MF;
67 virtual bool runOnMachineFunction(MachineFunction &MF);
|
| ScheduleDAG.h | 561 MachineFunction &MF; // Machine function
573 explicit ScheduleDAG(MachineFunction &mf);
|
| /external/llvm/lib/CodeGen/ |
| LiveDebugVariables.cpp | 279 MachineFunction *MF;
315 /// @param mf MachineFunction to be scanned.
317 bool collectDebugValues(MachineFunction &mf);
326 bool runOnMachineFunction(MachineFunction &mf);
378 userValues[i]->print(OS, &MF->getTarget());
461 bool LDVImpl::collectDebugValues(MachineFunction &mf) {
463 for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE;
681 userValues[i]->computeIntervals(MF->getRegInfo(), *TRI, *LIS, *MDT, UVS);
686 bool LDVImpl::runOnMachineFunction(MachineFunction &mf) {
[all...] |
| MachineBasicBlock.cpp | 38 MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
39 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
51 const MachineFunction *MF = getParent();
52 MCContext &Ctx = MF->getContext();
55 Twine(MF->getFunctionNumber()) + "_" +
65 /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
73 MachineFunction &MF = *N->getParent();
74 N->Number = MF.addToMBBNumbering(N);
77 MachineRegisterInfo &RegInfo = MF.getRegInfo();
101 MachineFunction *MF = Parent->getParent()
[all...] |
| RegAllocFast.cpp | 56 MachineFunction *MF;
208 int FrameIdx = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
314 TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
867 TII->emitFrameIndexDebugValue(*MF, SS, Offset, MDPtr, DL)) {
[all...] |
| RegAllocGreedy.cpp | 70 MachineFunction *MF;
243 virtual bool runOnMachineFunction(MachineFunction &mf);
[all...] |
| StackColoring.cpp | 88 MachineFunction *MF;
144 bool runOnMachineFunction(MachineFunction &MF);
204 for (df_iterator<MachineFunction*> FI = df_begin(MF), FE = df_end(MF);
242 for (df_iterator<MachineFunction*> FI = df_begin(MF), FE = df_end(MF);
396 for (MachineFunction::iterator MBB = MF->begin(), MBBe = MF->end();
484 MachineModuleInfo *MMI = &MF->getMMI();
513 for (BB = MF->begin(), BBE = MF->end(); BB != BBE; ++BB
[all...] |
| BranchFolding.cpp | 69 virtual bool runOnMachineFunction(MachineFunction &MF);
84 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
87 return Folder.OptimizeFunction(MF,
88 MF.getTarget().getInstrInfo(),
89 MF.getTarget().getRegisterInfo(),
110 MachineFunction *MF = MBB->getParent();
119 MF->erase(MBB);
174 bool BranchFolder::OptimizeFunction(MachineFunction &MF,
188 MachineRegisterInfo &MRI = MF.getRegInfo();
189 if (MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
[all...] |
| IfConversion.cpp | 175 virtual bool runOnMachineFunction(MachineFunction &MF);
191 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
264 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
265 TLI = MF.getTarget().getTargetLowering();
266 TII = MF.getTarget().getInstrInfo();
267 TRI = MF.getTarget().getRegisterInfo();
269 MRI = &MF.getRegInfo();
270 InstrItins = MF.getTarget().getInstrItineraryData();
279 BFChange = BF.OptimizeFunction(MF, TII,
280 MF.getTarget().getRegisterInfo()
[all...] |
| InlineSpiller.cpp | 55 MachineFunction &MF;
137 MachineFunction &mf,
139 : MF(mf),
146 MFI(*mf.getFrameInfo()),
147 MRI(mf.getRegInfo()),
148 TII(*mf.getTarget().getInstrInfo()),
149 TRI(*mf.getTarget().getRegisterInfo()) {}
189 MachineFunction &mf,
191 return new InlineSpiller(pass, mf, vrm)
[all...] |
| MachineInstr.cpp | 57 if (MachineFunction *MF = MBB->getParent()) {
58 MachineRegisterInfo &MRI = MF->getRegInfo();
99 if (MachineFunction *MF = MBB->getParent()) {
100 MachineRegisterInfo &MRI = MF->getRegInfo();
119 if (MachineFunction *MF = MBB->getParent())
120 MF->getRegInfo().removeRegOperandFromUseList(this);
135 if (MachineFunction *MF = MBB->getParent())
136 RegInfo = &MF->getRegInfo();
261 if (const MachineFunction *MF = MBB->getParent())
262 TM = &MF->getTarget()
[all...] |
| MachineVerifier.cpp | 59 bool runOnMachineFunction(MachineFunction &MF);
65 const MachineFunction *MF;
99 // Is this MBB reachable from the MF entry point?
207 void report(const char *msg, const MachineFunction *MF);
211 void report(const char *msg, const MachineFunction *MF,
246 bool runOnMachineFunction(MachineFunction &MF) {
247 MF.verify(this, Banner);
267 bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) {
285 this->MF = &MF;
[all...] |
| TwoAddressInstructionPass.cpp | 63 MachineFunction *MF;
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 101 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
158 MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT)
159 : VLIWPacketizerList(MF, MLI, MDT, true){
245 MachineFunction *MF = MI->getParent()->getParent();
246 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i),
263 MachineFunction *MF = MI->getParent()->getParent();
264 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i),
267 MF->DeleteMachineInstr(PseudoMI);
275 MachineFunction *MF = MI->getParent()->getParent();
276 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::IMMEXT_i)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 75 virtual bool runOnMachineFunction(MachineFunction &MF);
223 bool PPCCTRLoops::runOnMachineFunction(MachineFunction &MF) {
231 MRI = &MF.getRegInfo();
233 TII = MF.getTarget().getInstrInfo();
674 MachineFunction *MF = LastMBB->getParent();
675 const PPCSubtarget &Subtarget = MF->getTarget().getSubtarget<PPCSubtarget>();
686 MF->getRegInfo().getRegClass(TripCount->getReg());
687 CountReg = MF->getRegInfo().createVirtualRegister(RC);
695 CountReg = MF->getRegInfo().createVirtualRegister(RC);
708 CountReg = MF->getRegInfo().createVirtualRegister(RC)
[all...] |
| /external/clang/lib/Sema/ |
| SemaExprMember.cpp | [all...] |
