| /external/llvm/lib/IR/ |
| IRBuilder.cpp | 55 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops,
57 CallInst *CI = CallInst::Create(Callee, Ops, "");
67 Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) };
72 CallInst *CI = createCallHelper(TheFn, Ops, this);
87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) };
92 CallInst *CI = createCallHelper(TheFn, Ops, this);
111 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) };
116 CallInst *CI = createCallHelper(TheFn, Ops, this);
134 Value *Ops[] = { Size, Ptr };
137 return createCallHelper(TheFn, Ops, this)
[all...] |
| Module.cpp | 365 Value *Ops[3] = {
368 getOrInsertModuleFlagsMetadata()->addOperand(MDNode::get(Context, Ops));
|
| /external/llvm/include/llvm/IR/ |
| MDBuilder.h | 130 Value *Ops[3] = { createString(Name), Parent, Flags };
131 return MDNode::get(Context, Ops);
133 Value *Ops[2] = { createString(Name), Parent };
134 return MDNode::get(Context, Ops);
|
| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 203 SmallVector<unsigned, 8> Ops;
204 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
207 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI);
|
| IntrinsicLowering.cpp | 463 Value *Ops[3];
464 Ops[0] = CI->getArgOperand(0);
465 Ops[1] = CI->getArgOperand(1);
466 Ops[2] = Size;
467 ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getArgOperand(0)->getType());
474 Value *Ops[3];
475 Ops[0] = CI->getArgOperand(0);
476 Ops[1] = CI->getArgOperand(1);
477 Ops[2] = Size
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelDAGToDAG.cpp | 238 SDValue Ops[] = { Callee, GPReg, Chain };
240 MVT::i32, MVT::Other, Ops, 3), 0);
|
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 143 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
144 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
157 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
158 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
245 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
246 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops,
247 array_lengthof(Ops));
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 185 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
188 Ops, 3);
191 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
194 Ops, 3);
197 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
200 Ops, 4);
203 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
206 Ops, 4);
209 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
212 Ops, 4)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 138 SmallVector<SDValue, 4> Ops;
140 Ops.push_back(N->getOperand(I));
143 Ops.push_back(ExtraOper);
155 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size());
[all...] |
| LegalizeTypes.cpp | [all...] |
| LegalizeVectorOps.cpp | 147 SmallVector<SDValue, 8> Ops;
149 Ops.push_back(LegalizeOp(Node->getOperand(i)));
152 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0);
613 SmallVector<SDValue, 8> Ops(NumElem, Mask);
614 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, &Ops[0], Ops.size());
750 SmallVector<SDValue, 8> Ops(NumElems);
756 Ops[i] = DAG.getNode(ISD::SETCC, dl, TLI.getSetCCResultType(TmpEltVT),
758 Ops[i] = DAG.getNode(ISD::SELECT, dl, EltVT, Ops[i]
[all...] |
| /external/llvm/lib/DebugInfo/ |
| DWARFDebugFrame.cpp | 72 Operands Ops;
85 Instructions.back().Ops.push_back(Operand1);
90 Instructions.back().Ops.push_back(Operand1);
91 Instructions.back().Ops.push_back(Operand2);
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.cpp | 496 SmallVector<StringRef, 4> Ops;
497 if (!GenericRegPattern.match(NameLower, &Ops)) {
504 Ops[1].getAsInteger(10, Op1);
505 Ops[2].getAsInteger(10, CRn);
506 Ops[3].getAsInteger(10, CRm);
507 Ops[4].getAsInteger(10, Op2);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 262 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
270 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops, 2);
|
| MipsSEISelDAGToDAG.cpp | 210 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
214 SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, DL, VT, Ops, 2);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 340 SDValue Ops[2];
341 Ops[0] = Div;
342 Ops[1] = Rem;
343 return DAG.getMergeValues(Ops, 2, DL);
|
| R600Defines.h | 56 enum Ops {
|
| AMDILISelDAGToDAG.cpp | 240 std::vector<SDValue> Ops;
242 Ops.push_back(Use->getOperand(i));
262 // 0 for MachineInstrs, but we have no DST in the Ops vector.
278 Ops[ImmIdx] = CurDAG->getTargetConstant(ImmValue, MVT::i32);
282 Ops[Use.getOperandNo()] = CurDAG->getRegister(ImmReg, MVT::i32);
284 CurDAG->UpdateNodeOperands(*Use, Ops.data(), Use->getNumOperands());
305 std::vector<SDValue> Ops;
308 Ops.push_back(*I);
309 IsModified = FoldOperands(Result->getMachineOpcode(), TII, Ops);
311 Result = CurDAG->UpdateNodeOperands(Result, Ops.data(), Ops.size())
[all...] |
| SIISelLowering.cpp | 303 SmallVector<SDValue, 4> Ops;
304 Ops.push_back(BRCOND.getOperand(0));
306 Ops.push_back(Intr->getOperand(i));
307 Ops.push_back(Target);
312 DAG.getVTList(Res.data(), Res.size()), Ops.data(), Ops.size()).getNode();
316 SDValue Ops[] = {
320 DAG.MorphNodeTo(BR, ISD::BR, BR->getVTList(), Ops, 2);
596 std::vector<SDValue> Ops;
602 Ops.push_back(Operand)
[all...] |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolution.h | 575 const SCEV *getAddExpr(SmallVectorImpl<const SCEV *> &Ops,
579 SmallVector<const SCEV *, 2> Ops;
580 Ops.push_back(LHS);
581 Ops.push_back(RHS);
582 return getAddExpr(Ops, Flags);
586 SmallVector<const SCEV *, 3> Ops;
587 Ops.push_back(Op0);
588 Ops.push_back(Op1);
589 Ops.push_back(Op2);
590 return getAddExpr(Ops, Flags)
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 234 SDValue Ops[] = { getI32Imm(isVolatile),
241 MVT::Other, Ops, 7);
254 SDValue Ops[] = { getI32Imm(isVolatile),
261 MVT::Other, Ops, 8);
286 SDValue Ops[] = { getI32Imm(isVolatile),
293 MVT::Other, Ops, 8);
317 SDValue Ops[] = { getI32Imm(isVolatile),
324 MVT::Other, Ops, 7);
419 SDValue Ops[] = { getI32Imm(IsVolatile),
425 LD = CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops, 7)
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 680 std::vector<Value*> Ops;
686 Ops.reserve(SI->size());
695 Ops.push_back(ConstantInt::get(IdxTy, *II));
700 V = GetElementPtrInst::Create(V, Ops, V->getName()+".idx", Call);
701 Ops.clear();
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 456 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
457 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
464 SDValue Ops[] = { Chain, Reg, N, Glue };
465 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
470 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
471 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
480 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
481 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
523 SDValue Ops[] = { Chain, Op };
524 return getNode(ISD::CALLSEQ_START, DebugLoc(), VTs, Ops, 2)
[all...] |
| /external/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 101 Constant *Ops = C; // don't take the address of C!
102 return FoldBitCast(ConstantVector::get(Ops), DestTy, TD);
599 static Constant *CastGEPIndices(ArrayRef<Constant *> Ops,
607 for (unsigned i = 1, e = Ops.size(); i != e; ++i) {
609 !isa<StructType>(GetElementPtrInst::getIndexedType(Ops[0]->getType(),
610 Ops.slice(1, i-1)))) &&
611 Ops[i]->getType() != IntPtrTy) {
613 NewIdxs.push_back(ConstantExpr::getCast(CastInst::getCastOpcode(Ops[i],
617 Ops[i], IntPtrTy));
619 NewIdxs.push_back(Ops[i])
[all...] |
