| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelDAGToDAG.cpp | 129 if (isIntS32Immediate(N.getOperand(1), imm))
132 if (N.getOperand(0).getOpcode() == ISD::TargetJumpTable ||
133 N.getOperand(1).getOpcode() == ISD::TargetJumpTable)
136 Base = N.getOperand(0);
137 Index = N.getOperand(1);
155 if (isIntS32Immediate(N.getOperand(1), imm)) {
157 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
160 Base = N.getOperand(0);
226 SDValue Chain = Node->getOperand(0);
227 SDValue Callee = Node->getOperand(1)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 113 if (MI->getOperand(Op).isFI()) return true;
115 MI->getOperand(Op ).isReg() && isScale(MI->getOperand(Op+1)) &&
116 MI->getOperand(Op+2).isReg() &&
117 (MI->getOperand(Op+3).isImm() ||
118 MI->getOperand(Op+3).isGlobal() ||
119 MI->getOperand(Op+3).isCPI() ||
120 MI->getOperand(Op+3).isJTI());
124 if (MI->getOperand(Op).isFI()) return true;
126 MI->getOperand(Op+4).isReg() &
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| UnreachableBlockElim.cpp | 157 if (start->getOperand(i).isMBB() &&
158 start->getOperand(i).getMBB() == BB) {
184 if (!preds.count(phi->getOperand(i).getMBB())) {
191 unsigned Input = phi->getOperand(1).getReg();
192 unsigned Output = phi->getOperand(0).getReg();
|
| PHIElimination.cpp | 155 unsigned DefReg = DefMI->getOperand(0).getReg();
212 if (!isImplicitlyDefined(MPhi->getOperand(i).getReg(), MRI))
227 unsigned DestReg = MPhi->getOperand(0).getReg();
228 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs");
229 bool isDead = MPhi->getOperand(0).isDead();
347 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(),
348 MPhi->getOperand(i).getReg())];
354 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
355 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg();
356 bool SrcUndef = MPhi->getOperand(i*2+1).isUndef() |
[all...] |
| RegAllocFast.cpp | 227 if (&I.getOperand() != &MO)
235 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum);
301 DBG->getOperand(DBG->getNumOperands()-1).getMetadata();
303 if (DBG->getOperand(1).isImm())
304 Offset = DBG->getOperand(1).getImm();
596 Hint = UseMI.getOperand(0).getReg();
602 if (LRI->LastUse != MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse())
622 MachineOperand &MO = MI->getOperand(OpNum);
667 MachineOperand &MO = MI->getOperand(OpNum);
700 MachineOperand &MO = MI->getOperand(i)
[all...] |
| StrongPHIElimination.cpp | 243 unsigned DestReg = BBI->getOperand(0).getReg();
248 MachineOperand &SrcMO = BBI->getOperand(i);
287 unsigned DestReg = BBI->getOperand(0).getReg();
291 unsigned SrcReg = BBI->getOperand(i).getReg();
308 unsigned SrcReg = PHI->getOperand(1).getReg();
317 unsigned DestReg = PHI->getOperand(0).getReg();
322 unsigned SrcReg = PHI->getOperand(i).getReg();
355 CopyInstr->getOperand(1).setIsKill(true);
460 unsigned DestReg = PHI->getOperand(0).getReg();
466 unsigned SrcColor = getRegColor(PHI->getOperand(i).getReg())
[all...] |
| TailDuplication.cpp | 161 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
176 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
255 MachineOperand &UseMO = UI.getOperand();
282 unsigned Dst = Copy->getOperand(0).getReg();
283 unsigned Src = Copy->getOperand(1).getReg();
344 if (MI->getOperand(i+1).getMBB() == SrcBB)
361 unsigned SrcReg = MI.getOperand(i).getReg();
392 unsigned DefReg = MI->getOperand(0).getReg();
395 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
426 MachineOperand &MO = NewMI->getOperand(i)
[all...] |
| MachineCSE.cpp | 118 MachineOperand &MO = MI->getOperand(i);
131 unsigned SrcReg = DefMI->getOperand(1).getReg();
134 if (DefMI->getOperand(0).getSubReg() || DefMI->getOperand(1).getSubReg())
166 const MachineOperand &MO = I->getOperand(i);
200 const MachineOperand &MO = MI->getOperand(i);
219 const MachineOperand &MO = MI->getOperand(i);
291 const MachineOperand &MO = I->getOperand(i);
382 const MachineOperand &MO = MI->getOperand(i);
518 MachineOperand &MO = MI->getOperand(i)
[all...] |
| /external/llvm/lib/IR/ |
| Metadata.cpp | 169 if (Value *V = N->getOperand(i)) {
194 if (const Function *F = getFunctionForValue(getOperand(i)))
304 /// getOperand - Return specified operand.
305 Value *MDNode::getOperand(unsigned i) const {
316 ID.AddPointer(getOperand(i));
394 Value *V = getOperand(i);
417 T = T->getNumOperands() >= 2 ? cast_or_null<MDNode>(T->getOperand(1)) : 0;
424 T = T->getNumOperands() >= 2 ? cast_or_null<MDNode>(T->getOperand(1)) : 0;
446 APFloat AVal = cast<ConstantFP>(A->getOperand(0))->getValueAPF();
447 APFloat BVal = cast<ConstantFP>(B->getOperand(0))->getValueAPF()
[all...] |
| ConstantFold.cpp | 85 Type *SrcTy = Op->getOperand(0)->getType();
223 Constant *RHS = ExtractConstantBytes(CE->getOperand(1), ByteStart,ByteSize);
232 Constant *LHS = ExtractConstantBytes(CE->getOperand(0), ByteStart,ByteSize);
238 Constant *RHS = ExtractConstantBytes(CE->getOperand(1), ByteStart,ByteSize);
246 Constant *LHS = ExtractConstantBytes(CE->getOperand(0), ByteStart,ByteSize);
252 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1));
267 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize);
274 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1));
289 return ExtractConstantBytes(CE->getOperand(0), ByteStart-ShAmt, ByteSize);
297 cast<IntegerType>(CE->getOperand(0)->getType())->getBitWidth()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 351 if (Phi->getOperand(i+1).getMBB() != Latch)
354 unsigned PhiOpReg = Phi->getOperand(i).getReg();
362 unsigned IndReg = DI->getOperand(1).getReg();
364 unsigned UpdReg = DI->getOperand(0).getReg();
365 int64_t V = DI->getOperand(2).getImm();
471 MachineBasicBlock *MBB = IV_Phi->getOperand(i+1).getMBB();
473 InitialValue = &IV_Phi->getOperand(i);
475 IVReg = IV_Phi->getOperand(i).getReg(); // Want IV reg after bump.
523 const MachineOperand &Op1 = CondI->getOperand(1);
524 const MachineOperand &Op2 = CondI->getOperand(2)
[all...] |
| HexagonInstrInfo.cpp | 79 if (MI->getOperand(2).isFI() &&
80 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) {
81 FrameIndex = MI->getOperand(2).getIndex();
82 return MI->getOperand(0).getReg();
103 if (MI->getOperand(2).isFI() &&
104 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) {
105 FrameIndex = MI->getOperand(0).getIndex();
106 return MI->getOperand(2).getReg()
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 631 if (!isa<ConstantSDNode>(N->getOperand(1)))
636 VT, N->getOperand(0), N->getOperand(1));
639 VT, N->getOperand(0), N->getOperand(1));
642 VT, N->getOperand(0), N->getOperand(1));
645 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
650 SDValue Victim = N->getOperand(0);
780 SDValue Chain = Op.getOperand(0)
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| GlobalOpt.cpp | 220 if (SI->getOperand(0) == V) return true;
232 SI->getOperand(1))) {
233 Value *StoredVal = SI->getOperand(0);
246 cast<LoadInst>(StoredVal)->getOperand(0) == GV) {
375 V = I->getOperand(0);
453 Instruction *J = dyn_cast<Instruction>(I->getOperand(0));
508 if (!isa<ConstantExpr>(GEP->getOperand(0))) {
561 return SI->getOperand(0) != V;
567 if (GEPI->getNumOperands() < 3 || !isa<Constant>(GEPI->getOperand(1)) ||
568 !cast<Constant>(GEPI->getOperand(1))->isNullValue()
[all...] |
| /external/llvm/lib/Analysis/ |
| Lint.cpp | 469 AA->getTypeStoreSize(I.getOperand(0)->getType()),
471 I.getOperand(0)->getType(), MemRef::Write);
475 Assert1(!isa<UndefValue>(I.getOperand(0)) ||
476 !isa<UndefValue>(I.getOperand(1)),
481 Assert1(!isa<UndefValue>(I.getOperand(0)) ||
482 !isa<UndefValue>(I.getOperand(1)),
488 dyn_cast<ConstantInt>(findValue(I.getOperand(1), /*OffsetOk=*/false)))
495 dyn_cast<ConstantInt>(findValue(I.getOperand(1), /*OffsetOk=*/false)))
502 dyn_cast<ConstantInt>(findValue(I.getOperand(1), /*OffsetOk=*/false)))
518 Assert1(!isZero(I.getOperand(1), TD)
[all...] |
| ScalarEvolution.cpp | 145 const SCEV *Op = Trunc->getOperand();
152 const SCEV *Op = ZExt->getOperand();
159 const SCEV *Op = SExt->getOperand();
166 OS << "{" << *AR->getOperand(0);
168 OS << ",+," << *AR->getOperand(i);
300 const SCEVConstant *SC = dyn_cast<SCEVConstant>(Mul->getOperand(0));
390 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(VCE->getOperand(0)))
392 CE->getOperand(0)->isNullValue() &&
394 if (ConstantInt *CI = dyn_cast<ConstantInt>(CE->getOperand(1)))
396 AllocTy = cast<PointerType>(CE->getOperand(0)->getType()
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | 101 N = N->getOperand(0).getNode();
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 SDValue NotZero = N->getOperand(i);
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 N = N->getOperand(0).getNode();
156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 SDValue Zero = N->getOperand(i);
177 if (N->getOperand(i) != Zero &&
178 N->getOperand(i).getOpcode() != ISD::UNDEF
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 62 MachineOperand &MO = MI->getOperand(i);
113 assert(MI->getOperand(0).getSubReg() == 0 &&
114 MI->getOperand(1).getSubReg() == 0 &&
117 unsigned DstReg = MI->getOperand(0).getReg();
118 unsigned SrcReg = MI->getOperand(1).getReg();
142 MI->getOperand(MCID.getNumOperands() - 1).getReg() == ARM::CPSR)
|
| ARMBaseRegisterInfo.cpp | 415 InstrOffs = MI->getOperand(Idx+1).getImm();
420 const MachineOperand &OffOp = MI->getOperand(Idx+1);
429 InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm());
430 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
436 InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm());
437 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
443 InstrOffs = MI->getOperand(ImmIdx).getImm();
460 for (unsigned i = 0; !MI->getOperand(i).isFI(); ++i) {
578 while (!MI.getOperand(i).isFI()) {
599 while (!MI->getOperand(i).isFI())
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 85 BB = Inst->getOperand(NumOp-1).getMBB();
89 Cond.push_back(Inst->getOperand(i));
233 TBB = LastInst->getOperand(0).getMBB();
256 TBB = SecondLastInst->getOperand(0).getMBB();
268 FBB = LastInst->getOperand(0).getMBB();
280 const char *AsmStr = MI->getOperand(0).getSymbolName();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 620 if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 155 Cond.push_back(I->getOperand(0));
156 TBB = I->getOperand(1).getMBB();
164 Cond.push_back(I->getOperand(0));
165 Cond.push_back(I->getOperand(1));
166 TBB = I->getOperand(2).getMBB();
199 TBB = LastInst->getOperand(0).getMBB();
222 TBB = LastInst->getOperand(0).getMBB();
238 TBB = SecondLastInst->getOperand(1).getMBB();
240 Cond.push_back(SecondLastInst->getOperand(0));
241 FBB = LastInst->getOperand(0).getMBB()
[all...] |
| AArch64BranchFixupPass.cpp | 454 if (MI->getOperand(i).isMBB()) {
455 DestBB = MI->getOperand(i).getMBB();
494 A64CC::CondCodes CC = (A64CC::CondCodes)MI->getOperand(0).getImm();
496 MI->getOperand(0).setImm(CC);
514 InvertedMI.addOperand(MI->getOperand(i));
515 if (MI->getOperand(i).isMBB())
539 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
543 MachineBasicBlock *DestBB = MI->getOperand(CondBrMBBOperand).getMBB();
544 BMI->getOperand(0).setMBB(DestBB);
545 MI->getOperand(CondBrMBBOperand).setMBB(NewDest)
[all...] |
