/external/llvm/lib/Target/ARM/ |
ARMAsmPrinter.cpp | 670 // pointers need to be indirect and pc-rel. We accomplish this by [all...] |
ARMBaseRegisterInfo.h | 37 /// or a stack/pc register that we should push/pop. 43 case LR: case SP: case PC:
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ARMCodeEmitter.cpp | 515 /// be emitted to the current location in the function, and allow it to be PC 524 /// to be emitted to the current location in the function, and allow it to be PC 533 /// be emitted to the current location in the function, and allow it to be PC 820 // It's basically add r, pc, (LCPI - $+8) 834 // Encode Rn which is PC. 835 Binary |= II->getRegisterInfo().getEncodingValue(ARM::PC) << ARMII::RegRnShift; 846 // It's basically add r, pc, (LJTI - $+8) 862 // Encode Rn which is PC. 863 Binary |= II->getRegisterInfo().getEncodingValue(ARM::PC) << ARMII::RegRnShift; [all...] |
ARMBaseRegisterInfo.cpp | 48 : ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), TII(tii), STI(sti), 89 Reserved.set(ARM::PC);
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/external/clang/tools/libclang/ |
CXComment.cpp | 109 if (const ParagraphComment *PC = dyn_cast<ParagraphComment>(C)) 110 return PC->isWhitespace(); 434 const ParagraphComment *PC = cast<ParagraphComment>(Child); 435 if (PC->isWhitespace()) 438 FirstParagraph = PC; 440 MiscBlocks.push_back(PC); [all...] |
/external/llvm/include/llvm/IR/ |
IRBuilder.h | [all...] |
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
ECPoint.java | 207 byte PC; 211 PC = 0x03; 215 PC = 0x02; 221 PO[0] = PC; 397 // if ypTilde = 0, then PC := 02, else PC := 03 398 // Note: PC === PO[0] 404 // ypTilde = 1, hence PC = 03
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/external/tremolo/Tremolo/ |
bitwiseARM.s | 64 LDMFD r13!,{r10,r11,PC} 116 LDMFD r13!,{r5,r6,r10,r11,PC} 125 LDMFD r13!,{r5,r6,r10,r11,PC} 130 LDMFD r13!,{r5,r6,r10,r11,PC} 204 LDMFD r13!,{r10,PC} 210 LDMFD r13!,{r10,PC} 256 LDMFD r13!,{r10,r11,PC} 334 LDMFD r13!,{r5,r6,r10,r11,PC} 370 LDMFD r13!,{r5,r6,r10,r11,PC}
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floor1LARM.s | 64 LDMFD r13!,{r4-r6,r11,PC}
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floor1ARM.s | 65 LDMFD r13!,{r4-r6,r11,PC}
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/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 236 unsigned PC, 248 PCReg = PC;
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/external/llvm/lib/Target/ |
TargetLoweringObjectFile.cpp | 315 const MCExpr *PC = MCSymbolRefExpr::Create(PCSym, getContext()); 316 return MCBinaryExpr::CreateSub(Sym, PC, getContext());
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/external/qemu/hw/ |
mips_r4k.c | 8 * the standard PC ISA addresses. 12 #include "pc.h" 154 env->active_tc.PC = s->vector; 191 reset_info->vector = env->active_tc.PC;
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android_mips.c | 92 env->active_tc.PC = (int32_t)kernel_entry;
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/external/llvm/unittests/ADT/ |
TripleTest.cpp | 84 T = Triple("x86_64-pc-linux-gnu"); 86 EXPECT_EQ(Triple::PC, T.getVendor()); 164 EXPECT_EQ("a-pc-c", Triple::normalize("a-pc-c")); 165 EXPECT_EQ("-pc-b-c", Triple::normalize("pc-b-c")); 166 EXPECT_EQ("a-pc-b", Triple::normalize("a-b-pc")); 167 EXPECT_EQ("a-pc-b-c", Triple::normalize("a-b-c-pc")); [all...] |
/external/qemu/target-mips/ |
cpu.h | 142 target_ulong PC; 637 env->active_tc.PC = tb->pc; 642 static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, 645 *pc = env->active_tc.PC;
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machine.c | 13 qemu_put_betls(f, &tc->PC); 160 qemu_get_betls(f, &tc->PC);
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/external/llvm/include/llvm/ADT/ |
Triple.h | 76 PC, 96 MinGW32, // i*86-pc-mingw32, *-w64-mingw32
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/external/clang/include/clang/AST/ |
Comment.h | 682 void setParagraph(ParagraphComment *PC) { 683 Paragraph = PC; 684 SourceLocation NewLocEnd = PC->getLocEnd();
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/dalvik/vm/mterp/mips/ |
footer.S | 20 move rPC, a1 # restore Dalvik pc 36 move rPC, a0 # set up dalvik pc 45 move a0, rPC # pass our target PC 52 move a0, rPC # pass our target PC 59 lw a0, 0(ra) # pass our target PC 66 lw a0, 0(ra) # pass our target PC 73 lw a0, 0(ra) # pass our target PC 80 move a0, rPC # pass our target PC 93 move rPC, a1 # restore Dalvik pc 126 * rPC <= Dalvik PC of instrucion to interpre [all...] |
/external/clang/include/clang/StaticAnalyzer/Core/BugReporter/ |
BugReporter.h | 451 PathDiagnosticConsumer &PC, 527 PathDiagnosticConsumer &PC,
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/system/core/libpixelflinger/codeflinger/ |
ARMAssemblerInterface.h | 53 PC = R15 60 LIST(SP), LIST(LR), LIST(PC), 141 virtual void B(int cc, uint32_t* pc) = 0; 142 virtual void BL(int cc, uint32_t* pc) = 0;
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCTargetDesc.cpp | 158 InitARMMCRegisterInfo(X, ARM::LR, 0, 0, ARM::PC); 243 return Addr+Imm+8; // In ARM mode the PC is always off by 8 bytes.
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/dalvik/vm/mterp/armv5te/ |
footer.S | 20 mov rPC, r1 @ restore Dalvik pc 38 mov rPC, r0 @ set up dalvik pc 49 mov r0,rPC @ pass our target PC 57 mov r0,rPC @ pass our target PC 65 ldr r0,[lr, #-1] @ pass our target PC 73 ldr r0,[lr, #-1] @ pass our target PC 81 ldr r0,[lr, #-1] @ pass our target PC 89 mov r0,rPC @ pass our target PC 102 mov rPC, r1 @ restore Dalvik pc 135 * but also save the native pc of the resume point in the translatio [all...] |
/external/llvm/lib/Support/ |
Triple.cpp | 98 case PC: return "pc"; 252 .Case("pc", Triple::PC) 432 // reaches the target position Pos. For example, pc-a -> -pc-a when 433 // moving pc to the second position.
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