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      1 #!/usr/bin/env perl
      2 
      3 # ====================================================================
      4 # [Re]written by Andy Polyakov <appro (at] fy.chalmers.se> for the OpenSSL
      5 # project. The module is, however, dual licensed under OpenSSL and
      6 # CRYPTOGAMS licenses depending on where you obtain it. For further
      7 # details see http://www.openssl.org/~appro/cryptogams/.
      8 # ====================================================================
      9 
     10 # At some point it became apparent that the original SSLeay RC4
     11 # assembler implementation performs suboptimally on latest IA-32
     12 # microarchitectures. After re-tuning performance has changed as
     13 # following:
     14 #
     15 # Pentium	-10%
     16 # Pentium III	+12%
     17 # AMD		+50%(*)
     18 # P4		+250%(**)
     19 #
     20 # (*)	This number is actually a trade-off:-) It's possible to
     21 #	achieve	+72%, but at the cost of -48% off PIII performance.
     22 #	In other words code performing further 13% faster on AMD
     23 #	would perform almost 2 times slower on Intel PIII...
     24 #	For reference! This code delivers ~80% of rc4-amd64.pl
     25 #	performance on the same Opteron machine.
     26 # (**)	This number requires compressed key schedule set up by
     27 #	RC4_set_key [see commentary below for further details].
     28 #
     29 #					<appro (at] fy.chalmers.se>
     30 
     31 # May 2011
     32 #
     33 # Optimize for Core2 and Westmere [and incidentally Opteron]. Current
     34 # performance in cycles per processed byte (less is better) and
     35 # improvement relative to previous version of this module is:
     36 #
     37 # Pentium	10.2			# original numbers
     38 # Pentium III	7.8(*)
     39 # Intel P4	7.5
     40 #
     41 # Opteron	6.1/+20%		# new MMX numbers
     42 # Core2		5.3/+67%(**)
     43 # Westmere	5.1/+94%(**)
     44 # Sandy Bridge	5.0/+8%
     45 # Atom		12.6/+6%
     46 #
     47 # (*)	PIII can actually deliver 6.6 cycles per byte with MMX code,
     48 #	but this specific code performs poorly on Core2. And vice
     49 #	versa, below MMX/SSE code delivering 5.8/7.1 on Core2 performs
     50 #	poorly on PIII, at 8.0/14.5:-( As PIII is not a "hot" CPU
     51 #	[anymore], I chose to discard PIII-specific code path and opt
     52 #	for original IALU-only code, which is why MMX/SSE code path
     53 #	is guarded by SSE2 bit (see below), not MMX/SSE.
     54 # (**)	Performance vs. block size on Core2 and Westmere had a maximum
     55 #	at ... 64 bytes block size. And it was quite a maximum, 40-60%
     56 #	in comparison to largest 8KB block size. Above improvement
     57 #	coefficients are for the largest block size.
     58 
     59 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
     60 push(@INC,"${dir}","${dir}../../perlasm");
     61 require "x86asm.pl";
     62 
     63 &asm_init($ARGV[0],"rc4-586.pl");
     64 
     65 $xx="eax";
     66 $yy="ebx";
     67 $tx="ecx";
     68 $ty="edx";
     69 $inp="esi";
     70 $out="ebp";
     71 $dat="edi";
     72 
     73 sub RC4_loop {
     74   my $i=shift;
     75   my $func = ($i==0)?*mov:*or;
     76 
     77 	&add	(&LB($yy),&LB($tx));
     78 	&mov	($ty,&DWP(0,$dat,$yy,4));
     79 	&mov	(&DWP(0,$dat,$yy,4),$tx);
     80 	&mov	(&DWP(0,$dat,$xx,4),$ty);
     81 	&add	($ty,$tx);
     82 	&inc	(&LB($xx));
     83 	&and	($ty,0xff);
     84 	&ror	($out,8)	if ($i!=0);
     85 	if ($i<3) {
     86 	  &mov	($tx,&DWP(0,$dat,$xx,4));
     87 	} else {
     88 	  &mov	($tx,&wparam(3));	# reload [re-biased] out
     89 	}
     90 	&$func	($out,&DWP(0,$dat,$ty,4));
     91 }
     92 
     93 if ($alt=0) {
     94   # >20% faster on Atom and Sandy Bridge[!], 8% faster on Opteron,
     95   # but ~40% slower on Core2 and Westmere... Attempt to add movz
     96   # brings down Opteron by 25%, Atom and Sandy Bridge by 15%, yet
     97   # on Core2 with movz it's almost 20% slower than below alternative
     98   # code... Yes, it's a total mess...
     99   my @XX=($xx,$out);
    100   $RC4_loop_mmx = sub {		# SSE actually...
    101     my $i=shift;
    102     my $j=$i<=0?0:$i>>1;
    103     my $mm=$i<=0?"mm0":"mm".($i&1);
    104 
    105 	&add	(&LB($yy),&LB($tx));
    106 	&lea	(@XX[1],&DWP(1,@XX[0]));
    107 	&pxor	("mm2","mm0")				if ($i==0);
    108 	&psllq	("mm1",8)				if ($i==0);
    109 	&and	(@XX[1],0xff);
    110 	&pxor	("mm0","mm0")				if ($i<=0);
    111 	&mov	($ty,&DWP(0,$dat,$yy,4));
    112 	&mov	(&DWP(0,$dat,$yy,4),$tx);
    113 	&pxor	("mm1","mm2")				if ($i==0);
    114 	&mov	(&DWP(0,$dat,$XX[0],4),$ty);
    115 	&add	(&LB($ty),&LB($tx));
    116 	&movd	(@XX[0],"mm7")				if ($i==0);
    117 	&mov	($tx,&DWP(0,$dat,@XX[1],4));
    118 	&pxor	("mm1","mm1")				if ($i==1);
    119 	&movq	("mm2",&QWP(0,$inp))			if ($i==1);
    120 	&movq	(&QWP(-8,(@XX[0],$inp)),"mm1")		if ($i==0);
    121 	&pinsrw	($mm,&DWP(0,$dat,$ty,4),$j);
    122 
    123 	push	(@XX,shift(@XX))			if ($i>=0);
    124   }
    125 } else {
    126   # Using pinsrw here improves performane on Intel CPUs by 2-3%, but
    127   # brings down AMD by 7%...
    128   $RC4_loop_mmx = sub {
    129     my $i=shift;
    130 
    131 	&add	(&LB($yy),&LB($tx));
    132 	&psllq	("mm1",8*(($i-1)&7))			if (abs($i)!=1);
    133 	&mov	($ty,&DWP(0,$dat,$yy,4));
    134 	&mov	(&DWP(0,$dat,$yy,4),$tx);
    135 	&mov	(&DWP(0,$dat,$xx,4),$ty);
    136 	&inc	($xx);
    137 	&add	($ty,$tx);
    138 	&movz	($xx,&LB($xx));				# (*)
    139 	&movz	($ty,&LB($ty));				# (*)
    140 	&pxor	("mm2",$i==1?"mm0":"mm1")		if ($i>=0);
    141 	&movq	("mm0",&QWP(0,$inp))			if ($i<=0);
    142 	&movq	(&QWP(-8,($out,$inp)),"mm2")		if ($i==0);
    143 	&mov	($tx,&DWP(0,$dat,$xx,4));
    144 	&movd	($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
    145 
    146 	# (*)	This is the key to Core2 and Westmere performance.
    147 	#	Whithout movz out-of-order execution logic confuses
    148 	#	itself and fails to reorder loads and stores. Problem
    149 	#	appears to be fixed in Sandy Bridge...
    150   }
    151 }
    152 
    153 &external_label("OPENSSL_ia32cap_P");
    154 
    155 # void RC4(RC4_KEY *key,size_t len,const unsigned char *inp,unsigned char *out);
    156 &function_begin("RC4");
    157 	&mov	($dat,&wparam(0));	# load key schedule pointer
    158 	&mov	($ty, &wparam(1));	# load len
    159 	&mov	($inp,&wparam(2));	# load inp
    160 	&mov	($out,&wparam(3));	# load out
    161 
    162 	&xor	($xx,$xx);		# avoid partial register stalls
    163 	&xor	($yy,$yy);
    164 
    165 	&cmp	($ty,0);		# safety net
    166 	&je	(&label("abort"));
    167 
    168 	&mov	(&LB($xx),&BP(0,$dat));	# load key->x
    169 	&mov	(&LB($yy),&BP(4,$dat));	# load key->y
    170 	&add	($dat,8);
    171 
    172 	&lea	($tx,&DWP(0,$inp,$ty));
    173 	&sub	($out,$inp);		# re-bias out
    174 	&mov	(&wparam(1),$tx);	# save input+len
    175 
    176 	&inc	(&LB($xx));
    177 
    178 	# detect compressed key schedule...
    179 	&cmp	(&DWP(256,$dat),-1);
    180 	&je	(&label("RC4_CHAR"));
    181 
    182 	&mov	($tx,&DWP(0,$dat,$xx,4));
    183 
    184 	&and	($ty,-4);		# how many 4-byte chunks?
    185 	&jz	(&label("loop1"));
    186 
    187 	&test	($ty,-8);
    188 	&mov	(&wparam(3),$out);	# $out as accumulator in these loops
    189 	&jz	(&label("go4loop4"));
    190 
    191 	&picmeup($out,"OPENSSL_ia32cap_P");
    192 	&bt	(&DWP(0,$out),26);	# check SSE2 bit [could have been MMX]
    193 	&jnc	(&label("go4loop4"));
    194 
    195 	&mov	($out,&wparam(3))	if (!$alt);
    196 	&movd	("mm7",&wparam(3))	if ($alt);
    197 	&and	($ty,-8);
    198 	&lea	($ty,&DWP(-8,$inp,$ty));
    199 	&mov	(&DWP(-4,$dat),$ty);	# save input+(len/8)*8-8
    200 
    201 	&$RC4_loop_mmx(-1);
    202 	&jmp(&label("loop_mmx_enter"));
    203 
    204 	&set_label("loop_mmx",16);
    205 		&$RC4_loop_mmx(0);
    206 	&set_label("loop_mmx_enter");
    207 		for 	($i=1;$i<8;$i++) { &$RC4_loop_mmx($i); }
    208 		&mov	($ty,$yy);
    209 		&xor	($yy,$yy);		# this is second key to Core2
    210 		&mov	(&LB($yy),&LB($ty));	# and Westmere performance...
    211 		&cmp	($inp,&DWP(-4,$dat));
    212 		&lea	($inp,&DWP(8,$inp));
    213 	&jb	(&label("loop_mmx"));
    214 
    215     if ($alt) {
    216 	&movd	($out,"mm7");
    217 	&pxor	("mm2","mm0");
    218 	&psllq	("mm1",8);
    219 	&pxor	("mm1","mm2");
    220 	&movq	(&QWP(-8,$out,$inp),"mm1");
    221     } else {
    222 	&psllq	("mm1",56);
    223 	&pxor	("mm2","mm1");
    224 	&movq	(&QWP(-8,$out,$inp),"mm2");
    225     }
    226 	&emms	();
    227 
    228 	&cmp	($inp,&wparam(1));	# compare to input+len
    229 	&je	(&label("done"));
    230 	&jmp	(&label("loop1"));
    231 
    232 &set_label("go4loop4",16);
    233 	&lea	($ty,&DWP(-4,$inp,$ty));
    234 	&mov	(&wparam(2),$ty);	# save input+(len/4)*4-4
    235 
    236 	&set_label("loop4");
    237 		for ($i=0;$i<4;$i++) { RC4_loop($i); }
    238 		&ror	($out,8);
    239 		&xor	($out,&DWP(0,$inp));
    240 		&cmp	($inp,&wparam(2));	# compare to input+(len/4)*4-4
    241 		&mov	(&DWP(0,$tx,$inp),$out);# $tx holds re-biased out here
    242 		&lea	($inp,&DWP(4,$inp));
    243 		&mov	($tx,&DWP(0,$dat,$xx,4));
    244 	&jb	(&label("loop4"));
    245 
    246 	&cmp	($inp,&wparam(1));	# compare to input+len
    247 	&je	(&label("done"));
    248 	&mov	($out,&wparam(3));	# restore $out
    249 
    250 	&set_label("loop1",16);
    251 		&add	(&LB($yy),&LB($tx));
    252 		&mov	($ty,&DWP(0,$dat,$yy,4));
    253 		&mov	(&DWP(0,$dat,$yy,4),$tx);
    254 		&mov	(&DWP(0,$dat,$xx,4),$ty);
    255 		&add	($ty,$tx);
    256 		&inc	(&LB($xx));
    257 		&and	($ty,0xff);
    258 		&mov	($ty,&DWP(0,$dat,$ty,4));
    259 		&xor	(&LB($ty),&BP(0,$inp));
    260 		&lea	($inp,&DWP(1,$inp));
    261 		&mov	($tx,&DWP(0,$dat,$xx,4));
    262 		&cmp	($inp,&wparam(1));	# compare to input+len
    263 		&mov	(&BP(-1,$out,$inp),&LB($ty));
    264 	&jb	(&label("loop1"));
    265 
    266 	&jmp	(&label("done"));
    267 
    268 # this is essentially Intel P4 specific codepath...
    269 &set_label("RC4_CHAR",16);
    270 	&movz	($tx,&BP(0,$dat,$xx));
    271 	# strangely enough unrolled loop performs over 20% slower...
    272 	&set_label("cloop1");
    273 		&add	(&LB($yy),&LB($tx));
    274 		&movz	($ty,&BP(0,$dat,$yy));
    275 		&mov	(&BP(0,$dat,$yy),&LB($tx));
    276 		&mov	(&BP(0,$dat,$xx),&LB($ty));
    277 		&add	(&LB($ty),&LB($tx));
    278 		&movz	($ty,&BP(0,$dat,$ty));
    279 		&add	(&LB($xx),1);
    280 		&xor	(&LB($ty),&BP(0,$inp));
    281 		&lea	($inp,&DWP(1,$inp));
    282 		&movz	($tx,&BP(0,$dat,$xx));
    283 		&cmp	($inp,&wparam(1));
    284 		&mov	(&BP(-1,$out,$inp),&LB($ty));
    285 	&jb	(&label("cloop1"));
    286 
    287 &set_label("done");
    288 	&dec	(&LB($xx));
    289 	&mov	(&DWP(-4,$dat),$yy);		# save key->y
    290 	&mov	(&BP(-8,$dat),&LB($xx));	# save key->x
    291 &set_label("abort");
    292 &function_end("RC4");
    293 
    294 ########################################################################
    295 
    296 $inp="esi";
    297 $out="edi";
    298 $idi="ebp";
    299 $ido="ecx";
    300 $idx="edx";
    301 
    302 # void RC4_set_key(RC4_KEY *key,int len,const unsigned char *data);
    303 &function_begin("private_RC4_set_key");
    304 	&mov	($out,&wparam(0));		# load key
    305 	&mov	($idi,&wparam(1));		# load len
    306 	&mov	($inp,&wparam(2));		# load data
    307 	&picmeup($idx,"OPENSSL_ia32cap_P");
    308 
    309 	&lea	($out,&DWP(2*4,$out));		# &key->data
    310 	&lea	($inp,&DWP(0,$inp,$idi));	# $inp to point at the end
    311 	&neg	($idi);
    312 	&xor	("eax","eax");
    313 	&mov	(&DWP(-4,$out),$idi);		# borrow key->y
    314 
    315 	&bt	(&DWP(0,$idx),20);		# check for bit#20
    316 	&jc	(&label("c1stloop"));
    317 
    318 &set_label("w1stloop",16);
    319 	&mov	(&DWP(0,$out,"eax",4),"eax");	# key->data[i]=i;
    320 	&add	(&LB("eax"),1);			# i++;
    321 	&jnc	(&label("w1stloop"));
    322 
    323 	&xor	($ido,$ido);
    324 	&xor	($idx,$idx);
    325 
    326 &set_label("w2ndloop",16);
    327 	&mov	("eax",&DWP(0,$out,$ido,4));
    328 	&add	(&LB($idx),&BP(0,$inp,$idi));
    329 	&add	(&LB($idx),&LB("eax"));
    330 	&add	($idi,1);
    331 	&mov	("ebx",&DWP(0,$out,$idx,4));
    332 	&jnz	(&label("wnowrap"));
    333 	  &mov	($idi,&DWP(-4,$out));
    334 	&set_label("wnowrap");
    335 	&mov	(&DWP(0,$out,$idx,4),"eax");
    336 	&mov	(&DWP(0,$out,$ido,4),"ebx");
    337 	&add	(&LB($ido),1);
    338 	&jnc	(&label("w2ndloop"));
    339 &jmp	(&label("exit"));
    340 
    341 # Unlike all other x86 [and x86_64] implementations, Intel P4 core
    342 # [including EM64T] was found to perform poorly with above "32-bit" key
    343 # schedule, a.k.a. RC4_INT. Performance improvement for IA-32 hand-coded
    344 # assembler turned out to be 3.5x if re-coded for compressed 8-bit one,
    345 # a.k.a. RC4_CHAR! It's however inappropriate to just switch to 8-bit
    346 # schedule for x86[_64], because non-P4 implementations suffer from
    347 # significant performance losses then, e.g. PIII exhibits >2x
    348 # deterioration, and so does Opteron. In order to assure optimal
    349 # all-round performance, we detect P4 at run-time and set up compressed
    350 # key schedule, which is recognized by RC4 procedure.
    351 
    352 &set_label("c1stloop",16);
    353 	&mov	(&BP(0,$out,"eax"),&LB("eax"));	# key->data[i]=i;
    354 	&add	(&LB("eax"),1);			# i++;
    355 	&jnc	(&label("c1stloop"));
    356 
    357 	&xor	($ido,$ido);
    358 	&xor	($idx,$idx);
    359 	&xor	("ebx","ebx");
    360 
    361 &set_label("c2ndloop",16);
    362 	&mov	(&LB("eax"),&BP(0,$out,$ido));
    363 	&add	(&LB($idx),&BP(0,$inp,$idi));
    364 	&add	(&LB($idx),&LB("eax"));
    365 	&add	($idi,1);
    366 	&mov	(&LB("ebx"),&BP(0,$out,$idx));
    367 	&jnz	(&label("cnowrap"));
    368 	  &mov	($idi,&DWP(-4,$out));
    369 	&set_label("cnowrap");
    370 	&mov	(&BP(0,$out,$idx),&LB("eax"));
    371 	&mov	(&BP(0,$out,$ido),&LB("ebx"));
    372 	&add	(&LB($ido),1);
    373 	&jnc	(&label("c2ndloop"));
    374 
    375 	&mov	(&DWP(256,$out),-1);		# mark schedule as compressed
    376 
    377 &set_label("exit");
    378 	&xor	("eax","eax");
    379 	&mov	(&DWP(-8,$out),"eax");		# key->x=0;
    380 	&mov	(&DWP(-4,$out),"eax");		# key->y=0;
    381 &function_end("private_RC4_set_key");
    382 
    383 # const char *RC4_options(void);
    384 &function_begin_B("RC4_options");
    385 	&call	(&label("pic_point"));
    386 &set_label("pic_point");
    387 	&blindpop("eax");
    388 	&lea	("eax",&DWP(&label("opts")."-".&label("pic_point"),"eax"));
    389 	&picmeup("edx","OPENSSL_ia32cap_P");
    390 	&mov	("edx",&DWP(0,"edx"));
    391 	&bt	("edx",20);
    392 	&jc	(&label("1xchar"));
    393 	&bt	("edx",26);
    394 	&jnc	(&label("ret"));
    395 	&add	("eax",25);
    396 	&ret	();
    397 &set_label("1xchar");
    398 	&add	("eax",12);
    399 &set_label("ret");
    400 	&ret	();
    401 &set_label("opts",64);
    402 &asciz	("rc4(4x,int)");
    403 &asciz	("rc4(1x,char)");
    404 &asciz	("rc4(8x,mmx)");
    405 &asciz	("RC4 for x86, CRYPTOGAMS by <appro\@openssl.org>");
    406 &align	(64);
    407 &function_end_B("RC4_options");
    408 
    409 &asm_finish();
    410 
    411