| /external/llvm/include/llvm/Support/ |
| Solaris.h | 30 #undef ESP
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.h | 46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
|
| X86MCTargetDesc.cpp | 292 // Initial state of the frame pointer is esp+stackGrowth.
294 MachineLocation Src(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
298 MachineLocation CSDst(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
|
| X86MCCodeEmitter.cpp | 344 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
347 BaseRegNo != N86::ESP &&
358 // If the base is not EBP/ESP and there is no displacement, use simple
382 assert(IndexReg.getReg() != X86::ESP &&
383 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
421 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
429 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| /external/libpcap/ |
| tokdefs.h | 89 ESP = 315,
193 #define ESP 315
|
| grammar.c | 124 ESP = 315,
228 #define ESP 315
789 "RSH", "LEN", "IPV6", "ICMPV6", "AH", "ESP", "VLAN", "MPLS", "PPPOED",
[all...] |
| grammar.y | 181 %token IPV6 ICMPV6 AH ESP
360 | ESP { $$ = Q_ESP; }
|
| scanner.l | 203 esp return ESP;
|
| scanner.c | [all...] |
| /external/qemu/distrib/sdl-1.2.15/src/hermes/ |
| mmx_main.asm | 19 ;; [ESP+8] ConverterInfo*
35 mov ebp,esp
|
| x86_main.asm | 21 ;; [ESP+8] ConverterInfo*
37 mov ebp,esp
|
| /external/qemu/target-i386/ |
| exec.h | 41 #define ESP (env->regs[R_ESP])
300 ESP = env->regs[R_ESP];
328 env->regs[R_ESP] = ESP;
|
| op_helper.c | 385 stl_kernel(env->tr.base + (0x28 + 4 * 4), ESP);
399 stw_kernel(env->tr.base + (0x12 + 4 * 2), ESP);
451 ESP = new_regs[4];
617 ESP = (ESP & ~0xffff) | ((val) & 0xffff);\
619 ESP = (uint32_t)(val);\
621 ESP = (val);\
624 #define SET_ESP(val, sp_mask) ESP = (ESP & ~(sp_mask)) | ((val) & (sp_mask))
664 uint32_t e1, e2, offset, ss = 0, esp, ss_e1 = 0, ss_e2 = 0 local
890 target_ulong old_eip, esp, offset; local
1133 uint32_t offset, esp; local
1954 uint32_t esp_mask, esp, ebp; local
1986 target_ulong esp, ebp; local
2290 uint32_t esp, esp_mask; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 79 StackPtr = X86::ESP;
533 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
561 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
598 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
634 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
635 return X86::ESP;
670 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
|
| X86AsmPrinter.cpp | 299 assert(IndexReg.getReg() != X86::ESP &&
300 "X86 doesn't allow scaling by ESP");
|
| X86FrameLowering.cpp | 352 // movl %esp, %ebp
603 // Encode the offset to the nnnnnn value in the 'subl $nnnnnn, ESP'
858 // If there is an SUB32ri of ESP immediately before this instruction, merge
863 // If there is an ADD32ri or SUB32ri of ESP immediately after this
867 // Adjust stack pointer: ESP -= numbytes.
[all...] |
| X86CodeEmitter.cpp | 516 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
519 BaseRegNo != N86::ESP &&
530 // If the base is not EBP/ESP and there is no displacement, use simple
553 assert(IndexReg.getReg() != X86::ESP &&
554 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
589 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
598 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| /external/oprofile/events/i386/nehalem/ |
| unit_masks | 312 0x04 esp_folding Counts number of stack pointer (ESP) instructions decoded: push , pop , call , ret, etc
313 0x08 esp_sync Counts number of stack pointer (ESP) sync operations where an ESP instruction is corrected by adding the ESP offset register to the current value of the ESP register
|
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 90 GENOFFSET(X86,x86,ESP);
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 147 ENTRY(ESP) \
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-x86-linux.c | 377 SC2(esp,ESP);
469 Addr esp = esp_top_of_frame; local
477 esp -= sizeof(*frame);
478 esp = VG_ROUNDDN(esp, 16);
479 frame = (struct sigframe *)esp;
481 if (!extend(tst, esp, sizeof(*frame)))
486 esp, offsetof(struct sigframe, vg) );
510 esp, offsetof(struct sigframe, vg) )
527 Addr esp = esp_top_of_frame; local
591 Addr esp; local
699 Addr esp; local
[all...] |
| /external/qemu-pc-bios/bochs/ |
| bochs.h | 58 #undef ESP
|
| /external/qemu/ |
| cpu-exec.c | 32 #undef ESP
[all...] |
| /external/valgrind/main/VEX/test/ |
| test-amd64.c | 1150 printf("popl esp=%x\n", res);
1230 r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1231 *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
[all...] |
| test-i386.c | 1109 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1111 printf("popl esp=%x\n", res);
1115 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1117 printf("popw esp=%x\n", res);
1190 r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1191 *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1227 r->esp = 0xfffe
[all...] |
