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      1 /*
      2  *  i386 execution defines
      3  *
      4  *  Copyright (c) 2003 Fabrice Bellard
      5  *
      6  * This library is free software; you can redistribute it and/or
      7  * modify it under the terms of the GNU Lesser General Public
      8  * License as published by the Free Software Foundation; either
      9  * version 2 of the License, or (at your option) any later version.
     10  *
     11  * This library is distributed in the hope that it will be useful,
     12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14  * Lesser General Public License for more details.
     15  *
     16  * You should have received a copy of the GNU Lesser General Public
     17  * License along with this library; if not, write to the Free Software
     18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
     19  */
     20 #include "config.h"
     21 #include "dyngen-exec.h"
     22 
     23 /* XXX: factorize this mess */
     24 #ifdef TARGET_X86_64
     25 #define TARGET_LONG_BITS 64
     26 #else
     27 #define TARGET_LONG_BITS 32
     28 #endif
     29 
     30 #include "cpu-defs.h"
     31 
     32 GLOBAL_REGISTER_VARIABLE_DECL struct CPUX86State *env asm(AREG0);
     33 
     34 #include "qemu-common.h"
     35 #include "qemu-log.h"
     36 
     37 #define EAX (env->regs[R_EAX])
     38 #define ECX (env->regs[R_ECX])
     39 #define EDX (env->regs[R_EDX])
     40 #define EBX (env->regs[R_EBX])
     41 #define ESP (env->regs[R_ESP])
     42 #define EBP (env->regs[R_EBP])
     43 #define ESI (env->regs[R_ESI])
     44 #define EDI (env->regs[R_EDI])
     45 #define EIP (env->eip)
     46 #define DF  (env->df)
     47 
     48 #define CC_SRC (env->cc_src)
     49 #define CC_DST (env->cc_dst)
     50 #define CC_OP  (env->cc_op)
     51 
     52 /* float macros */
     53 #define FT0    (env->ft0)
     54 #define ST0    (env->fpregs[env->fpstt].d)
     55 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
     56 #define ST1    ST(1)
     57 
     58 #include "cpu.h"
     59 #include "exec-all.h"
     60 
     61 /* op_helper.c */
     62 void do_interrupt(int intno, int is_int, int error_code,
     63                   target_ulong next_eip, int is_hw);
     64 void do_interrupt_user(int intno, int is_int, int error_code,
     65                        target_ulong next_eip);
     66 void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
     67 void QEMU_NORETURN raise_exception(int exception_index);
     68 void do_smm_enter(void);
     69 
     70 /* n must be a constant to be efficient */
     71 static inline target_long lshift(target_long x, int n)
     72 {
     73     if (n >= 0)
     74         return x << n;
     75     else
     76         return x >> (-n);
     77 }
     78 
     79 #include "helper.h"
     80 
     81 static inline void svm_check_intercept(uint32_t type)
     82 {
     83     helper_svm_check_intercept_param(type, 0);
     84 }
     85 
     86 #if !defined(CONFIG_USER_ONLY)
     87 
     88 #include "softmmu_exec.h"
     89 
     90 #endif /* !defined(CONFIG_USER_ONLY) */
     91 
     92 #ifdef USE_X86LDOUBLE
     93 /* use long double functions */
     94 #define floatx_to_int32 floatx80_to_int32
     95 #define floatx_to_int64 floatx80_to_int64
     96 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
     97 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
     98 #define int32_to_floatx int32_to_floatx80
     99 #define int64_to_floatx int64_to_floatx80
    100 #define float32_to_floatx float32_to_floatx80
    101 #define float64_to_floatx float64_to_floatx80
    102 #define floatx_to_float32 floatx80_to_float32
    103 #define floatx_to_float64 floatx80_to_float64
    104 #define floatx_abs floatx80_abs
    105 #define floatx_chs floatx80_chs
    106 #define floatx_round_to_int floatx80_round_to_int
    107 #define floatx_compare floatx80_compare
    108 #define floatx_compare_quiet floatx80_compare_quiet
    109 #else
    110 #define floatx_to_int32 float64_to_int32
    111 #define floatx_to_int64 float64_to_int64
    112 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
    113 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
    114 #define int32_to_floatx int32_to_float64
    115 #define int64_to_floatx int64_to_float64
    116 #define float32_to_floatx float32_to_float64
    117 #define float64_to_floatx(x, e) (x)
    118 #define floatx_to_float32 float64_to_float32
    119 #define floatx_to_float64(x, e) (x)
    120 #define floatx_abs float64_abs
    121 #define floatx_chs float64_chs
    122 #define floatx_round_to_int float64_round_to_int
    123 #define floatx_compare float64_compare
    124 #define floatx_compare_quiet float64_compare_quiet
    125 #endif
    126 
    127 #define RC_MASK         0xc00
    128 #define RC_NEAR		0x000
    129 #define RC_DOWN		0x400
    130 #define RC_UP		0x800
    131 #define RC_CHOP		0xc00
    132 
    133 #define MAXTAN 9223372036854775808.0
    134 
    135 #ifdef USE_X86LDOUBLE
    136 
    137 /* only for x86 */
    138 typedef union {
    139     long double d;
    140     struct {
    141         unsigned long long lower;
    142         unsigned short upper;
    143     } l;
    144 } CPU86_LDoubleU;
    145 
    146 /* the following deal with x86 long double-precision numbers */
    147 #define MAXEXPD 0x7fff
    148 #define EXPBIAS 16383
    149 #define EXPD(fp)	(fp.l.upper & 0x7fff)
    150 #define SIGND(fp)	((fp.l.upper) & 0x8000)
    151 #define MANTD(fp)       (fp.l.lower)
    152 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
    153 
    154 #else
    155 
    156 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
    157 typedef union {
    158     double d;
    159 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
    160     struct {
    161         uint32_t lower;
    162         int32_t upper;
    163     } l;
    164 #else
    165     struct {
    166         int32_t upper;
    167         uint32_t lower;
    168     } l;
    169 #endif
    170 #ifndef __arm__
    171     int64_t ll;
    172 #endif
    173 } CPU86_LDoubleU;
    174 
    175 /* the following deal with IEEE double-precision numbers */
    176 #define MAXEXPD 0x7ff
    177 #define EXPBIAS 1023
    178 #define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)
    179 #define SIGND(fp)	((fp.l.upper) & 0x80000000)
    180 #ifdef __arm__
    181 #define MANTD(fp)	(fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
    182 #else
    183 #define MANTD(fp)	(fp.ll & ((1LL << 52) - 1))
    184 #endif
    185 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
    186 #endif
    187 
    188 static inline void fpush(void)
    189 {
    190     env->fpstt = (env->fpstt - 1) & 7;
    191     env->fptags[env->fpstt] = 0; /* validate stack entry */
    192 }
    193 
    194 static inline void fpop(void)
    195 {
    196     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
    197     env->fpstt = (env->fpstt + 1) & 7;
    198 }
    199 
    200 #ifndef USE_X86LDOUBLE
    201 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
    202 {
    203     CPU86_LDoubleU temp;
    204     int upper, e;
    205     uint64_t ll;
    206 
    207     /* mantissa */
    208     upper = lduw(ptr + 8);
    209     /* XXX: handle overflow ? */
    210     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
    211     e |= (upper >> 4) & 0x800; /* sign */
    212     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
    213 #ifdef __arm__
    214     temp.l.upper = (e << 20) | (ll >> 32);
    215     temp.l.lower = ll;
    216 #else
    217     temp.ll = ll | ((uint64_t)e << 52);
    218 #endif
    219     return temp.d;
    220 }
    221 
    222 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
    223 {
    224     CPU86_LDoubleU temp;
    225     int e;
    226 
    227     temp.d = f;
    228     /* mantissa */
    229     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
    230     /* exponent + sign */
    231     e = EXPD(temp) - EXPBIAS + 16383;
    232     e |= SIGND(temp) >> 16;
    233     stw(ptr + 8, e);
    234 }
    235 #else
    236 
    237 /* we use memory access macros */
    238 
    239 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
    240 {
    241     CPU86_LDoubleU temp;
    242 
    243     temp.l.lower = ldq(ptr);
    244     temp.l.upper = lduw(ptr + 8);
    245     return temp.d;
    246 }
    247 
    248 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
    249 {
    250     CPU86_LDoubleU temp;
    251 
    252     temp.d = f;
    253     stq(ptr, temp.l.lower);
    254     stw(ptr + 8, temp.l.upper);
    255 }
    256 
    257 #endif /* USE_X86LDOUBLE */
    258 
    259 #define FPUS_IE (1 << 0)
    260 #define FPUS_DE (1 << 1)
    261 #define FPUS_ZE (1 << 2)
    262 #define FPUS_OE (1 << 3)
    263 #define FPUS_UE (1 << 4)
    264 #define FPUS_PE (1 << 5)
    265 #define FPUS_SF (1 << 6)
    266 #define FPUS_SE (1 << 7)
    267 #define FPUS_B  (1 << 15)
    268 
    269 #define FPUC_EM 0x3f
    270 
    271 static inline uint32_t compute_eflags(void)
    272 {
    273     return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
    274 }
    275 
    276 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
    277 static inline void load_eflags(int eflags, int update_mask)
    278 {
    279     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
    280     DF = 1 - (2 * ((eflags >> 10) & 1));
    281     env->eflags = (env->eflags & ~update_mask) |
    282         (eflags & update_mask) | 0x2;
    283 }
    284 
    285 static inline void env_to_regs(void)
    286 {
    287 #ifdef reg_EAX
    288     EAX = env->regs[R_EAX];
    289 #endif
    290 #ifdef reg_ECX
    291     ECX = env->regs[R_ECX];
    292 #endif
    293 #ifdef reg_EDX
    294     EDX = env->regs[R_EDX];
    295 #endif
    296 #ifdef reg_EBX
    297     EBX = env->regs[R_EBX];
    298 #endif
    299 #ifdef reg_ESP
    300     ESP = env->regs[R_ESP];
    301 #endif
    302 #ifdef reg_EBP
    303     EBP = env->regs[R_EBP];
    304 #endif
    305 #ifdef reg_ESI
    306     ESI = env->regs[R_ESI];
    307 #endif
    308 #ifdef reg_EDI
    309     EDI = env->regs[R_EDI];
    310 #endif
    311 }
    312 
    313 static inline void regs_to_env(void)
    314 {
    315 #ifdef reg_EAX
    316     env->regs[R_EAX] = EAX;
    317 #endif
    318 #ifdef reg_ECX
    319     env->regs[R_ECX] = ECX;
    320 #endif
    321 #ifdef reg_EDX
    322     env->regs[R_EDX] = EDX;
    323 #endif
    324 #ifdef reg_EBX
    325     env->regs[R_EBX] = EBX;
    326 #endif
    327 #ifdef reg_ESP
    328     env->regs[R_ESP] = ESP;
    329 #endif
    330 #ifdef reg_EBP
    331     env->regs[R_EBP] = EBP;
    332 #endif
    333 #ifdef reg_ESI
    334     env->regs[R_ESI] = ESI;
    335 #endif
    336 #ifdef reg_EDI
    337     env->regs[R_EDI] = EDI;
    338 #endif
    339 }
    340 
    341 static inline int cpu_has_work(CPUState *env)
    342 {
    343     int work;
    344 
    345     work = (env->interrupt_request & CPU_INTERRUPT_HARD) &&
    346            (env->eflags & IF_MASK);
    347     work |= env->interrupt_request & CPU_INTERRUPT_NMI;
    348     work |= env->interrupt_request & CPU_INTERRUPT_INIT;
    349     work |= env->interrupt_request & CPU_INTERRUPT_SIPI;
    350 
    351     return work;
    352 }
    353 
    354 static inline int cpu_halted(CPUState *env) {
    355     /* handle exit of HALTED state */
    356     if (!env->halted)
    357         return 0;
    358     /* disable halt condition */
    359     if (cpu_has_work(env)) {
    360         env->halted = 0;
    361         return 0;
    362     }
    363     return EXCP_HALTED;
    364 }
    365 
    366 /* load efer and update the corresponding hflags. XXX: do consistency
    367    checks with cpuid bits ? */
    368 static inline void cpu_load_efer(CPUState *env, uint64_t val)
    369 {
    370     env->efer = val;
    371     env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
    372     if (env->efer & MSR_EFER_LMA)
    373         env->hflags |= HF_LMA_MASK;
    374     if (env->efer & MSR_EFER_SVME)
    375         env->hflags |= HF_SVME_MASK;
    376 }
    377