| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 83 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
87 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
91 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
95 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.h | 37 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
38 SDValue Chain,
39 SDValue Dst, SDValue Src,
40 SDValue Size, unsigned Align,
45 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
46 SDValue Chain,
47 SDValue Dst, SDValue Src,
48 SDValue Size, unsigned Align
[all...] |
| X86ISelLowering.h | 452 bool isZeroNode(SDValue Elt);
483 virtual SDValue getPICJumpTableRelocBase(SDValue Table,
526 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
531 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
535 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
547 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
564 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
572 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
30 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
32 SmallVectorImpl<SDValue> &Results,
34 virtual SDValue LowerFormalArguments(
35 SDValue Chain,
40 SmallVectorImpl<SDValue> &InVals) const;
49 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
56 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const
[all...] |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
36 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
39 bool isHWTrueValue(SDValue Op) const;
40 bool isHWFalseValue(SDValue Op) const;
48 virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv,
51 const SmallVectorImpl<SDValue> &OutVals
[all...] |
| SIISelLowering.h | 30 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
31 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
33 bool foldImm(SDValue &Operand, int32_t &Immediate,
35 bool fitsRegClass(SelectionDAG &DAG, SDValue &Op, unsigned RegClass) const;
36 void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
42 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
46 SmallVectorImpl<SDValue> &InVals) const
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectionDAGInfo.h | 29 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
30 SDValue Chain,
31 SDValue Dst, SDValue Src,
32 SDValue Size, unsigned Align,
|
| HexagonISelLowering.h | 83 IsEligibleForTailCallOptimization(SDValue Callee,
90 const SmallVectorImpl<SDValue> &OutVals,
97 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
100 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
101 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
102 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const
[all...] |
| HexagonSelectionDAGInfo.cpp | 28 SDValue
30 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain,
31 SDValue Dst, SDValue Src, SDValue Size, unsigned Align,
45 return SDValue();
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.h | 67 virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
69 std::vector<SDValue> &OutOps);
81 inline SDValue getI32Imm(unsigned Imm) {
86 bool SelectDirectAddr(SDValue N, SDValue &Address);
88 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
89 SDValue &Offset, MVT mvt);
90 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base
[all...] |
| NVPTXISelLowering.h | 80 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerGlobalAddress(const GlobalValue *GV, int64_t Offset,
113 virtual SDValue
114 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
117 SmallVectorImpl<SDValue> &InVals) const;
119 virtual SDValue
120 LowerCall(CallLoweringInfo &CLI, SmallVectorImpl<SDValue> &InVals) const
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 319 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
340 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
341 SDValue &Offset,
348 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
354 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
359 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 47 /// SDValue if the target declines to use custom code and a different
56 virtual SDValue
58 SDValue Chain,
59 SDValue Op1, SDValue Op2,
60 SDValue Op3, unsigned Align, bool isVolatile,
64 return SDValue();
71 /// SDValue if the target declines to use custom code and a different
73 virtual SDValue
75 SDValue Chain
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.h | 32 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
35 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
36 SDValue &Offset) const;
38 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
39 SDValue &Offset) const;
41 virtual bool selectIntAddr(SDValue Addr, SDValue &Base
[all...] |
| MipsISelDAGToDAG.h | 57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
61 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
62 SDValue &Offset) const;
65 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
66 SDValue &Offset) const;
68 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base
[all...] |
| MipsISelLowering.h | 160 SmallVectorImpl<SDValue> &Results,
164 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
169 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
179 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
191 SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
193 SDValue getAddrLocal(SDValue Op, SelectionDAG &DAG, bool HasMips64) const;
195 SDValue getAddrGlobal(SDValue Op, SelectionDAG &DAG, unsigned Flag) const
[all...] |
| Mips16ISelDAGToDAG.h | 29 SDValue getMips16SPAliasReg();
31 void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg);
33 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
34 SDValue &Offset, SDValue &Alias);
|
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 144 SDValue Root;
286 const SDValue &getRoot() const { return Root; }
290 SDValue getEntryNode() const {
291 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
296 const SDValue &setRoot(SDValue N) {
362 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false);
363 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false);
364 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false);
365 SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 125 SDValue LowerFormalArguments(SDValue Chain,
129 SmallVectorImpl<SDValue> &InVals) const;
131 SDValue LowerReturn(SDValue Chain,
134 const SmallVectorImpl<SDValue> &OutVals,
137 SDValue LowerCall(CallLoweringInfo &CLI,
138 SmallVectorImpl<SDValue> &InVals) const;
140 SDValue LowerCallResult(SDValue Chain, SDValue InFlag
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 48 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
49 SDValue Chain,
50 SDValue Dst, SDValue Src,
51 SDValue Size, unsigned Align,
58 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
59 SDValue Chain,
60 SDValue Op1, SDValue Op2,
61 SDValue Op3, unsigned Align
[all...] |
| ARMISelLowering.h | 257 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
262 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
282 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
283 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
299 virtual bool isZExtFree(SDValue Val, EVT VT2) const;
321 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
322 SDValue &Offset,
330 SDValue &Base, SDValue &Offset
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 90 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
95 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
114 SDValue LowerCCCArguments(SDValue Chain,
119 SmallVectorImpl<SDValue> &InVals) const;
120 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
124 const SmallVectorImpl<SDValue> &OutVals
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
113 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
117 SmallVectorImpl<SDValue> &InVals) const;
120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 47 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
52 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
70 virtual SDValue
71 LowerFormalArguments(SDValue Chain,
76 SmallVectorImpl<SDValue> &InVals) const;
78 virtual SDValue
80 SmallVectorImpl<SDValue> &InVals) const;
82 virtual SDValue
83 LowerReturn(SDValue Chain
[all...] |
