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      1 /**************************************************************************
      2 Etherboot -  BOOTP/TFTP Bootstrap Program
      3 LANCE NIC driver for Etherboot
      4 Large portions borrowed from the Linux LANCE driver by Donald Becker
      5 Ken Yap, July 1997
      6 ***************************************************************************/
      7 
      8 /*
      9  * This program is free software; you can redistribute it and/or
     10  * modify it under the terms of the GNU General Public License as
     11  * published by the Free Software Foundation; either version 2, or (at
     12  * your option) any later version.
     13  */
     14 
     15 /* to get some global routines like printf */
     16 #include "etherboot.h"
     17 /* to get the interface to the body of the program */
     18 #include "nic.h"
     19 #ifdef	INCLUDE_LANCE
     20 #include "pci.h"
     21 #endif
     22 #include "cards.h"
     23 
     24 /* Offsets from base I/O address */
     25 #if	defined(INCLUDE_NE2100) || defined(INCLUDE_LANCE)
     26 #define	LANCE_ETH_ADDR	0x0
     27 #define	LANCE_DATA	0x10
     28 #define	LANCE_ADDR	0x12
     29 #define	LANCE_RESET	0x14
     30 #define	LANCE_BUS_IF	0x16
     31 #define	LANCE_TOTAL_SIZE	0x18
     32 #endif
     33 #ifdef	INCLUDE_NI6510
     34 #define	LANCE_ETH_ADDR	0x8
     35 #define	LANCE_DATA	0x0
     36 #define	LANCE_ADDR	0x2
     37 #define	LANCE_RESET	0x4
     38 #define	LANCE_BUS_IF	0x6
     39 #define	LANCE_TOTAL_SIZE	0x10
     40 #endif
     41 
     42 /* lance_poll() now can use multiple Rx buffers to prevent packet loss. Set
     43  * Set LANCE_LOG_RX_BUFFERS to 0..7 for 1, 2, 4, 8, 16, 32, 64 or 128 Rx
     44  * buffers. Usually 4 (=16 Rx buffers) is a good value. (Andreas Neuhaus)
     45  * Decreased to 2 (=4 Rx buffers) (Ken Yap, 20010305) */
     46 
     47 #define LANCE_LOG_RX_BUFFERS	2		/* Use 2^2=4 Rx buffers */
     48 
     49 #define RX_RING_SIZE		(1 << (LANCE_LOG_RX_BUFFERS))
     50 #define RX_RING_MOD_MASK	(RX_RING_SIZE - 1)
     51 #define RX_RING_LEN_BITS	((LANCE_LOG_RX_BUFFERS) << 29)
     52 
     53 struct lance_init_block
     54 {
     55 	unsigned short	mode;
     56 	unsigned char	phys_addr[ETH_ALEN];
     57 	unsigned long	filter[2];
     58 	Address		rx_ring;
     59 	Address		tx_ring;
     60 };
     61 
     62 struct lance_rx_head
     63 {
     64 	union {
     65 		Address		base;
     66 		unsigned char	addr[4];
     67 	} u;
     68 	short		buf_length;	/* 2s complement */
     69 	short		msg_length;
     70 };
     71 
     72 struct lance_tx_head
     73 {
     74 	union {
     75 		Address		base;
     76 		unsigned char	addr[4];
     77 	} u;
     78 	short		buf_length;	/* 2s complement */
     79 	short		misc;
     80 };
     81 
     82 struct lance_interface
     83 {
     84 	struct lance_init_block	init_block;
     85 	struct lance_rx_head	rx_ring[RX_RING_SIZE];
     86 	struct lance_tx_head	tx_ring;
     87 	unsigned char		rbuf[RX_RING_SIZE][ETH_FRAME_LEN+4];
     88 	unsigned char		tbuf[ETH_FRAME_LEN];
     89 	/*
     90 	 * Do not alter the order of the struct members above;
     91 	 * the hardware depends on the correct alignment.
     92 	 */
     93 	int			rx_idx;
     94 };
     95 
     96 #define	LANCE_MUST_PAD		0x00000001
     97 #define	LANCE_ENABLE_AUTOSELECT	0x00000002
     98 #define	LANCE_SELECT_PHONELINE	0x00000004
     99 #define	LANCE_MUST_UNRESET	0x00000008
    100 
    101 /* A mapping from the chip ID number to the part number and features.
    102    These are from the datasheets -- in real life the '970 version
    103    reportedly has the same ID as the '965. */
    104 static const struct lance_chip_type
    105 {
    106 	int	id_number;
    107 	const char	*name;
    108 	int	flags;
    109 } chip_table[] = {
    110 	{0x0000, "LANCE 7990",			/* Ancient lance chip.  */
    111 		LANCE_MUST_PAD + LANCE_MUST_UNRESET},
    112 	{0x0003, "PCnet/ISA 79C960",		/* 79C960 PCnet/ISA.  */
    113 		LANCE_ENABLE_AUTOSELECT},
    114 	{0x2260, "PCnet/ISA+ 79C961",		/* 79C961 PCnet/ISA+, Plug-n-Play.  */
    115 		LANCE_ENABLE_AUTOSELECT},
    116 	{0x2420, "PCnet/PCI 79C970",		/* 79C970 or 79C974 PCnet-SCSI, PCI. */
    117 		LANCE_ENABLE_AUTOSELECT},
    118 	/* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
    119 		it the PCnet32. */
    120 	{0x2430, "PCnet32",			/* 79C965 PCnet for VL bus. */
    121 		LANCE_ENABLE_AUTOSELECT},
    122         {0x2621, "PCnet/PCI-II 79C970A",        /* 79C970A PCInetPCI II. */
    123                 LANCE_ENABLE_AUTOSELECT},
    124 	{0x2625, "PCnet-FAST III 79C973",	/* 79C973 PCInet-FAST III. */
    125 		LANCE_ENABLE_AUTOSELECT},
    126         {0x2626, "PCnet/HomePNA 79C978",
    127                 LANCE_ENABLE_AUTOSELECT|LANCE_SELECT_PHONELINE},
    128 	{0x0, "PCnet (unknown)",
    129 		LANCE_ENABLE_AUTOSELECT},
    130 };
    131 
    132 /* Define a macro for converting program addresses to real addresses */
    133 #undef	virt_to_bus
    134 #define	virt_to_bus(x)		((unsigned long)x)
    135 
    136 static int			chip_version;
    137 static int			lance_version;
    138 static unsigned short		ioaddr;
    139 #ifndef	INCLUDE_LANCE
    140 static int			dma;
    141 #endif
    142 static struct lance_interface	*lp;
    143 
    144 /* additional 8 bytes for 8-byte alignment space */
    145 #ifdef	USE_LOWMEM_BUFFER
    146 #define lance ((char *)0x10000 - (sizeof(struct lance_interface)+8))
    147 #else
    148 static char			lance[sizeof(struct lance_interface)+8];
    149 #endif
    150 
    151 #ifndef	INCLUDE_LANCE
    152 /* DMA defines and helper routines */
    153 
    154 /* DMA controller registers */
    155 #define DMA1_CMD_REG		0x08	/* command register (w) */
    156 #define DMA1_STAT_REG		0x08	/* status register (r) */
    157 #define DMA1_REQ_REG            0x09    /* request register (w) */
    158 #define DMA1_MASK_REG		0x0A	/* single-channel mask (w) */
    159 #define DMA1_MODE_REG		0x0B	/* mode register (w) */
    160 #define DMA1_CLEAR_FF_REG	0x0C	/* clear pointer flip-flop (w) */
    161 #define DMA1_TEMP_REG           0x0D    /* Temporary Register (r) */
    162 #define DMA1_RESET_REG		0x0D	/* Master Clear (w) */
    163 #define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
    164 #define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
    165 
    166 #define DMA2_CMD_REG		0xD0	/* command register (w) */
    167 #define DMA2_STAT_REG		0xD0	/* status register (r) */
    168 #define DMA2_REQ_REG            0xD2    /* request register (w) */
    169 #define DMA2_MASK_REG		0xD4	/* single-channel mask (w) */
    170 #define DMA2_MODE_REG		0xD6	/* mode register (w) */
    171 #define DMA2_CLEAR_FF_REG	0xD8	/* clear pointer flip-flop (w) */
    172 #define DMA2_TEMP_REG           0xDA    /* Temporary Register (r) */
    173 #define DMA2_RESET_REG		0xDA	/* Master Clear (w) */
    174 #define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
    175 #define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
    176 
    177 
    178 #define DMA_MODE_READ	0x44	/* I/O to memory, no autoinit, increment, single mode */
    179 #define DMA_MODE_WRITE	0x48	/* memory to I/O, no autoinit, increment, single mode */
    180 #define DMA_MODE_CASCADE 0xC0   /* pass thru DREQ->HRQ, DACK<-HLDA only */
    181 
    182 /* enable/disable a specific DMA channel */
    183 static void enable_dma(unsigned int dmanr)
    184 {
    185 	if (dmanr <= 3)
    186 		outb_p(dmanr, DMA1_MASK_REG);
    187 	else
    188 		outb_p(dmanr & 3, DMA2_MASK_REG);
    189 }
    190 
    191 static void disable_dma(unsigned int dmanr)
    192 {
    193 	if (dmanr <= 3)
    194 		outb_p(dmanr | 4, DMA1_MASK_REG);
    195 	else
    196 		outb_p((dmanr & 3) | 4, DMA2_MASK_REG);
    197 }
    198 
    199 /* set mode (above) for a specific DMA channel */
    200 static void set_dma_mode(unsigned int dmanr, char mode)
    201 {
    202 	if (dmanr <= 3)
    203 		outb_p(mode | dmanr, DMA1_MODE_REG);
    204 	else
    205 		outb_p(mode | (dmanr&3), DMA2_MODE_REG);
    206 }
    207 #endif	/* !INCLUDE_LANCE */
    208 
    209 /**************************************************************************
    210 RESET - Reset adapter
    211 ***************************************************************************/
    212 static void lance_reset(struct nic *nic)
    213 {
    214 	int		i;
    215 	Address		l;
    216 
    217 	/* Reset the LANCE */
    218 	(void)inw(ioaddr+LANCE_RESET);
    219 	/* Un-Reset the LANCE, needed only for the NE2100 */
    220 	if (chip_table[lance_version].flags & LANCE_MUST_UNRESET)
    221 		outw(0, ioaddr+LANCE_RESET);
    222 	if (chip_table[lance_version].flags & LANCE_ENABLE_AUTOSELECT)
    223 	{
    224 		/* This is 79C960 specific; Turn on auto-select of media
    225 		   (AUI, BNC). */
    226 		outw(0x2, ioaddr+LANCE_ADDR);
    227 		/* Don't touch 10base2 power bit. */
    228 		outw(inw(ioaddr+LANCE_BUS_IF) | 0x2, ioaddr+LANCE_BUS_IF);
    229 	}
    230 	/* HomePNA cards need to explicitly pick the phoneline interface.
    231 	 * Some of these cards have ethernet interfaces as well, this
    232 	 * code might require some modification for those.
    233   	 */
    234         if (chip_table[lance_version].flags & LANCE_SELECT_PHONELINE) {
    235                 short media, check ;
    236                 /* this is specific to HomePNA cards... */
    237                 outw(49, ioaddr+0x12) ;
    238                 media = inw(ioaddr+0x16) ;
    239 #ifdef DEBUG
    240                 printf("media was %d\n", media) ;
    241 #endif
    242                 media &= ~3 ;
    243                 media |= 1 ;
    244 #ifdef DEBUG
    245                 printf("media changed to %d\n", media) ;
    246 #endif
    247                 media &= ~3 ;
    248                 media |= 1 ;
    249                 outw(49, ioaddr+0x12) ;
    250                 outw(media, ioaddr+0x16) ;
    251                 outw(49, ioaddr+0x12) ;
    252                 check = inw(ioaddr+0x16) ;
    253 #ifdef DEBUG
    254                 printf("check %s, media was set properly\n",
    255 			check ==  media ? "passed" : "FAILED" ) ;
    256 #endif
    257 	}
    258 
    259 	/* Re-initialise the LANCE, and start it when done. */
    260 	/* Set station address */
    261 	for (i = 0; i < ETH_ALEN; ++i)
    262 		lp->init_block.phys_addr[i] = nic->node_addr[i];
    263 	/* Preset the receive ring headers */
    264 	for (i=0; i<RX_RING_SIZE; i++) {
    265 		lp->rx_ring[i].buf_length = -ETH_FRAME_LEN-4;
    266 		/* OWN */
    267 		lp->rx_ring[i].u.base = virt_to_bus(lp->rbuf[i]) & 0xffffff;
    268 		/* we set the top byte as the very last thing */
    269 		lp->rx_ring[i].u.addr[3] = 0x80;
    270 	}
    271 	lp->rx_idx = 0;
    272 	lp->init_block.mode = 0x0;	/* enable Rx and Tx */
    273 	l = (Address)virt_to_bus(&lp->init_block);
    274 	outw(0x1, ioaddr+LANCE_ADDR);
    275 	(void)inw(ioaddr+LANCE_ADDR);
    276 	outw((short)l, ioaddr+LANCE_DATA);
    277 	outw(0x2, ioaddr+LANCE_ADDR);
    278 	(void)inw(ioaddr+LANCE_ADDR);
    279 	outw((short)(l >> 16), ioaddr+LANCE_DATA);
    280 	outw(0x4, ioaddr+LANCE_ADDR);
    281 	(void)inw(ioaddr+LANCE_ADDR);
    282 	outw(0x915, ioaddr+LANCE_DATA);
    283 	outw(0x0, ioaddr+LANCE_ADDR);
    284 	(void)inw(ioaddr+LANCE_ADDR);
    285 	outw(0x4, ioaddr+LANCE_DATA);		/* stop */
    286 	outw(0x1, ioaddr+LANCE_DATA);		/* init */
    287 	for (i = 10000; i > 0; --i)
    288 		if (inw(ioaddr+LANCE_DATA) & 0x100)
    289 			break;
    290 #ifdef	DEBUG
    291 	if (i <= 0)
    292 		printf("Init timed out\n");
    293 #endif
    294 	/* Apparently clearing the InitDone bit here triggers a bug
    295 	   in the '974. (Mark Stockton) */
    296 	outw(0x2, ioaddr+LANCE_DATA);		/* start */
    297 }
    298 
    299 /**************************************************************************
    300 POLL - Wait for a frame
    301 ***************************************************************************/
    302 static int lance_poll(struct nic *nic)
    303 {
    304 	int		status;
    305 
    306 	status = lp->rx_ring[lp->rx_idx].u.base >> 24;
    307 	if (status & 0x80)
    308 		return (0);
    309 #ifdef	DEBUG
    310 	printf("LANCE packet received rx_ring.u.base %X mcnt %hX csr0 %hX\n",
    311 		lp->rx_ring[lp->rx_idx].u.base, lp->rx_ring[lp->rx_idx].msg_length,
    312 		inw(ioaddr+LANCE_DATA));
    313 #endif
    314 	if (status == 0x3)
    315 		memcpy(nic->packet, lp->rbuf[lp->rx_idx], nic->packetlen = lp->rx_ring[lp->rx_idx].msg_length);
    316 	/* Andrew Boyd of QNX reports that some revs of the 79C765
    317 	   clear the buffer length */
    318 	lp->rx_ring[lp->rx_idx].buf_length = -ETH_FRAME_LEN-4;
    319 	lp->rx_ring[lp->rx_idx].u.addr[3] |= 0x80;	/* prime for next receive */
    320 
    321 	/* I'm not sure if the following is still ok with multiple Rx buffers, but it works */
    322 	outw(0x0, ioaddr+LANCE_ADDR);
    323 	(void)inw(ioaddr+LANCE_ADDR);
    324 	outw(0x500, ioaddr+LANCE_DATA);		/* clear receive + InitDone */
    325 
    326 	/* Switch to the next Rx ring buffer */
    327 	lp->rx_idx = (lp->rx_idx + 1) & RX_RING_MOD_MASK;
    328 
    329 	return (status == 0x3);
    330 }
    331 
    332 /**************************************************************************
    333 TRANSMIT - Transmit a frame
    334 ***************************************************************************/
    335 static void lance_transmit(
    336 	struct nic *nic,
    337 	const char *d,			/* Destination */
    338 	unsigned int t,			/* Type */
    339 	unsigned int s,			/* size */
    340 	const char *p)			/* Packet */
    341 {
    342 	unsigned long		time;
    343 
    344 	/* copy the packet to ring buffer */
    345 	memcpy(lp->tbuf, d, ETH_ALEN);	/* dst */
    346 	memcpy(&lp->tbuf[ETH_ALEN], nic->node_addr, ETH_ALEN); /* src */
    347 	lp->tbuf[ETH_ALEN+ETH_ALEN] = t >> 8;	/* type */
    348 	lp->tbuf[ETH_ALEN+ETH_ALEN+1] = t;	/* type */
    349 	memcpy(&lp->tbuf[ETH_HLEN], p, s);
    350 	s += ETH_HLEN;
    351 	if (chip_table[chip_version].flags & LANCE_MUST_PAD)
    352 		while (s < ETH_ZLEN)	/* pad to min length */
    353 			lp->tbuf[s++] = 0;
    354 	lp->tx_ring.buf_length = -s;
    355 	lp->tx_ring.misc = 0x0;
    356 	/* OWN, STP, ENP */
    357 	lp->tx_ring.u.base = virt_to_bus(lp->tbuf) & 0xffffff;
    358 	/* we set the top byte as the very last thing */
    359 	lp->tx_ring.u.addr[3] = 0x83;
    360 	/* Trigger an immediate send poll */
    361 	outw(0x0, ioaddr+LANCE_ADDR);
    362 	(void)inw(ioaddr+LANCE_ADDR);	/* as in the datasheets... */
    363 	/* Klaus Espenlaub: the value below was 0x48, but that enabled the
    364 	 * interrupt line, causing a hang if for some reasone the interrupt
    365 	 * controller had the LANCE interrupt enabled.  I have no idea why
    366 	 * nobody ran into this before...  */
    367 	outw(0x08, ioaddr+LANCE_DATA);
    368 	/* wait for transmit complete */
    369 	time = currticks() + TICKS_PER_SEC;		/* wait one second */
    370 	while (currticks() < time && (lp->tx_ring.u.base & 0x80000000) != 0)
    371 		;
    372 	if ((lp->tx_ring.u.base & 0x80000000) != 0)
    373 		printf("LANCE timed out on transmit\n");
    374 	(void)inw(ioaddr+LANCE_ADDR);
    375 	outw(0x200, ioaddr+LANCE_DATA);		/* clear transmit + InitDone */
    376 #ifdef	DEBUG
    377 	printf("tx_ring.u.base %X tx_ring.buf_length %hX tx_ring.misc %hX csr0 %hX\n",
    378 		lp->tx_ring.u.base, lp->tx_ring.buf_length, lp->tx_ring.misc,
    379 		inw(ioaddr+LANCE_DATA));
    380 #endif
    381 }
    382 
    383 static void lance_disable(struct nic *nic)
    384 {
    385 	(void)inw(ioaddr+LANCE_RESET);
    386 	if (chip_table[lance_version].flags & LANCE_MUST_UNRESET)
    387 		outw(0, ioaddr+LANCE_RESET);
    388 
    389 	outw(0, ioaddr+LANCE_ADDR);
    390 	outw(0x0004, ioaddr+LANCE_DATA);	/* stop the LANCE */
    391 
    392 #ifndef	INCLUDE_LANCE
    393 	disable_dma(dma);
    394 #endif
    395 }
    396 
    397 #ifdef	INCLUDE_LANCE
    398 static int lance_probe1(struct nic *nic, struct pci_device *pci)
    399 #else
    400 static int lance_probe1(struct nic *nic)
    401 #endif
    402 {
    403 	int			reset_val ;
    404 	unsigned int		i;
    405 	Address			l;
    406 	short			dma_channels;
    407 #ifndef	INCLUDE_LANCE
    408 	static const char	dmas[] = { 5, 6, 7, 3 };
    409 #endif
    410 
    411 	reset_val = inw(ioaddr+LANCE_RESET);
    412 	outw(reset_val, ioaddr+LANCE_RESET);
    413 #if	1  /* Klaus Espenlaub -- was #ifdef	INCLUDE_NE2100*/
    414 	outw(0x0, ioaddr+LANCE_ADDR);	/* Switch to window 0 */
    415 	if (inw(ioaddr+LANCE_DATA) != 0x4)
    416 		return (-1);
    417 #endif
    418 	outw(88, ioaddr+LANCE_ADDR);	/* Get the version of the chip */
    419 	if (inw(ioaddr+LANCE_ADDR) != 88)
    420 		lance_version = 0;
    421 	else
    422 	{
    423 		chip_version = inw(ioaddr+LANCE_DATA);
    424 		outw(89, ioaddr+LANCE_ADDR);
    425 		chip_version |= inw(ioaddr+LANCE_DATA) << 16;
    426 		if ((chip_version & 0xfff) != 0x3)
    427 			return (-1);
    428 		chip_version = (chip_version >> 12) & 0xffff;
    429 		for (lance_version = 1; chip_table[lance_version].id_number != 0; ++lance_version)
    430 			if (chip_table[lance_version].id_number == chip_version)
    431 				break;
    432 	}
    433 	/* make sure data structure is 8-byte aligned */
    434 	l = ((Address)lance + 7) & ~7;
    435 	lp = (struct lance_interface *)l;
    436 	lp->init_block.mode = 0x3;	/* disable Rx and Tx */
    437 	lp->init_block.filter[0] = lp->init_block.filter[1] = 0x0;
    438 	/* using multiple Rx buffer and a single Tx buffer */
    439 	lp->init_block.rx_ring = (virt_to_bus(&lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
    440 	lp->init_block.tx_ring = virt_to_bus(&lp->tx_ring) & 0xffffff;
    441 	l = virt_to_bus(&lp->init_block);
    442 	outw(0x1, ioaddr+LANCE_ADDR);
    443 	(void)inw(ioaddr+LANCE_ADDR);
    444 	outw((unsigned short)l, ioaddr+LANCE_DATA);
    445 	outw(0x2, ioaddr+LANCE_ADDR);
    446 	(void)inw(ioaddr+LANCE_ADDR);
    447 	outw((unsigned short)(l >> 16), ioaddr+LANCE_DATA);
    448 	outw(0x4, ioaddr+LANCE_ADDR);
    449 	(void)inw(ioaddr+LANCE_ADDR);
    450 	outw(0x915, ioaddr+LANCE_DATA);
    451 	outw(0x0, ioaddr+LANCE_ADDR);
    452 	(void)inw(ioaddr+LANCE_ADDR);
    453 	/* Get station address */
    454 	for (i = 0; i < ETH_ALEN; ++i) {
    455 		nic->node_addr[i] = inb(ioaddr+LANCE_ETH_ADDR+i);
    456 	}
    457 #ifndef	INCLUDE_LANCE
    458 	/* now probe for DMA channel */
    459 	dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0xf) |
    460 		(inb(DMA2_STAT_REG) & 0xf0);
    461 	/* need to fix when PCI provides DMA info */
    462 	for (i = 0; i < (sizeof(dmas)/sizeof(dmas[0])); ++i)
    463 	{
    464 		int		j;
    465 
    466 		dma = dmas[i];
    467 		/* Don't enable a permanently busy DMA channel,
    468 		   or the machine will hang */
    469 		if (dma_channels & (1 << dma))
    470 			continue;
    471 		outw(0x7f04, ioaddr+LANCE_DATA);	/* clear memory error bits */
    472 		set_dma_mode(dma, DMA_MODE_CASCADE);
    473 		enable_dma(dma);
    474 		outw(0x1, ioaddr+LANCE_DATA);		/* init */
    475 		for (j = 100; j > 0; --j)
    476 			if (inw(ioaddr+LANCE_DATA) & 0x900)
    477 				break;
    478 		if (inw(ioaddr+LANCE_DATA) & 0x100)
    479 			break;
    480 		else
    481 			disable_dma(dma);
    482 	}
    483 	if (i >= (sizeof(dmas)/sizeof(dmas[0])))
    484 		dma = 0;
    485 	printf("\n%s base %#X, DMA %d, addr %!\n",
    486 		chip_table[lance_version].name, ioaddr, dma, nic->node_addr);
    487 #else
    488 	printf(" %s base %#hX, addr %!\n", chip_table[lance_version].name, ioaddr, nic->node_addr);
    489 #endif
    490 	if (chip_table[chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
    491 		/* Turn on auto-select of media (10baseT or BNC) so that the
    492 		 * user watch the LEDs. */
    493 		outw(0x0002, ioaddr+LANCE_ADDR);
    494 		/* Don't touch 10base2 power bit. */
    495 		outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
    496 	}
    497 	return (lance_version);
    498 }
    499 
    500 /**************************************************************************
    501 PROBE - Look for an adapter, this routine's visible to the outside
    502 ***************************************************************************/
    503 
    504 #ifdef	INCLUDE_LANCE
    505 struct nic *lancepci_probe(struct nic *nic, unsigned short *probe_addrs, struct pci_device *pci)
    506 #endif
    507 #ifdef	INCLUDE_NE2100
    508 struct nic *ne2100_probe(struct nic *nic, unsigned short *probe_addrs)
    509 #endif
    510 #ifdef	INCLUDE_NI6510
    511 struct nic *ni6510_probe(struct nic *nic, unsigned short *probe_addrs)
    512 #endif
    513 {
    514 	unsigned short		*p;
    515 #ifndef	INCLUDE_LANCE
    516 	static unsigned short	io_addrs[] = { 0x300, 0x320, 0x340, 0x360, 0 };
    517 #endif
    518 
    519 	/* if probe_addrs is 0, then routine can use a hardwired default */
    520 	if (probe_addrs == 0) {
    521 #ifdef	INCLUDE_LANCE
    522 		return 0;
    523 #else
    524 		probe_addrs = io_addrs;
    525 #endif
    526 	}
    527 	for (p = probe_addrs; (ioaddr = *p) != 0; ++p)
    528 	{
    529 		char	offset15, offset14 = inb(ioaddr + 14);
    530 		unsigned short	pci_cmd;
    531 
    532 #ifdef	INCLUDE_NE2100
    533 		if ((offset14 == 0x52 || offset14 == 0x57) &&
    534 		 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
    535 			if (lance_probe1(nic) >= 0)
    536 				break;
    537 #endif
    538 #ifdef	INCLUDE_NI6510
    539 		if ((offset14 == 0x00 || offset14 == 0x52) &&
    540 		 ((offset15 = inb(ioaddr + 15)) == 0x55 || offset15 == 0x44))
    541 			if (lance_probe1(nic) >= 0)
    542 				break;
    543 #endif
    544 #ifdef	INCLUDE_LANCE
    545 		adjust_pci_device(pci);
    546 		if (lance_probe1(nic, pci) >= 0)
    547 			break;
    548 #endif
    549 	}
    550 	/* if board found */
    551 	if (ioaddr != 0)
    552 	{
    553 		/* point to NIC specific routines */
    554 		lance_reset(nic);
    555 		nic->reset = lance_reset;
    556 		nic->poll = lance_poll;
    557 		nic->transmit = lance_transmit;
    558 		nic->disable = lance_disable;
    559 		return nic;
    560 	}
    561 
    562 	/* no board found */
    563 	return 0;
    564 }
    565