1 //=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //==-----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief AMDGPU specific subclass of TargetSubtarget. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef AMDGPUSUBTARGET_H 16 #define AMDGPUSUBTARGET_H 17 #include "AMDGPU.h" 18 #include "llvm/ADT/StringExtras.h" 19 #include "llvm/ADT/StringRef.h" 20 #include "llvm/Target/TargetSubtargetInfo.h" 21 22 #define GET_SUBTARGETINFO_HEADER 23 #include "AMDGPUGenSubtargetInfo.inc" 24 25 #define MAX_CB_SIZE (1 << 16) 26 27 namespace llvm { 28 29 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo { 30 public: 31 enum Generation { 32 R600 = 0, 33 R700, 34 EVERGREEN, 35 NORTHERN_ISLANDS, 36 SOUTHERN_ISLANDS 37 }; 38 39 private: 40 size_t DefaultSize[3]; 41 std::string DevName; 42 bool Is64bit; 43 bool Is32on64bit; 44 bool DumpCode; 45 bool R600ALUInst; 46 bool HasVertexCache; 47 short TexVTXClauseSize; 48 enum Generation Gen; 49 bool FP64; 50 bool CaymanISA; 51 52 InstrItineraryData InstrItins; 53 54 public: 55 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS); 56 57 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; } 58 virtual void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 59 60 bool is64bit() const; 61 bool hasVertexCache() const; 62 short getTexVTXClauseSize() const; 63 enum Generation getGeneration() const; 64 bool hasHWFP64() const; 65 bool hasCaymanISA() const; 66 67 // Helper functions to simplify if statements 68 bool isTargetELF() const; 69 std::string getDataLayout() const; 70 std::string getDeviceName() const; 71 virtual size_t getDefaultSize(uint32_t dim) const; 72 bool dumpCode() const { return DumpCode; } 73 bool r600ALUEncoding() const { return R600ALUInst; } 74 75 }; 76 77 } // End namespace llvm 78 79 #endif // AMDGPUSUBTARGET_H 80