/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.h | 36 Hi, Lo, // Hi/Lo operations, typically on a global address.
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SparcISelLowering.cpp | 779 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr, 789 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi)); 810 MemOpChains.push_back(DAG.getStore(Chain, dl, Hi, PtrOff, [all...] |
/external/llvm/lib/MC/ |
SubtargetFeature.cpp | 128 const SubtargetFeatureKV *Hi = A + L; 130 const SubtargetFeatureKV *F = std::lower_bound(A, Hi, KV); 132 if (F == Hi || StringRef(F->Key) != S) return NULL;
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/external/llvm/lib/Target/Mips/ |
MipsJITInfo.cpp | 171 // lui $t9, %hi(NewVal) 176 int Hi = ((unsigned)NewVal & 0xffff0000) >> 16; 178 Hi++; 181 *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi; 216 int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16; 218 Hi++; 221 // lui $t9, %hi(EmittedAddr) 226 JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi); 231 JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
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Mips16ISelDAGToDAG.cpp | 47 SDNode *Lo = 0, *Hi = 0; 59 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag); 61 return std::make_pair(Lo, Hi); 206 // lui $2, %hi($CPI1_0) 210 // lui $2, %hi($CPI1_0)
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MipsLongBranch.cpp | 269 int64_t Hi = SignExtend64<16>(((Offset + 0x8000) >> 16) & 0xffff); 276 // lui $at, %hi($tgt - $baltgt) 295 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)); 317 // daddiu $at, $at, %hi($tgt - $baltgt) 346 .addReg(Mips::AT_64).addImm(Hi);
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MipsSEFrameLowering.cpp | 157 // copy hi, $vr1 171 unsigned Hi = RegInfo.getSubReg(Dst, Mips::sub_hi); 178 BuildMI(MBB, I, DL, Desc, Hi).addReg(VR1, RegState::Kill); 185 // copy $vr1, hi 201 unsigned Hi = RegInfo.getSubReg(Src, Mips::sub_hi); 206 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), VR1).addReg(Hi, SrcKill);
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MipsISelLowering.h | 40 // No relation with Mips Hi register 41 Hi,
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MipsSEISelLowering.cpp | 166 // Hi0: initial value of Hi register 242 // Hi0: initial value of Hi register 574 SDValue Lo, Hi; 580 Hi = DAG.getNode(MipsISD::ExtractLOHI, DL, Ty, Mult, 584 return HasLo ? Lo : Hi; 586 SDValue Vals[] = { Lo, Hi }; 602 SDValue Hi = DAG.getNode(MipsISD::ExtractLOHI, DL, MVT::i32, Op, 604 return DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Lo, Hi); 613 // hi = copy (extract-element (in64, 1)) 616 // v1 = copy hi [all...] |
/external/llvm/include/llvm/Support/ |
GCOV.h | 139 uint64_t Hi = readInt(); 140 uint64_t Result = Lo | (Hi << 32);
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/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.h | 43 Hi, Lo, // Hi/Lo operations, typically on a global address.
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/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | 159 unsigned Hi = (Imm >> 16) & 0xFFFF; 169 // Both Lo and Hi have nonzero bits. 173 .addImm(Hi); 178 // Just Hi bits. 181 .addImm(Hi); 224 unsigned TmpReg3, Hi, Lo; 225 if ((Hi = (Remainder >> 16) & 0xFFFF)) { 228 TmpReg3).addReg(TmpReg2).addImm(Hi);
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PPCISelLowering.h | 65 /// Hi/Lo - These represent the high and low 16-bit parts of a global 70 Hi, Lo,
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PPCISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypesGeneric.cpp | 14 // computation in two identical registers of a smaller type. The Lo/Hi part 30 // These routines assume that the Lo/Hi part is stored first in memory on 31 // little/big-endian machines, followed by the Hi/Lo part. This means that 34 SDValue &Lo, SDValue &Hi) { 36 GetExpandedOp(Op, Lo, Hi); 39 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { 53 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); 55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 60 GetExpandedOp(InOp, Lo, Hi); [all...] |
LegalizeDAG.cpp | 404 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); 408 Store1 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Lo:Hi, Ptr, 414 Store2 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Hi:Lo, Ptr, 530 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD. 535 SDValue Lo, Hi; 542 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, 547 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(), 560 TLI.getShiftAmountTy(Hi.getValueType())); 561 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); 565 Hi.getValue(1)) [all...] |
LegalizeVectorOps.cpp | 450 SDValue Lo, Hi, ShAmt; 465 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); 466 Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask); 470 if (Hi.getNode()) 471 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi); 724 // Clear upper part of LO, lower HI 725 SDValue HI = DAG.getNode(ISD::SRL, DL, VT, Op.getOperand(0), HalfWord); 728 // Convert hi and lo to floats 729 // Convert the hi part back to the upper value [all...] |
LegalizeFloatTypes.cpp | [all...] |
/external/chromium_org/third_party/skia/src/core/ |
SkMath.cpp | 83 int32_t hi = A + (B >> 16) + (lo < C); local 86 hi = -hi - Sk32ToBool(lo); 92 SkASSERT(((int32_t)lo >> 31) == hi); 96 return hi >> (shift - 32); 99 int32_t tmp = hi >> shift; 102 // we want (hi << (32 - shift)) | (lo >> shift) but rounded 104 return ((hi << (32 - shift)) | (lo >> shift)) + roundBit; 163 uint32_t Hi = A + (B >>16) + (Lo < C); 165 SkASSERT((Hi >> 29) == 0); // else overflo [all...] |
/external/skia/src/core/ |
SkMath.cpp | 83 int32_t hi = A + (B >> 16) + (lo < C); local 86 hi = -hi - Sk32ToBool(lo); 92 SkASSERT(((int32_t)lo >> 31) == hi); 96 return hi >> (shift - 32); 99 int32_t tmp = hi >> shift; 102 // we want (hi << (32 - shift)) | (lo >> shift) but rounded 104 return ((hi << (32 - shift)) | (lo >> shift)) + roundBit; 163 uint32_t Hi = A + (B >>16) + (Lo < C); 165 SkASSERT((Hi >> 29) == 0); // else overflo [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 526 SDValue Hi = DAG.getNode(ISD::SRA, DL, MVT::i32, Op.getOperand(0), 529 return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Op.getOperand(0), Hi); [all...] |
/external/chromium_org/third_party/openssl/openssl/crypto/modes/ |
gcm128.c | 75 V.lo = (V.hi<<63)|(V.lo>>1); \ 76 V.hi = (V.hi>>1 )^T; \ 80 V.lo = (V.hi<<63)|(V.lo>>1); \ 81 V.hi = (V.hi>>1 )^((u64)T<<32); \ 126 Htable[0].hi = 0; 128 V.hi = H[0]; 137 u128 *Hi = Htable+i, H0 = *Hi; [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 523 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, 526 SDValue Lo(Hi.getNode(), 1); 527 SDValue Ops[] = { Lo, Hi }; 540 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, 543 SDValue Lo(Hi.getNode(), 1); 544 SDValue Ops[] = { Lo, Hi }; 637 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, 640 SDValue Lo(Hi.getNode(), 1); 641 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 645 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl [all...] |
/external/openssl/crypto/modes/ |
gcm128.c | 75 V.lo = (V.hi<<63)|(V.lo>>1); \ 76 V.hi = (V.hi>>1 )^T; \ 80 V.lo = (V.hi<<63)|(V.lo>>1); \ 81 V.hi = (V.hi>>1 )^((u64)T<<32); \ 126 Htable[0].hi = 0; 128 V.hi = H[0]; 137 u128 *Hi = Htable+i, H0 = *Hi; [all...] |
/external/valgrind/main/VEX/priv/ |
host_mips_isel.c | 349 // store hi,lo as Ity_I32's 1345 HReg hi, lo; local [all...] |