| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| mixcase.asm | 0 CPU SSSE3
|
| /external/lzma/CPP/7zip/ |
| Aes.mak | 4 !IF "$(CPU)" != "IA64" && "$(CPU)" != "MIPS" && "$(CPU)" != "ARM"
|
| Crc.mak | 3 !IF "$(CPU)" == "IA64" || "$(CPU)" == "MIPS"
|
| /external/chromium_org/v8/src/ia32/ |
| cpu-ia32.cc | 28 // CPU specific code for ia32 independent of OS goes here.
38 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
58 // is patched on an intel CPU the core performing the patching will have its
76 void CPU::DebugBreak() {
|
| /external/chromium_org/v8/src/x64/ |
| cpu-x64.cc | 28 // CPU specific code for x64 independent of OS goes here.
38 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
58 // is patched on an intel CPU the core performing the patching will have its
76 void CPU::DebugBreak() {
|
| /external/v8/src/ia32/ |
| cpu-ia32.cc | 28 // CPU specific code for ia32 independent of OS goes here.
38 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
58 // is patched on an intel CPU the core performing the patching will have its
76 void CPU::DebugBreak() {
|
| /external/v8/src/x64/ |
| cpu-x64.cc | 28 // CPU specific code for x64 independent of OS goes here.
38 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
58 // is patched on an intel CPU the core performing the patching will have its
76 void CPU::DebugBreak() {
|
| /external/llvm/lib/Target/XCore/ |
| XCoreSubtarget.cpp | 27 const std::string &CPU, const std::string &FS)
28 : XCoreGenSubtargetInfo(TT, CPU, FS)
|
| XCoreSubtarget.h | 34 XCoreSubtarget(const std::string &TT, const std::string &CPU,
39 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXSubtarget.cpp | 23 NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU,
25 : NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0),
35 // Provide the default CPU if none
38 ParseSubtargetFeatures((CPU.empty() ? defCPU : CPU), FS);
41 if (FS.empty() && CPU.empty())
43 else if (!CPU.empty())
44 TargetName = CPU;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64Subtarget.cpp | 28 AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS)
29 : AArch64GenSubtargetInfo(TT, CPU, FS), HasNEON(false), HasCrypto(false),
32 ParseSubtargetFeatures(CPU, FS);
|
| /external/chromium_org/v8/src/ |
| cpu.h | 45 // CPU
53 class CPU : public AllStatic {
55 // Initializes the cpu architecture support. Called once at VM startup.
|
| /external/v8/src/ |
| cpu.h | 45 // CPU
53 class CPU : public AllStatic {
55 // Initializes the cpu architecture support. Called once at VM startup.
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430Subtarget.cpp | 27 const std::string &CPU,
29 MSP430GenSubtargetInfo(TT, CPU, FS) {
|
| MSP430Subtarget.h | 33 MSP430Subtarget(const std::string &TT, const std::string &CPU,
38 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| MSP430TargetMachine.cpp | 29 StringRef CPU,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS),
|
| /external/llvm/lib/MC/ |
| MCSubtargetInfo.cpp | 22 /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented
25 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
27 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
30 if (!CPU.empty())
31 CPUSchedModel = getSchedModelForCPU(CPU);
37 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
62 InitMCProcessorInfo(CPU, FS);
83 MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
95 KV.Key = CPU.data();
98 if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) {
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.cpp | 27 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
29 SparcGenSubtargetInfo(TT, CPU, FS),
36 std::string CPUName = CPU;
|
| SparcTargetMachine.cpp | 29 StringRef CPU, StringRef FS,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS, is64bit),
79 StringRef TT, StringRef CPU,
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
91 StringRef TT, StringRef CPU,
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| /external/chromium_org/v8/src/arm/ |
| cpu-arm.cc | 28 // CPU specific code for arm independent of OS goes here.
37 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
110 void CPU::DebugBreak() {
|
| /external/chromium_org/v8/src/mips/ |
| cpu-mips.cc | 28 // CPU specific code for arm independent of OS goes here.
41 #include "cpu.h"
50 void CPU::SetUp() {
55 bool CPU::SupportsCrankshaft() {
60 void CPU::FlushICache(void* start, size_t size) {
91 void CPU::DebugBreak() {
|
| /external/v8/src/arm/ |
| cpu-arm.cc | 28 // CPU specific code for arm independent of OS goes here.
37 #include "cpu.h"
44 void CPU::SetUp() {
49 bool CPU::SupportsCrankshaft() {
54 void CPU::FlushICache(void* start, size_t size) {
110 void CPU::DebugBreak() {
|
| /external/v8/src/mips/ |
| cpu-mips.cc | 28 // CPU specific code for arm independent of OS goes here.
41 #include "cpu.h"
50 void CPU::SetUp() {
55 bool CPU::SupportsCrankshaft() {
60 void CPU::FlushICache(void* start, size_t size) {
104 void CPU::DebugBreak() {
|
| /external/qemu/distrib/ |
| update-audio.sh | 27 CPU=`uname -p`
28 if [ "$CPU" == "i386" ] ; then
35 CPU=`uname -m`
36 case "$CPU" in
38 CPU=x86
41 OS=linux-$CPU
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.h | 36 std::string ParseARMTriple(StringRef TT, StringRef CPU);
41 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
50 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
|
