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      1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file provides ARM specific target descriptions.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef ARMMCTARGETDESC_H
     15 #define ARMMCTARGETDESC_H
     16 
     17 #include "llvm/Support/DataTypes.h"
     18 #include <string>
     19 
     20 namespace llvm {
     21 class MCAsmBackend;
     22 class MCCodeEmitter;
     23 class MCContext;
     24 class MCInstrInfo;
     25 class MCObjectWriter;
     26 class MCRegisterInfo;
     27 class MCSubtargetInfo;
     28 class MCRelocationInfo;
     29 class StringRef;
     30 class Target;
     31 class raw_ostream;
     32 
     33 extern Target TheARMTarget, TheThumbTarget;
     34 
     35 namespace ARM_MC {
     36   std::string ParseARMTriple(StringRef TT, StringRef CPU);
     37 
     38   /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
     39   /// This is exposed so Asm parser, etc. do not need to go through
     40   /// TargetRegistry.
     41   MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
     42                                             StringRef FS);
     43 }
     44 
     45 MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII,
     46                                       const MCRegisterInfo &MRI,
     47                                       const MCSubtargetInfo &STI,
     48                                       MCContext &Ctx);
     49 
     50 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
     51 
     52 /// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
     53 MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
     54                                          uint8_t OSABI);
     55 
     56 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
     57 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
     58                                           bool Is64Bit,
     59                                           uint32_t CPUType,
     60                                           uint32_t CPUSubtype);
     61 
     62 
     63 /// createARMMachORelocationInfo - Construct ARM Mach-O relocation info.
     64 MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx);
     65 } // End llvm namespace
     66 
     67 // Defines symbolic names for ARM registers.  This defines a mapping from
     68 // register name to register number.
     69 //
     70 #define GET_REGINFO_ENUM
     71 #include "ARMGenRegisterInfo.inc"
     72 
     73 // Defines symbolic names for the ARM instructions.
     74 //
     75 #define GET_INSTRINFO_ENUM
     76 #include "ARMGenInstrInfo.inc"
     77 
     78 #define GET_SUBTARGETINFO_ENUM
     79 #include "ARMGenSubtargetInfo.inc"
     80 
     81 #endif
     82