| /external/llvm/include/llvm/Target/ |
| TargetOpcodes.h | 47 /// defined by an IMPLICIT_DEF, because it is commonly used to implement
51 /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
52 IMPLICIT_DEF = 8,
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| TargetInstrInfo.h | 70 return MI->getOpcode() == TargetOpcode::IMPLICIT_DEF ||
[all...] |
| /external/llvm/lib/CodeGen/ |
| ProcessImplicitDefs.cpp | 25 /// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
26 /// for each use. Add isUndef marker to implicit_def defs and their uses.
91 DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI);
92 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
121 // If we found the using MI, we can erase the IMPLICIT_DEF.
129 // Leave the physreg IMPLICIT_DEF, but trim any extra operands.
135 /// processImplicitDefs - Process IMPLICIT_DEF instructions and turn them into
|
| MachineSSAUpdater.cpp | 108 /// InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define
148 // Insert an implicit_def to represent an undef value.
149 MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
291 /// GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
295 // Insert an implicit_def to represent an undef value.
296 MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
|
| PHIElimination.cpp | 93 // Defs of PHI sources which are implicit_def.
151 // Remove dead IMPLICIT_DEF instructions.
209 /// are implicit_def's.
245 // If all sources of a PHI node are implicit_def, just emit an
246 // implicit_def instead of a copy.
248 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
386 // Insert an IMPLICIT_DEF instruction.
388 TII->get(TargetOpcode::IMPLICIT_DEF),
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| TwoAddressInstructionPass.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ResourcePriorityQueue.cpp | 268 case TargetOpcode::IMPLICIT_DEF:
308 case TargetOpcode::IMPLICIT_DEF:
555 if (N->getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
|
| InstrEmitter.cpp | 211 assert(Node->getMachineOpcode() != TargetOpcode::IMPLICIT_DEF &&
212 "IMPLICIT_DEF should have been handled as a special case elsewhere!");
270 Op.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
271 // Add an IMPLICIT_DEF instruction before every use.
273 // IMPLICIT_DEF can produce any type of result so its MCInstrDesc
281 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
719 if (Opc == TargetOpcode::IMPLICIT_DEF)
720 // We want a unique VR for each IMPLICIT_DEF use.
[all...] |
| ScheduleDAGSDNodes.cpp | 82 N->getMachineOpcode() == TargetOpcode::IMPLICIT_DEF))
539 if (POpc == TargetOpcode::IMPLICIT_DEF) {
[all...] |
| FastISel.cpp | 233 TII.get(TargetOpcode::IMPLICIT_DEF), Reg);
[all...] |
| ScheduleDAGRRList.cpp | [all...] |
| SelectionDAGISel.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.cpp | 210 MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
|
| HexagonMachineScheduler.cpp | 57 case TargetOpcode::IMPLICIT_DEF:
109 case TargetOpcode::IMPLICIT_DEF:
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 643 bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; }
695 case TargetOpcode::IMPLICIT_DEF:
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 301 case TargetOpcode::IMPLICIT_DEF:
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCodeEmitter.cpp | 128 case TargetOpcode::IMPLICIT_DEF:
|
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 267 // See if the first operand of this insert_subreg is IMPLICIT_DEF
301 // See if all bar one of the operands are IMPLICIT_DEF and insert the
526 TII->get(TargetOpcode::IMPLICIT_DEF), Out);
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| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 568 case TargetOpcode::IMPLICIT_DEF:
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 780 SDNode *N = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i64);
[all...] |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | [all...] |
| X86FloatingPoint.cpp | [all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 726 case TargetOpcode::IMPLICIT_DEF:
[all...] |
