| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.h | 57 /// isStoreToStackSlot - If the specified machine instruction is a direct
62 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| SparcInstrInfo.cpp | 57 /// isStoreToStackSlot - If the specified machine instruction is a direct
62 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.h | 44 /// isStoreToStackSlot - If the specified machine instruction is a direct
49 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| XCoreInstrInfo.cpp | 72 /// isStoreToStackSlot - If the specified machine instruction is a direct
78 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.h | 39 /// isStoreToStackSlot - If the specified machine instruction is a direct
44 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| Mips16InstrInfo.h | 38 /// isStoreToStackSlot - If the specified machine instruction is a direct
43 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| Mips16InstrInfo.cpp | 57 /// isStoreToStackSlot - If the specified machine instruction is a direct
63 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const
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| MipsSEInstrInfo.cpp | 67 /// isStoreToStackSlot - If the specified machine instruction is a direct
73 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const
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| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 102 unsigned isStoreToStackSlot(const MachineInstr *MI,
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| PPCInstrInfo.cpp | 124 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
567 // update isStoreToStackSlot.
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 118 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| SystemZInstrInfo.cpp | 108 unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 50 /// isStoreToStackSlot - If the specified machine instruction is a direct
55 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| HexagonInstrInfo.cpp | 92 /// isStoreToStackSlot - If the specified machine instruction is a direct
97 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 148 /// isStoreToStackSlot - If the specified machine instruction is a direct
153 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
169 /// reference. If not, return false. Unlike isStoreToStackSlot,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 102 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
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| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 181 unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
786 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
[all...] |
| StackSlotColoring.cpp | 396 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
|
