/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_fs_copy_propagation.cpp | 39 inst->src[arg].reg_offset != entry->dst.reg_offset) { 57 inst->src[arg].reg_offset = entry->src.reg_offset; 116 inst->src[0].reg_offset != inst->dst.reg_offset)) ||
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brw_vec4.cpp | 113 this->reg_offset = reg.reg_offset; 193 this->reg_offset = reg.reg_offset; 257 reg_offset == r->reg_offset && 414 inst->src[i].reg += inst->src[i].reg_offset; 415 inst->src[i].reg_offset = 0; 682 inst->src[i].reg_offset = temp.reg_offset; [all...] |
brw_fs.cpp | 84 assert(dst.reg_offset >= 0); 95 assert(dst.reg_offset >= 0); 97 assert(src[0].reg_offset >= 0); 109 assert(dst.reg_offset >= 0); 111 assert(src[0].reg_offset >= 0); 113 assert(src[1].reg_offset >= 0); 127 assert(dst.reg_offset >= 0); 129 assert(src[0].reg_offset >= 0); 131 assert(src[1].reg_offset >= 0); 133 assert(src[2].reg_offset >= 0) [all...] |
brw_vec4_copy_propagation.cpp | 176 value.reg_offset != values[i]->reg_offset || 268 inst->src[i].reg_offset); 303 virtual_grf_reg_map[inst->dst.reg] + inst->dst.reg_offset; 328 cur_value[i][j]->reg_offset == inst->dst.reg_offset) {
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brw_fs_reg_allocate.cpp | 37 assert(reg->reg_offset >= 0); 38 reg->reg = reg_hw_locations[reg->reg] + reg->reg_offset * reg_width; 39 reg->reg_offset = 0; 396 spill_offset + REG_SIZE * inst->src[i].reg_offset); 403 REG_SIZE * inst->dst.reg_offset); 405 inst->dst.reg_offset = 0; 416 unspill_reg.reg_offset++; 421 spill_src.reg_offset = 0; 429 spill_src.reg_offset++;
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brw_fs_visitor.cpp | 100 this->outputs[output].reg_offset += vector_elements * i; 157 this->result.reg_offset += offset; 175 this->result.reg_offset += index->value.i[0] * element_size; 611 result.reg_offset++; 618 result.reg_offset = 0; 641 l.reg_offset++; 642 r.reg_offset++; 740 r.reg_offset++; 742 l.reg_offset++; 764 coordinate.reg_offset++ [all...] |
brw_vec4_visitor.cpp | 818 output_reg[ir->location + i].reg_offset = i; 2578 int reg_offset = base_offset + orig_src.reg_offset; local [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_fs_copy_propagation.cpp | 39 inst->src[arg].reg_offset != entry->dst.reg_offset) { 57 inst->src[arg].reg_offset = entry->src.reg_offset; 116 inst->src[0].reg_offset != inst->dst.reg_offset)) ||
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brw_vec4.cpp | 113 this->reg_offset = reg.reg_offset; 193 this->reg_offset = reg.reg_offset; 257 reg_offset == r->reg_offset && 414 inst->src[i].reg += inst->src[i].reg_offset; 415 inst->src[i].reg_offset = 0; 682 inst->src[i].reg_offset = temp.reg_offset; [all...] |
brw_fs.cpp | 84 assert(dst.reg_offset >= 0); 95 assert(dst.reg_offset >= 0); 97 assert(src[0].reg_offset >= 0); 109 assert(dst.reg_offset >= 0); 111 assert(src[0].reg_offset >= 0); 113 assert(src[1].reg_offset >= 0); 127 assert(dst.reg_offset >= 0); 129 assert(src[0].reg_offset >= 0); 131 assert(src[1].reg_offset >= 0); 133 assert(src[2].reg_offset >= 0) [all...] |
brw_vec4_copy_propagation.cpp | 176 value.reg_offset != values[i]->reg_offset || 268 inst->src[i].reg_offset); 303 virtual_grf_reg_map[inst->dst.reg] + inst->dst.reg_offset; 328 cur_value[i][j]->reg_offset == inst->dst.reg_offset) {
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brw_fs_reg_allocate.cpp | 37 assert(reg->reg_offset >= 0); 38 reg->reg = reg_hw_locations[reg->reg] + reg->reg_offset * reg_width; 39 reg->reg_offset = 0; 396 spill_offset + REG_SIZE * inst->src[i].reg_offset); 403 REG_SIZE * inst->dst.reg_offset); 405 inst->dst.reg_offset = 0; 416 unspill_reg.reg_offset++; 421 spill_src.reg_offset = 0; 429 spill_src.reg_offset++;
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brw_fs_visitor.cpp | 100 this->outputs[output].reg_offset += vector_elements * i; 157 this->result.reg_offset += offset; 175 this->result.reg_offset += index->value.i[0] * element_size; 611 result.reg_offset++; 618 result.reg_offset = 0; 641 l.reg_offset++; 642 r.reg_offset++; 740 r.reg_offset++; 742 l.reg_offset++; 764 coordinate.reg_offset++ [all...] |
brw_vec4_visitor.cpp | 818 output_reg[ir->location + i].reg_offset = i; 2578 int reg_offset = base_offset + orig_src.reg_offset; local [all...] |
/bionic/libc/kernel/arch-arm/asm/arch/ |
mux.h | 32 #define MUX_CFG_24XX(desc, reg_offset, mode, pull_en, pull_mode, dbg) { .name = desc, .debug = dbg, .mux_reg = reg_offset, .mask = mode, .pull_val = pull_en, .pu_pd_val = pull_mode, },
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/development/ndk/platforms/android-3/arch-arm/include/asm/arch/ |
mux.h | 32 #define MUX_CFG_24XX(desc, reg_offset, mode, pull_en, pull_mode, dbg) { .name = desc, .debug = dbg, .mux_reg = reg_offset, .mask = mode, .pull_val = pull_en, .pu_pd_val = pull_mode, },
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/device/asus/deb/kernel-headers/media/ |
msmb_isp.h | 264 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 270 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/device/asus/deb/original-kernel-headers/media/ |
msmb_isp.h | 228 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 234 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/device/asus/flo/kernel-headers/media/ |
msmb_isp.h | 264 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 270 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/device/asus/flo/original-kernel-headers/media/ |
msmb_isp.h | 228 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 234 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/device/lge/hammerhead/kernel-headers/media/ |
msmb_isp.h | 272 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 279 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/device/lge/hammerhead/original-kernel-headers/media/ |
msmb_isp.h | 235 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 241 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/external/kernel-headers/original/asm-arm/arch/ |
mux.h | 124 #define MUX_CFG_24XX(desc, reg_offset, mode, \ 129 .mux_reg = reg_offset, \
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/hardware/qcom/msm8x74/kernel-headers/media/ |
msmb_isp.h | 270 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 276 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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/hardware/qcom/msm8x74/original-kernel-headers/media/ |
msmb_isp.h | 232 uint32_t reg_offset; member in struct:msm_vfe_reg_rw_info 238 uint32_t reg_offset; member in struct:msm_vfe_reg_mask_info
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